Pengcheng Chen 3599477e9d vpp: correct w_in/h_in when calc phase step when aisr enable [1/1]
PD#SWPL-199949

Problem:
display abnormal when zoom and aisr both enable

Solution:
correct w_in/h_in when calc phase step when aisr enable

Verify:
t3x

Change-Id: Ieb18b28700d7eda6057f4c7884d70d9d5d2393b7
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
(cherry picked from commit 70d418de5128b891daf02e7d8b952bb95886bd25)
2025-01-16 13:48:51 -08:00
2024-11-13 19:24:25 -08:00
2025-01-07 02:25:53 +00:00
S
Description
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118 MiB
Languages
C 98.9%
Perl 0.4%
Makefile 0.4%
Shell 0.2%