Chuan Liu 6a4094dcf6 g12a/g12b/sm1: update clock tree [1/1] ...

PD#SWPL-107164

Problem:
1 sys_pll/sys1_pll does not support to 1512M
2 clkid is stored in multiple header files

Solution:
1 added frequency point support
2 clkid is placed under the same header file

Verify:
w400/ac200

Change-Id: I47d7f7c36b830285cfa4800ca0d90651629edb7e
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>

2023-04-04 19:35:44 +08:00

..

drm

drm: modify typo [1/1]

2022-09-22 04:11:37 -07:00

dt-bindings

g12a/g12b/sm1: update clock tree [1/1]

2023-04-04 19:35:44 +08:00

linux/amlogic

vrr: read and write in a reguar buffer [1/1]

2023-03-30 06:24:48 -07:00

trace/events

debug: add meson_atrace inline function. [1/1]

2023-03-07 23:10:47 -08:00

uapi/amlogic

optee: change vmx-socket API from socket to ioctl for kernel 5.15 [1/1]

2023-03-13 22:46:43 -07:00