Xiangyu Cai 1249676818 vrr: read and write in a reguar buffer [1/1] ...

PD#SWPL-114194

Problem:
latency have 1.5ms fluctuation read/write in 11 buffer

Solution:
read and wriye in a regular buffer

Verify:
t982_ar301

Change-Id: I9bdc274c8973e7cfd981cedb4e3996760b3028c1
Signed-off-by: Xiangyu Cai <xiangyu.cai@amlogic.com>

2023-03-30 06:24:48 -07:00

..

amlogic

vrr: read and write in a reguar buffer [1/1]

2023-03-30 06:24:48 -07:00