Zhuo Wang 76f9d6cf04 eth: s7d set analog issue [1/1]
PD#SWPL-163065

Problem:
set analog will close phy clock

Solution:
fix wrong operation

Verify:
s7d_bg201

Change-Id: I38949fdb6b03c2076d3373909f803eccece9eceb
Signed-off-by: Zhuo Wang <zhuo.wang@amlogic.com>
2024-04-24 14:16:06 +08:00
2024-04-23 16:03:43 +08:00
2024-04-24 14:16:06 +08:00
2024-04-18 19:00:18 +08:00
2024-04-18 18:55:32 +08:00
S
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