Pengcheng Chen 7953485c84 vpp: sr1 in size force disable display abnormal in 2 slice mode [1/1]
PD#SWPL-161047

Problem:
sr1 in size force disable pps phase step not adjust
in 2 slice mode caused display error

Solution:
sr1 in size force disable pps phase step adjust
in 2 slice mode

Verify:
t3x

Change-Id: I716f44b30fbd33ccc83aa94b0cbc93cf0361215e
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
2024-03-22 02:13:45 -07:00
2024-01-22 12:48:43 +08:00
S
Description
No description provided
118 MiB
Languages
C 98.9%
Perl 0.4%
Makefile 0.4%
Shell 0.2%