Xiangyu Cai a6bf60ea08 vrr: fix delay line when input standard resolution [1/1]
PD#SWPL-170748

Problem:
delay line not correct

Solution:
not change delay line when input 16:9

Verify:
t5m

Change-Id: Idf212eb3e73424469b4462bea24f4ce93261af3d
Signed-off-by: Xiangyu Cai <xiangyu.cai@amlogic.com>
2024-05-29 08:02:32 -07:00
2024-05-29 01:59:25 -07:00
S
Description
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118 MiB
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