qing.zhang 861319cbd6 Audio: add earc rx for s7d [1/1] ...

PD#SWPL-163105

Problem:
new earc Rx design

Solution:
changelist from https://scgit.amlogic.com/#/c/417153
1. new default setting for arc in
2. remove pll refresh when startup
3. when cmdc init, need refresh pll after pll default setting
4. force channel sync for channel mapping
5. add dmac bit29 check for common arc check
6. add iec raw channel status check
7. use chip info(arc_ch_sync/arc_in_new)

Verify:
use s7d

Change-Id: Id681334bfde57bfe71a870a16859e24712e262e3
Signed-off-by: qing.zhang <qing.zhang@amlogic.com>

2024-04-24 02:06:36 -07:00

..

clock

Audio: add earc rx for s7d [1/1]

2024-04-24 02:06:36 -07:00

display

bringup: Fixed s7d build error [1/1]

2024-04-17 19:31:22 +08:00

firmware

host driver: reconstruct dsp host driver [1/1]

2023-09-25 00:13:42 -07:00

gpio

gpio: s7d: support gpio and irq [1/1]

2024-04-17 19:29:58 +08:00

hwspinlock

T3X: add hwspinlock. [3/3]

2023-05-18 21:08:38 +08:00

iio/adc

key: porting adc key driver [1/1]

2022-01-12 10:42:11 +08:00

input

ir: support 2 multi-format ir controller [1/1]

2024-04-17 19:31:21 +08:00

interrupt-controller

t3: bring up to console [1/1]

2022-09-07 20:06:44 +08:00

mailbox

mailbox: s7d add aocpu alive check mechanism [1/1]

2024-04-17 19:31:21 +08:00

power

S7D: Clean up power domain state. [3/3]

2024-04-17 19:31:22 +08:00

pwm

typo: clear typo problem [1/1]

2022-09-07 20:06:45 +08:00

reset

reset: add reset controller support for s7d [1/1]

2024-04-17 19:31:20 +08:00