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iommu/arm-smmu-v3: Avoid memory corruption from Hisilicon MSI payloads
[ Upstream commit 84a9a75774 ]
The GITS_TRANSLATER MMIO doorbell register in the ITS hardware is
architected to be 4 bytes in size, yet on hi1620 and earlier, Hisilicon
have allocated the adjacent 4 bytes to carry some IMPDEF sideband
information which results in an 8-byte MSI payload being delivered when
signalling an interrupt:
MSIAddr:
|----4bytes----|----4bytes----|
| MSIData | IMPDEF |
This poses no problem for the ITS hardware because the adjacent 4 bytes
are reserved in the memory map. However, when delivering MSIs to memory,
as we do in the SMMUv3 driver for signalling the completion of a SYNC
command, the extended payload will corrupt the 4 bytes adjacent to the
"sync_count" member in struct arm_smmu_device. Fortunately, the current
layout allocates these bytes to padding, but this is fragile and we
should make this explicit.
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
[will: Rewrote commit message and comment]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
b59d70c07a
commit
00b0fbb8f0
@@ -586,7 +586,11 @@ struct arm_smmu_device {
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struct arm_smmu_strtab_cfg strtab_cfg;
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u32 sync_count;
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/* Hi16xx adds an extra 32 bits of goodness to its MSI payload */
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union {
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u32 sync_count;
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u64 padding;
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};
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/* IOMMU core code handle */
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struct iommu_device iommu;
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