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phy/rockchip: naneng-edp: Check if PHY need configured during startup

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Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: Icf5aeb751401d0ab2c2e02443f6316b49b6b23c3
This commit is contained in:
Wyon bi
2021-12-27 16:25:10 +08:00
parent eb4c42e291
commit 00d2a3e342
1 changed files with 16 additions and 0 deletions
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16
drivers/phy/rockchip/phy-rockchip-naneng-edp.c
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@@ -53,6 +53,7 @@
#define EDP_PHY_GRF_CON10 0x0028
#define EDP_PHY_AUX_RCV_PD_SEL(x) HIWORD_UPDATE(x, 5, 5)
#define EDP_PHY_AUX_DRV_PD_SEL(x) HIWORD_UPDATE(x, 4, 4)
#define EDP_PHY_AUX_IDLE_MASK BIT(2)
#define EDP_PHY_AUX_IDLE(x) HIWORD_UPDATE(x, 2, 2)
#define EDP_PHY_AUX_RCV_PD(x) HIWORD_UPDATE(x, 1, 1)
#define EDP_PHY_AUX_DRV_PD(x) HIWORD_UPDATE(x, 0, 0)
@@ -248,6 +249,18 @@ static int rockchip_edp_phy_configure(struct phy *phy,
return 0;
}
static bool rockchip_edp_phy_enabled(struct rockchip_edp_phy *edpphy)
{
u32 val;
val = readl(edpphy->regs + EDP_PHY_GRF_CON10);
if (val & EDP_PHY_AUX_IDLE_MASK)
return false;
return true;
}
static int rockchip_edp_phy_power_on(struct phy *phy)
{
struct rockchip_edp_phy *edpphy = phy_get_drvdata(phy);
@@ -255,6 +268,9 @@ static int rockchip_edp_phy_power_on(struct phy *phy)
clk_prepare_enable(edpphy->pclk);
clk_prepare_enable(edpphy->refclk);
if (rockchip_edp_phy_enabled(edpphy))
return 0;
reset_control_assert(edpphy->apb_reset);
usleep_range(100, 101);
reset_control_deassert(edpphy->apb_reset);