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Merge commit '83950944033f768197600e90b37468f7e38cd388'

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* commit '83950944033f768197600e90b37468f7e38cd388':
  drm/bridge: synopsys: dw-hdmi: Fix hdmi color can't be switched when entering kernel
  drm/bridge: synopsys: dw-hdmi-qp: Independently configure color and infoframe
  video: rockchip: mpp: Fix load info not clear issue
  video: rockchip: mpp: rkvenc2: Fix the timeout threshold config issue
  arm64: dts: rockchip: Fixes mmc_ecsd address for rv1126b-fastboot-emmc
  ARM: dts: rockchip: Fixes mmc_ecsd address for rv1126b-thunder-boot-emmc
  soc: rockchip: thunderboot_mmc: disable DMA upon transfer completion
  PCI/ASPM: Disable ASPM L0s/L1 on CYW989459 Wireless Module
  Revert "PCI: disable L0s for CYW989459 Wireless Module"
  dt-bindings: suspend: rv1126b: add RKPM_SLP_32K_IO macro
  media: rockchip: vpss: add FBC format alignment check for width/height
  arm64: config: rv1126b: Enable CONFIG_VIDEO_ROCKCHIP_AIISP
  video: rockchip: rga3: mpi_commit: support modify width/height in rotate 90/270
  arm64: config: rv1126b: Enable CONFIG_SQUASHFS

Change-Id: Iaf9edda12817100194461e054339cd486758a6fb
This commit is contained in:
Tao Huang
2025-08-25 19:08:37 +08:00
parent 064a633aca 8395094403
commit 0118db0cbc
14 changed files with 209 additions and 184 deletions
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4
arch/arm/boot/dts/rv1126b-thunder-boot-emmc.dtsi
View File

@@ -23,8 +23,8 @@
};
&reserved_memory {
mmc_ecsd: mmc@47fffe00 {
reg = <0x47fffe00 0x00001000>;
mmc_ecsd: mmc@47fff000 {
reg = <0x47fff000 0x00001000>;
};
mmc_idmac: mmc@48000000 {

4
arch/arm64/boot/dts/rockchip/rv1126b-fastboot-emmc.dtsi
View File

@@ -36,8 +36,8 @@
reg = <0x48000000 0x00400000>;
};
mmc_ecsd: mmc@47FFFE00{
reg = <0x47FFFE00 0x00001000>;
mmc_ecsd: mmc@47FFF000{
reg = <0x47FFF000 0x00001000>;
};
ramdisk_r: ramdisk_r {

5
arch/arm64/configs/rv1126b_defconfig
View File

@@ -205,6 +205,7 @@ CONFIG_USB_VIDEO_CLASS=y
# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_ROCKCHIP_AIISP=y
CONFIG_VIDEO_ROCKCHIP_CIF=y
CONFIG_VIDEO_ROCKCHIP_ISP=y
CONFIG_VIDEO_ROCKCHIP_VPSS=y
@@ -342,6 +343,10 @@ CONFIG_EXT4_FS=y
CONFIG_AUTOFS4_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_DECOMP_MULTI=y
CONFIG_SQUASHFS_XZ=y
CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
CONFIG_PSTORE=y
CONFIG_PSTORE_CONSOLE=y
CONFIG_PSTORE_RAM=y

140
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
View File

@@ -302,7 +302,6 @@ struct dw_hdmi_qp {
bool sink_is_hdmi;
bool sink_has_audio;
bool dclk_en;
bool frl_switch; /* when frl mode switch color and freq is equal set true */
bool cec_enable;
bool allm_enable;
bool support_hdmi;
@@ -321,6 +320,7 @@ struct dw_hdmi_qp {
u8 phy_mask; /* desired phy int mask settings */
u8 mc_clkdis; /* clock disable register */
u8 hdcp_status;
u8 hdmi_changed_status;
u32 max_ffe_lv;
bool update;
@@ -2263,9 +2263,6 @@ static int dw_hdmi_qp_flt_ltsp(struct dw_hdmi_qp *hdmi)
/* exit frl mode, maybe it was a training failure or hdmi was disabled */
static int dw_hdmi_qp_flt_ltsl(struct dw_hdmi_qp *hdmi)
{
if (hdmi->frl_switch)
return -EINVAL;
drm_scdc_writeb(hdmi->ddc, SCDC_CONFIG_1, 0);
drm_scdc_writeb(hdmi->ddc, SCDC_UPDATE_0, BIT(5));
@@ -2280,9 +2277,6 @@ static int hdmi_set_op_mode(struct dw_hdmi_qp *hdmi,
{
int ret = 0;
if (hdmi->frl_switch)
return 0;
if (!link_cfg->frl_mode) {
dev_info(hdmi->dev, "dw hdmi qp use tmds mode\n");
hdmi_modb(hdmi, 0, AVP_DATAPATH_VIDEO_SWDISABLE, GLOBAL_SWDISABLE);
@@ -2420,9 +2414,6 @@ static void dw_hdmi_qp_flt_work(struct work_struct *p_work)
u8 frl_rate;
int state = LTS1;
if (hdmi->frl_switch)
return;
frl_rate = link_cfg->frl_lanes * link_cfg->rate_per_lane;
while (1) {
@@ -2532,7 +2523,7 @@ static int dw_hdmi_qp_setup(struct dw_hdmi_qp *hdmi,
hdmi->phy.ops->set_mode(hdmi, hdmi->phy.data, HDMI_MODE_FRL_MASK,
link_cfg->frl_mode);
if (!hdmi->update && !hdmi->frl_switch && hdmi->plat_data->link_clk_set)
if (!hdmi->update && hdmi->plat_data->link_clk_set)
hdmi->plat_data->link_clk_set(data, true);
/*
@@ -2601,7 +2592,6 @@ static int dw_hdmi_qp_setup(struct dw_hdmi_qp *hdmi,
ret = hdmi_set_op_mode(hdmi, link_cfg, connector);
if (ret) {
dev_err(hdmi->dev, "%s hdmi set operation mode failed\n", __func__);
hdmi->frl_switch = false;
return ret;
}
} else {
@@ -2613,7 +2603,6 @@ static int dw_hdmi_qp_setup(struct dw_hdmi_qp *hdmi,
dev_info(hdmi->dev, "%s DVI mode\n", __func__);
}
hdmi->frl_switch = false;
return 0;
}
@@ -3158,27 +3147,6 @@ dw_hdmi_connector_best_encoder(struct drm_connector *connector)
return hdmi->bridge.encoder;
}
static bool dw_hdmi_color_changed(struct drm_connector *connector,
struct drm_atomic_state *state)
{
struct dw_hdmi_qp *hdmi =
container_of(connector, struct dw_hdmi_qp, connector);
void *data = hdmi->plat_data->phy_data;
struct drm_connector_state *old_state =
drm_atomic_get_old_connector_state(state, connector);
struct drm_connector_state *new_state =
drm_atomic_get_new_connector_state(state, connector);
bool ret = false;
if (hdmi->plat_data->get_color_changed)
ret = hdmi->plat_data->get_color_changed(data);
if (new_state->colorspace != old_state->colorspace)
ret = true;
return ret;
}
static bool hdr_metadata_equal(struct dw_hdmi_qp *hdmi, const struct drm_connector_state *old_state,
const struct drm_connector_state *new_state)
{
@@ -3231,20 +3199,6 @@ static bool hdr_metadata_equal(struct dw_hdmi_qp *hdmi, const struct drm_connect
return ret;
}
static bool check_hdr_color_change(struct drm_connector_state *old_state,
struct drm_connector_state *new_state,
struct dw_hdmi_qp *hdmi)
{
void *data = hdmi->plat_data->phy_data;
if (!hdr_metadata_equal(hdmi, old_state, new_state)) {
hdmi->plat_data->check_hdr_color_change(new_state, data);
return true;
}
return false;
}
static void dw_hdmi_qp_hdcp_disable(struct dw_hdmi_qp *hdmi,
const struct drm_connector_state *conn_state)
{
@@ -3311,6 +3265,53 @@ static bool dovi_vsif_equal(struct dw_hdmi_qp *hdmi)
}
}
static u8 dw_hdmi_qp_state_changed(struct dw_hdmi_qp *hdmi, struct drm_connector *connector,
struct drm_atomic_state *state)
{
struct drm_connector_state *old_state =
drm_atomic_get_old_connector_state(state, connector);
struct drm_connector_state *new_state =
drm_atomic_get_new_connector_state(state, connector);
void *data = hdmi->plat_data->phy_data;
u32 old_enc_in_encoding = hdmi->hdmi_data.enc_in_encoding;
u32 old_enc_out_encoding = hdmi->hdmi_data.enc_out_encoding;
u32 old_enc_in_bus_format = hdmi->hdmi_data.enc_in_bus_format;
u32 old_enc_out_bus_format = hdmi->hdmi_data.enc_out_bus_format;
if (hdmi->plat_data->update_color_format)
hdmi->plat_data->update_color_format(new_state, data);
if (hdmi->plat_data->get_enc_in_encoding)
hdmi->hdmi_data.enc_in_encoding = hdmi->plat_data->get_enc_in_encoding(data);
if (hdmi->plat_data->get_enc_out_encoding)
hdmi->hdmi_data.enc_out_encoding = hdmi->plat_data->get_enc_out_encoding(data);
if (hdmi->plat_data->get_input_bus_format)
hdmi->hdmi_data.enc_in_bus_format = hdmi->plat_data->get_input_bus_format(data);
if (hdmi->plat_data->get_output_bus_format)
hdmi->hdmi_data.enc_out_bus_format = hdmi->plat_data->get_output_bus_format(data);
hdmi->hdmi_changed_status = 0;
if (!dovi_vsif_equal(hdmi))
hdmi->hdmi_changed_status |= HDMI_VSIF_CHANGED;
if (!hdr_metadata_equal(hdmi, old_state, new_state))
hdmi->hdmi_changed_status |= HDMI_HDR_STATUS_CHANGED;
if (old_enc_in_bus_format != hdmi->hdmi_data.enc_in_bus_format ||
old_enc_out_bus_format != hdmi->hdmi_data.enc_out_bus_format ||
old_enc_in_encoding != hdmi->hdmi_data.enc_in_encoding ||
old_enc_out_encoding != hdmi->hdmi_data.enc_out_encoding) {
hdmi->hdmi_changed_status |= HDMI_COLOR_FMT_CHANGED;
if (hdmi->plat_data->set_prev_bus_format)
hdmi->plat_data->set_prev_bus_format(data, old_enc_out_bus_format);
}
if (dw_hdmi_qp_check_output_type_changed(hdmi))
hdmi->hdmi_changed_status |= HDMI_OUTPUT_MODE_CHANGED;
return hdmi->hdmi_changed_status;
}
static int dw_hdmi_connector_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state)
{
@@ -3414,44 +3415,25 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector,
hdmi->logo_plug_out = true;
}
if (check_hdr_color_change(old_state, new_state, hdmi) || hdmi->logo_plug_out ||
dw_hdmi_color_changed(connector, state) ||
dw_hdmi_qp_check_output_type_changed(hdmi)) {
if (dw_hdmi_qp_state_changed(hdmi, connector, state) || hdmi->logo_plug_out) {
u32 mtmdsclk;
crtc_state = drm_atomic_get_crtc_state(state, crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
if (hdmi->plat_data->update_color_format)
hdmi->plat_data->update_color_format(new_state, data);
if (hdmi->plat_data->get_enc_in_encoding)
hdmi->hdmi_data.enc_in_encoding =
hdmi->plat_data->get_enc_in_encoding(data);
if (hdmi->plat_data->get_enc_out_encoding)
hdmi->hdmi_data.enc_out_encoding =
hdmi->plat_data->get_enc_out_encoding(data);
if (hdmi->plat_data->get_input_bus_format)
hdmi->hdmi_data.enc_in_bus_format =
hdmi->plat_data->get_input_bus_format(data);
if (hdmi->plat_data->get_output_bus_format)
hdmi->hdmi_data.enc_out_bus_format =
hdmi->plat_data->get_output_bus_format(data);
mtmdsclk = hdmi_get_tmdsclock(hdmi, mode.clock);
if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
mtmdsclk /= 2;
if (hdmi->hdmi_data.video_mode.mpixelclock == (mode.clock * 1000) &&
hdmi->hdmi_data.video_mode.mtmdsclock == (mtmdsclk * 1000) &&
mode.clock <= 600000 && !hdmi->disabled && !hdmi->logo_plug_out) {
!hdmi->disabled && !hdmi->logo_plug_out) {
hdmi->update = true;
hdmi_writel(hdmi, 1, PKTSCHED_PKT_CONTROL0);
hdmi_modb(hdmi, PKTSCHED_GCP_TX_EN, PKTSCHED_GCP_TX_EN, PKTSCHED_PKT_EN);
mdelay(50);
} else if (!hdmi->disabled) {
if (hdmi->previous_mode.clock > 600000 && mode.clock > 600000)
hdmi->frl_switch = true;
hdmi->update = false;
crtc_state->mode_changed = true;
hdmi->logo_plug_out = false;
@@ -3468,7 +3450,14 @@ static void dw_hdmi_connector_atomic_commit(struct drm_connector *connector,
container_of(connector, struct dw_hdmi_qp, connector);
if (hdmi->update) {
dw_hdmi_qp_setup(hdmi, hdmi->curr_conn, &hdmi->previous_mode);
if (hdmi->hdmi_changed_status & HDMI_COLOR_FMT_CHANGED) {
if (hdmi->plat_data->set_grf_cfg)
hdmi->plat_data->set_grf_cfg(hdmi->plat_data->phy_data);
hdmi_config_AVI(hdmi, connector, &hdmi->previous_mode);
}
if (hdmi->hdmi_changed_status & HDMI_HDR_STATUS_CHANGED)
hdmi_config_drm_infoframe(hdmi, connector);
msleep(50);
hdmi_writel(hdmi, 2, PKTSCHED_PKT_CONTROL0);
hdmi->update = false;
@@ -3476,7 +3465,7 @@ static void dw_hdmi_connector_atomic_commit(struct drm_connector *connector,
if (!hdmi->disabled) {
set_dw_hdmi_hdcp_enable(hdmi, connector, state);
if (!dovi_vsif_equal(hdmi))
if (hdmi->hdmi_changed_status & HDMI_VSIF_CHANGED)
hdmi_config_vendor_specific_infoframe(hdmi, hdmi->curr_conn,
&hdmi->previous_mode);
}
@@ -3658,8 +3647,6 @@ static void dw_hdmi_qp_bridge_mode_set(struct drm_bridge *bridge,
mutex_lock(&hdmi->mutex);
if (!drm_mode_equal(orig_mode, mode))
hdmi->frl_switch = false;
/* Store the display mode for plugin/DKMS poweron events */
drm_mode_copy(&hdmi->previous_mode, mode);
if (hdmi->plat_data->split_mode || hdmi->plat_data->dual_connector_split)
@@ -3687,9 +3674,6 @@ static void dw_hdmi_qp_bridge_atomic_disable(struct drm_bridge *bridge,
return;
}
if (link_cfg->dsc_mode)
hdmi->frl_switch = false;
/* set avmute */
hdmi_writel(hdmi, 1, PKTSCHED_PKT_CONTROL0);
mdelay(50);
@@ -3708,7 +3692,7 @@ static void dw_hdmi_qp_bridge_atomic_disable(struct drm_bridge *bridge,
mutex_unlock(&hdmi->audio_mutex);
};
if (hdmi->phy.ops->disable && !hdmi->frl_switch) {
if (hdmi->phy.ops->disable) {
hdmi_writel(hdmi, 0, FLT_CONFIG0);
hdmi_writel(hdmi, 0, SCRAMB_CONFIG0);
@@ -3756,7 +3740,7 @@ static void dw_hdmi_qp_bridge_atomic_enable(struct drm_bridge *bridge,
dw_hdmi_qp_setup(hdmi, hdmi->curr_conn, &hdmi->previous_mode);
if ((link_cfg && !link_cfg->frl_mode) || hdmi->frl_switch) {
if (link_cfg && !link_cfg->frl_mode) {
hdmi_writel(hdmi, 2, PKTSCHED_PKT_CONTROL0);
hdmi_modb(hdmi, PKTSCHED_GCP_TX_EN, PKTSCHED_GCP_TX_EN, PKTSCHED_PKT_EN);
}

96
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
View File

@@ -304,6 +304,7 @@ struct dw_hdmi {
bool rxsense; /* rxsense state */
u8 phy_mask; /* desired phy int mask settings */
u8 mc_clkdis; /* clock disable register */
u8 hdmi_changed_status;
spinlock_t audio_lock;
struct mutex audio_mutex;
@@ -3303,19 +3304,6 @@ dw_hdmi_connector_best_encoder(struct drm_connector *connector)
return hdmi->bridge.encoder;
}
static bool dw_hdmi_color_changed(struct drm_connector *connector)
{
struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
connector);
void *data = hdmi->plat_data->phy_data;
bool ret = false;
if (hdmi->plat_data->get_color_changed)
ret = hdmi->plat_data->get_color_changed(data);
return ret;
}
static bool hdr_metadata_equal(struct dw_hdmi *hdmi, const struct drm_connector_state *old_state,
const struct drm_connector_state *new_state)
{
@@ -3368,25 +3356,50 @@ static bool hdr_metadata_equal(struct dw_hdmi *hdmi, const struct drm_connector_
return ret;
}
static bool check_hdr_color_change(struct drm_connector_state *old_state,
struct drm_connector_state *new_state,
struct dw_hdmi *hdmi)
static u8 dw_hdmi_state_changed(struct dw_hdmi *hdmi, struct drm_connector *connector,
struct drm_atomic_state *state)
{
struct drm_connector_state *old_state =
drm_atomic_get_old_connector_state(state, connector);
struct drm_connector_state *new_state =
drm_atomic_get_new_connector_state(state, connector);
void *data = hdmi->plat_data->phy_data;
u32 old_enc_in_encoding = hdmi->hdmi_data.enc_in_encoding;
u32 old_enc_out_encoding = hdmi->hdmi_data.enc_out_encoding;
u32 old_enc_in_bus_format = hdmi->hdmi_data.enc_in_bus_format;
u32 old_enc_out_bus_format = hdmi->hdmi_data.enc_out_bus_format;
if (!hdr_metadata_equal(hdmi, old_state, new_state)) {
hdmi->plat_data->check_hdr_color_change(new_state, data);
return true;
if (hdmi->plat_data->update_color_format)
hdmi->plat_data->update_color_format(new_state, data);
if (hdmi->plat_data->get_enc_in_encoding)
hdmi->hdmi_data.enc_in_encoding = hdmi->plat_data->get_enc_in_encoding(data);
if (hdmi->plat_data->get_enc_out_encoding)
hdmi->hdmi_data.enc_out_encoding = hdmi->plat_data->get_enc_out_encoding(data);
if (hdmi->plat_data->get_input_bus_format)
hdmi->hdmi_data.enc_in_bus_format = hdmi->plat_data->get_input_bus_format(data);
if (hdmi->plat_data->get_output_bus_format)
hdmi->hdmi_data.enc_out_bus_format = hdmi->plat_data->get_output_bus_format(data);
hdmi->hdmi_changed_status = 0;
if (!hdr_metadata_equal(hdmi, old_state, new_state))
hdmi->hdmi_changed_status |= HDMI_HDR_STATUS_CHANGED;
if (old_enc_in_bus_format != hdmi->hdmi_data.enc_in_bus_format ||
old_enc_out_bus_format != hdmi->hdmi_data.enc_out_bus_format ||
old_enc_in_encoding != hdmi->hdmi_data.enc_in_encoding ||
old_enc_out_encoding != hdmi->hdmi_data.enc_out_encoding) {
hdmi->hdmi_changed_status |= HDMI_COLOR_FMT_CHANGED;
if (hdmi->plat_data->set_prev_bus_format)
hdmi->plat_data->set_prev_bus_format(data, old_enc_out_bus_format);
}
return false;
return hdmi->hdmi_changed_status;
}
static int dw_hdmi_connector_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state)
{
struct drm_connector_state *old_state =
drm_atomic_get_old_connector_state(state, connector);
struct drm_connector_state *new_state =
drm_atomic_get_new_connector_state(state, connector);
struct drm_crtc *crtc = new_state->crtc;
@@ -3394,7 +3407,6 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector,
struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
connector);
struct drm_display_mode *mode = NULL;
void *data = hdmi->plat_data->phy_data;
struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
if (!crtc)
@@ -3415,19 +3427,6 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector,
hdmi->curr_conn = connector;
if (hdmi->plat_data->get_enc_in_encoding)
hdmi->hdmi_data.enc_in_encoding =
hdmi->plat_data->get_enc_in_encoding(data);
if (hdmi->plat_data->get_enc_out_encoding)
hdmi->hdmi_data.enc_out_encoding =
hdmi->plat_data->get_enc_out_encoding(data);
if (hdmi->plat_data->get_input_bus_format)
hdmi->hdmi_data.enc_in_bus_format =
hdmi->plat_data->get_input_bus_format(data);
if (hdmi->plat_data->get_output_bus_format)
hdmi->hdmi_data.enc_out_bus_format =
hdmi->plat_data->get_output_bus_format(data);
drm_mode_copy(&hdmi->previous_mode, mode);
vmode->mpixelclock = mode->crtc_clock * 1000;
vmode->previous_pixelclock = mode->clock * 1000;
@@ -3441,30 +3440,14 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector,
drm_scdc_readb(hdmi->ddc, SCDC_TMDS_CONFIG, &val);
/* if plug out before hdmi bind, reset hdmi */
if (vmode->mtmdsclock >= 340000000 && !(val & SCDC_TMDS_BIT_CLOCK_RATIO_BY_40)
&& !hdmi->force_kernel_output)
if ((vmode->mtmdsclock >= 340000000 && !(val & SCDC_TMDS_BIT_CLOCK_RATIO_BY_40)) &&
!hdmi->force_kernel_output)
hdmi->logo_plug_out = true;
}
if (check_hdr_color_change(old_state, new_state, hdmi) || hdmi->logo_plug_out ||
dw_hdmi_color_changed(connector)) {
if (dw_hdmi_state_changed(hdmi, connector, state) || hdmi->logo_plug_out) {
u32 mtmdsclk;
if (hdmi->plat_data->update_color_format)
hdmi->plat_data->update_color_format(new_state, data);
if (hdmi->plat_data->get_enc_in_encoding)
hdmi->hdmi_data.enc_in_encoding =
hdmi->plat_data->get_enc_in_encoding(data);
if (hdmi->plat_data->get_enc_out_encoding)
hdmi->hdmi_data.enc_out_encoding =
hdmi->plat_data->get_enc_out_encoding(data);
if (hdmi->plat_data->get_input_bus_format)
hdmi->hdmi_data.enc_in_bus_format =
hdmi->plat_data->get_input_bus_format(data);
if (hdmi->plat_data->get_output_bus_format)
hdmi->hdmi_data.enc_out_bus_format =
hdmi->plat_data->get_output_bus_format(data);
mtmdsclk = hdmi_get_tmdsclock(hdmi, mode->clock);
if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
@@ -4053,6 +4036,9 @@ static int dw_hdmi_bridge_atomic_check(struct drm_bridge *bridge,
struct dw_hdmi *hdmi = bridge->driver_private;
void *data = hdmi->plat_data->phy_data;
if (!hdmi->next_bridge)
return 0;
if (bridge_state->output_bus_cfg.format == MEDIA_BUS_FMT_FIXED) {
if (hdmi->plat_data->get_output_bus_format)
hdmi->hdmi_data.enc_out_bus_format =

26
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
View File

@@ -3110,21 +3110,6 @@ static int dw_hdmi_link_clk_set(void *data, bool enable)
return 0;
}
static bool
dw_hdmi_rockchip_check_hdr_color_change(struct drm_connector_state *conn_state,
void *data)
{
struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
if (!conn_state || !data)
return false;
if (dw_hdmi_rockchip_check_color(conn_state, hdmi))
return true;
return false;
}
static void dw_hdmi_rockchip_set_prev_bus_format(void *data, unsigned long bus_format)
{
struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
@@ -3713,18 +3698,9 @@ dw_hdmi_rockchip_set_property(struct drm_connector *connector,
if (property == hdmi->color_depth_property) {
hdmi->colordepth = val;
/* If hdmi is disconnected, state->crtc is null */
if (!state->crtc)
return 0;
if (dw_hdmi_rockchip_check_color(state, hdmi))
hdmi->color_changed++;
return 0;
} else if (property == hdmi->hdmi_output_property) {
hdmi->hdmi_output = val;
if (!state->crtc)
return 0;
if (dw_hdmi_rockchip_check_color(state, hdmi))
hdmi->color_changed++;
return 0;
} else if (property == hdmi->quant_range) {
u64 quant_range = hdmi->hdmi_quant_range;
@@ -4590,8 +4566,6 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
plat_data->get_vp_id = dw_hdmi_rockchip_get_vp_id;
plat_data->update_color_format =
dw_hdmi_rockchip_update_color_format;
plat_data->check_hdr_color_change =
dw_hdmi_rockchip_check_hdr_color_change;
plat_data->set_prev_bus_format =
dw_hdmi_rockchip_set_prev_bus_format;
plat_data->set_ddc_io =

68
drivers/media/platform/rockchip/vpss/vpss_offline_v20.c
View File

@@ -946,11 +946,6 @@ static int read_config(struct rkvpss_offline_dev *ofl,
u32 in_ctrl, in_size, in_c_offs, unite_r_offs, val, mask, unite_off = 0, enlarge = 0,
header_size = 0, payload_size = 0;
if (!IS_ALIGNED(cfg->input.stride, 4)) {
v4l2_err(&ofl->v4l2_dev, "input stride %d is not 4-byte aligned\n", cfg->input.stride);
return -EINVAL;
}
in_c_offs = 0;
in_ctrl = 0;
switch (cfg->input.format) {
@@ -1348,17 +1343,10 @@ static int write_config(struct rkvpss_offline_dev *ofl,
cfg->dev_id, i);
cfg->output[i].enable = 0;
}
if (!cfg->output[i].enable)
continue;
ch_en = true;
if (!IS_ALIGNED(cfg->output[i].stride, 4)) {
v4l2_err(&ofl->v4l2_dev, "output stride %d is not 4-byte aligned for ch%d\n",
cfg->output[i].stride, i);
return -EINVAL;
}
if (cfg->output[i].aspt.enable) {
w = cfg->output[i].aspt.width;
h = cfg->output[i].aspt.height;
@@ -2028,6 +2016,34 @@ int rkvpss_check_params(struct rkvpss_offline_dev *ofl,
goto end;
}
/* check input format alignment */
if (cfg->input.format == V4L2_PIX_FMT_FBC0 ||
cfg->input.format == V4L2_PIX_FMT_FBC2 ||
cfg->input.format == V4L2_PIX_FMT_FBC4) {
if (!IS_ALIGNED(cfg->input.width, 64)) {
v4l2_err(&ofl->v4l2_dev,
"dev_id:%d fbc input width %d is not 64 aligned\n",
cfg->dev_id, cfg->input.width);
ret = -EINVAL;
goto end;
}
if (!IS_ALIGNED(cfg->input.height, 4)) {
v4l2_err(&ofl->v4l2_dev,
"dev_id:%d fbc input height %d is not 4 aligned\n",
cfg->dev_id, cfg->input.height);
ret = -EINVAL;
goto end;
}
} else {
if (!IS_ALIGNED(cfg->input.stride, 4)) {
v4l2_err(&ofl->v4l2_dev,
"dev_id:%d input stride %d is not 4-byte aligned\n",
cfg->dev_id, cfg->input.stride);
ret = -EINVAL;
goto end;
}
}
*unite = false;
if (cfg->input.width > RKVPSS_MAX_WIDTH_V20) {
*unite = true;
@@ -2107,6 +2123,34 @@ int rkvpss_check_params(struct rkvpss_offline_dev *ofl,
goto end;
}
/* check output format alignment */
if (cfg->output[i].format == V4L2_PIX_FMT_FBC0 ||
cfg->output[i].format == V4L2_PIX_FMT_FBC2 ||
cfg->output[i].format == V4L2_PIX_FMT_FBC4) {
if (!IS_ALIGNED(cfg->input.width, 64)) {
v4l2_err(&ofl->v4l2_dev,
"dev_id:%d ch:%d fbc output width %d is not 64 aligned\n",
cfg->dev_id, i, cfg->input.width);
ret = -EINVAL;
goto end;
}
if (!IS_ALIGNED(cfg->input.height, 4)) {
v4l2_err(&ofl->v4l2_dev,
"dev_id:%d ch:%d fbc output height %d is not 4 aligned\n",
cfg->dev_id, i, cfg->input.height);
ret = -EINVAL;
goto end;
}
} else {
if (!IS_ALIGNED(cfg->output[i].stride, 4)) {
v4l2_err(&ofl->v4l2_dev,
"dev_id:%d ch:%d output stride %d is not 4-byte aligned\n",
cfg->dev_id, i, cfg->output[i].stride);
ret = -EINVAL;
goto end;
}
}
/* check output size */
if (cfg->output[i].aspt.enable) {
out_width = cfg->output[i].aspt.width;

2
drivers/pci/quirks.c
View File

@@ -2398,7 +2398,6 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10ec, quirk_disable_aspm_l0s);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10f1, quirk_disable_aspm_l0s);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10f4, quirk_disable_aspm_l0s);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1508, quirk_disable_aspm_l0s);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM, 0x4415, quirk_disable_aspm_l0s);
static void quirk_disable_aspm_l0s_l1(struct pci_dev *dev)
{
@@ -2412,6 +2411,7 @@ static void quirk_disable_aspm_l0s_l1(struct pci_dev *dev)
* disable both L0s and L1 for now to be safe.
*/
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x1080, quirk_disable_aspm_l0s_l1);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM, 0x4415, quirk_disable_aspm_l0s_l1);
/*
* Micron 2100AI NVMe doesn't work reliably when ASPM is enabled. Disable

8
drivers/soc/rockchip/rockchip_thunderboot_mmc.c
View File

@@ -16,8 +16,11 @@
#include <linux/soc/rockchip/rockchip_decompress.h>
#include <linux/soc/rockchip/rockchip_thunderboot_crypto.h>
#define SDMMC_CTRL 0x000
#define SDMMC_RINTSTS 0x044
#define SDMMC_STATUS 0x048
#define SDMMC_BMOD 0x080
#define SDMMC_DBADDR 0x088
#define SDMMC_IDSTS 0x08c
#define SDMMC_INTR_ERROR 0xB7C2
@@ -76,6 +79,11 @@ static int rk_tb_mmc_thread(void *p)
goto out;
}
/* Disable the DMA of the MMC controller */
writel(0, regs + SDMMC_CTRL);
writel(0, regs + SDMMC_BMOD);
writel(0, regs + SDMMC_DBADDR);
/* Parse ramdisk addr and help start decompressing */
if (rds && rdd) {
struct resource src, dst;

9
drivers/video/rockchip/mpp/mpp_rkvenc2.c
View File

@@ -1474,13 +1474,10 @@ static void rkvenc2_calc_timeout_thd(struct mpp_dev *mpp)
}
/*
* When vepu_type is RKVENC_VEPU_510, multiplied by 256 core clock cycles,
* else use x1024 core clk cycles
* The frame timeout threshold is *1024 core clock cycles,
* but the sub module timeout threshold is 1/4 frame timeout.
*/
if (hw->vepu_type == RKVENC_VEPU_510)
timeout_thd |= timeout_ms * (clk_get_rate(enc->core_clk_info.clk) / 256000);
else
timeout_thd |= timeout_ms * (clk_get_rate(enc->core_clk_info.clk) / 1024000);
timeout_thd |= timeout_ms * (clk_get_rate(enc->core_clk_info.clk) / 256000);
mpp_write(mpp, RKVENC_WDG, timeout_thd);
}

11
drivers/video/rockchip/mpp/mpp_service.c
View File

@@ -335,6 +335,17 @@ static int mpp_show_device_load(struct seq_file *file, void *v)
if (!mpp)
continue;
if (mpp->load_info.load_time) {
s64 time_diff_us;
time_diff_us = ktime_us_delta(ktime_get(),
mpp->load_info.load_time);
if ((time_diff_us > 2 * srv->load_interval * 1000) ||
list_empty(&queue->session_attach))
mpp_dev_load_clear(mpp);
}
seq_printf(file, "%-25s load: %3d.%02d%% utilization: %3d.%02d%%\n",
dev_name(mpp->dev),
mpp->load_info.load, mpp->load_info.load_frac,

13
drivers/video/rockchip/rga3/rga_drv.c
View File

@@ -159,13 +159,24 @@ int rga_mpi_commit(struct rga_mpi_job_t *mpi_job)
&mpi_cmd.pat,
&cached_cmd->pat);
if ((mpi_job->dst != NULL) && (request->flags & RGA_CONTEXT_DST_MASK))
if ((mpi_job->dst != NULL) && (request->flags & RGA_CONTEXT_DST_MASK)) {
rga_mpi_set_channel_info(RGA_CONTEXT_DST_MASK,
request->flags,
mpi_job->dst,
&mpi_cmd.dst,
&cached_cmd->dst);
/* rotate 90/270 */
if (((mpi_cmd.rotate_mode & 0xf) == 1) &&
((mpi_cmd.sina == 65536 && mpi_cmd.cosa == 0) ||
(mpi_cmd.sina == -65536 && mpi_cmd.cosa == 0))) {
swap(mpi_cmd.dst.act_w, mpi_cmd.dst.act_h);
if (request->flags & RGA_CONTEXT_DST_CACHE_INFO)
swap(cached_cmd->dst.act_w, cached_cmd->dst.act_h);
}
}
/* set buffer handle */
if (mpi_job->dma_buf_src0 != NULL) {
ret = rga_mpi_set_channel_buffer(mpi_job->dma_buf_src0,

6
include/drm/bridge/dw_hdmi.h
View File

@@ -82,6 +82,11 @@ struct platform_device;
#define SUPPORT_HDMI_ALLM BIT(1)
#define DOVI_VSIF_LEN 8
#define HDMI_HDR_STATUS_CHANGED BIT(0)
#define HDMI_COLOR_FMT_CHANGED BIT(1)
#define HDMI_OUTPUT_MODE_CHANGED BIT(2)
#define HDMI_VSIF_CHANGED BIT(3)
enum {
DW_HDMI_RES_8,
DW_HDMI_RES_10,
@@ -279,7 +284,6 @@ struct dw_hdmi_plat_data {
int (*link_clk_set)(void *data, bool enable);
int (*get_vp_id)(struct drm_crtc_state *crtc_state);
void (*update_color_format)(struct drm_connector_state *conn_state, void *data);
bool (*check_hdr_color_change)(struct drm_connector_state *conn_state, void *data);
void (*set_prev_bus_format)(void *data, unsigned long bus_format);
int (*get_colorimetry)(void *data, const struct edid *edid);
void (*set_ddc_io)(void *data, bool enable);

1
include/dt-bindings/suspend/rockchip-rv1126b.h
View File

@@ -24,6 +24,7 @@
#define RKPM_SLP_CLK_GT BIT(16)
#define RKPM_SLP_PMIC_LP BIT(17)
#define RKPM_SLP_32K_IO BIT(23)
#define RKPM_SLP_32K_EXT BIT(24)
#define RKPM_SLP_TIME_OUT_WKUP BIT(25)
#define RKPM_SLP_PMU_DBG BIT(26)