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rk3026: add efuse support

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This commit is contained in:
chenxing
2013-09-26 12:09:27 +08:00
parent ff6ed9e159
commit 018dd2c26f
5 changed files with 51 additions and 0 deletions
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1
arch/arm/mach-rk2928/include/mach/io.h
View File

@@ -183,6 +183,7 @@
#define RK2928_EFUSE_PHYS 0x20090000
#define RK2928_EFUSE_SIZE SZ_4K
#define RK2928_EFUSE_BASE RK2928_IO_TO_VIRT1(RK2928_EFUSE_PHYS)
#define GIC_CPU_BASE RK2928_GICC_BASE
#define GIC_DIST_BASE RK2928_GICD_BASE

1
arch/arm/mach-rk2928/io.c
View File

@@ -51,6 +51,7 @@ static struct map_desc rk2928_io_desc[] __initdata = {
RK2928_DEVICE(DDR_PHY),
RK2928_DEVICE(RKI2C0),
RK2928_DEVICE(RKI2C1),
RK2928_DEVICE(EFUSE),
};
void __init rk2928_map_common_io(void)

3
arch/arm/mach-rk3026/clock_data.c
View File

@@ -2879,6 +2879,7 @@ static void __init rk2928_clock_common_init(unsigned long gpll_rate, unsigned lo
//rk_dump_clock_info();
}
#include <plat/efuse.h>
void __init _rk2928_clock_data_init(unsigned long gpll, unsigned long cpll, int flags)
{
struct clk_lookup *clk;
@@ -2895,6 +2896,8 @@ void __init _rk2928_clock_data_init(unsigned long gpll, unsigned long cpll, int
clk_register(clk->clk);
}
rk_efuse_init();
CLKDATA_DBG("clk_recalculate_root_clocks_nolock\n");
div_clk_for_pll_init();
clk_recalculate_root_clocks_nolock();

41
arch/arm/plat-rk/efuse.c
View File

@@ -17,6 +17,11 @@
#define efuse_writel(val, offset) writel_relaxed(val, RK30_EFUSE_BASE + offset)
#endif
#if defined(CONFIG_ARCH_RK3026)
#define efuse_readl(offset) readl_relaxed(RK2928_EFUSE_BASE + offset)
#define efuse_writel(val, offset) writel_relaxed(val, RK2928_EFUSE_BASE + offset)
#endif
u8 efuse_buf[32 + 1] = {0, 0};
static int efuse_readregs(u32 addr, u32 length, u8 *buf)
@@ -59,7 +64,38 @@ static int efuse_readregs(u32 addr, u32 length, u8 *buf)
void rk_efuse_init(void)
{
#if defined(CONFIG_ARCH_RK3026)
u8 tmp_buf[32];
int i, j, err = 0;
efuse_readregs(0x0, 32, efuse_buf);
/*
* i = 10, need time = 2,860,875 ns
* i = 100, need time = 27,327,000 ns
*/
for (i = 0; i < 10; i++){
efuse_readregs(0x0, 32, tmp_buf);
for (j = 0; j < 32; j++){
if (efuse_buf[j] != tmp_buf[j]){
printk(KERN_WARNING ":%s:rk3026 efuse bit err\n", __func__);
efuse_readregs(0x0, 32, efuse_buf);
i = 0;
err++;
break;
}
}
if (err >= 500) {
printk(KERN_ERR "%s:rk3026 get efuse err\n", __func__);
efuse_buf[5] = 0x00; /* set default SOC version */
efuse_buf[22] = 0x00; /* clean msg about leakage */
break;
}
}
#else
efuse_readregs(0x0, 32, efuse_buf);
#endif
}
int rk_pll_flag(void)
@@ -89,3 +125,8 @@ int rk3028_version_val(void)
{
return efuse_buf[5];
}
int rk3026_version_val(void)
{
return efuse_buf[5];
}

5
arch/arm/plat-rk/include/plat/efuse.h
View File

@@ -4,7 +4,11 @@
#include <asm/types.h>
/* eFuse controller register */
#if defined(CONFIG_ARCH_RK3026)
#define EFUSE_A_SHIFT (8)
#else
#define EFUSE_A_SHIFT (6)
#endif
#define EFUSE_A_MASK (0xFF)
//#define EFUSE_PD (1 << 5)
//#define EFUSE_PS (1 << 4)
@@ -22,5 +26,6 @@ int rk_pll_flag(void);
int rk_tflag(void);
int rk_leakage_val(void);
int rk3028_version_val(void);
int rk3026_version_val(void);
#endif