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rk30_phone:update board file from sdk
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@@ -22,6 +22,7 @@ CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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CONFIG_MODULE_FORCE_UNLOAD=y
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CONFIG_ARCH_RK30=y
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CONFIG_DDR_TYPE_LPDDR=y
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CONFIG_DDR_SDRAM_FREQ=300
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CONFIG_WIFI_CONTROL_FUNC=y
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CONFIG_MACH_RK30_PHONE=y
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@@ -985,17 +985,11 @@ static int l3g4200d_init_platform_hw(void)
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}
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static struct l3g4200d_platform_data l3g4200d_info = {
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.fs_range = 1,
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.axis_map_x = 0,
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.axis_map_y = 1,
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.axis_map_z = 2,
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.negate_x = 1,
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.negate_y = 1,
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.negate_z = 0,
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.orientation = {0, 1, 0, -1, 0, 0, 0, 0, 1},
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.init = l3g4200d_init_platform_hw,
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.x_min = 40,//x_min,y_min,z_min = (0-100) according to hardware
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.y_min = 40,
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.z_min = 20,
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};
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#endif
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@@ -1881,24 +1875,34 @@ static void __init rk30_reserve(void)
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board_mem_reserved();
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}
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static struct cpufreq_frequency_table cpu_dvfs_table[] = {
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//{.frequency = 126*1000, .index = 980*1000},
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//{.frequency = 252*1000, .index = 980*1000},
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//{.frequency = 504*1000, .index = 980*1000},
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{.frequency = 816*1000, .index = 1050*1000},
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{.frequency = 1008*1000,.index = 1150*1000},
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{.frequency = 1200*1000,.index = 1250*1000},
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//{.frequency = 1416*1000,.index = 1280*1000},
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//{.frequency = 1512*1000,.index = 1320*1000},
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//{.frequency = 1560*1000,.index = 1350*1000},
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//{.frequency = 1608*1000,.index = 1350*1000},
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{.frequency = CPUFREQ_TABLE_END},
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/**
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* dvfs_cpu_logic_table: table for arm and logic dvfs
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* @frequency : arm frequency
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* @cpu_volt : arm voltage depend on frequency
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* @logic_volt : logic voltage arm requests depend on frequency
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* comments : min arm/logic voltage
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*/
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static struct dvfs_arm_table dvfs_cpu_logic_table[] = {
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//{.frequency = 252 * 1000, .cpu_volt = 1050 * 1000, .logic_volt = 1050 * 1000},//0.975V/1.000V
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//{.frequency = 504 * 1000, .cpu_volt = 1050 * 1000, .logic_volt = 1050 * 1000},//0.975V/1.000V
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{.frequency = 816 * 1000, .cpu_volt = 1100 * 1000, .logic_volt = 1100 * 1000},
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{.frequency = 1008 * 1000, .cpu_volt = 1150 * 1000, .logic_volt = 1100 * 1000},
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{.frequency = 1200 * 1000, .cpu_volt = 1200 * 1000, .logic_volt = 1100 * 1000},
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//{.frequency = 1272 * 1000, .cpu_volt = 1200 * 1000, .logic_volt = 1150 * 1000},//1.150V/1.100V
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//{.frequency = 1416 * 1000, .cpu_volt = 1275 * 1000, .logic_volt = 1150 * 1000},//1.225V/1.100V
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//{.frequency = 1512 * 1000, .cpu_volt = 1325 * 1000, .logic_volt = 1200 * 1000},//1.300V/1.150V
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//{.frequency = 1608 * 1000, .cpu_volt = 1350 * 1000, .logic_volt = 1200 * 1000},//1.325V/1.175V
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{.frequency = CPUFREQ_TABLE_END},
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};
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#define DVFS_CPU_TABLE_SIZE (ARRAY_SIZE(dvfs_cpu_logic_table))
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static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
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static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
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void __init board_clock_init(void)
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{
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rk30_clock_data_init(periph_pll_297mhz, codec_pll_360mhz, max_i2s_12288khz);
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dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), cpu_dvfs_table);
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rk30_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS);
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dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);
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}
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MACHINE_START(RK30, "RK30board")
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