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clk: rockchip: rk3399: Update the isp clocks

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fixed up the isp clk tree change:
    old:
    aclk_isp0-->
            --> hclk_isp1_wrapper
            --> aclk_isp0_wrapper
            --> aclk_isp0_noc
            --> hclk_isp0
                     --> hclk_isp0_noc
                     --> hclk_isp0_wrapper

    aclk_isp1-->
            --> aclk_isp1_noc
            --> hclk_isp1
                     --> hclk_isp1_noc
                     --> aclk_isp1_wrapper
    new:
    aclk_isp0-->
            --> aclk_isp0_wrapper
            --> aclk_isp0_noc
            --> hclk_isp0
                     --> hclk_isp0_noc
                     --> hclk_isp0_wrapper

    aclk_isp1-->
            --> aclk_isp1_wrapper
            --> aclk_isp1_noc
            --> hclk_isp1
                     --> hclk_isp1_noc
                     --> hclk_isp1_wrapper

Change-Id: Icb86b5f87af8a71de5787be3eebe8adcdaf8885e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2020-01-03 11:08:35 +08:00
parent 120387c548
commit 01ff13404d
1 changed files with 4 additions and 4 deletions
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8
drivers/clk/rockchip/clk-rk3399.c
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@@ -1323,8 +1323,6 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
RK3399_CLKGATE_CON(27), 1, GFLAGS),
GATE(ACLK_ISP0_WRAPPER, "aclk_isp0_wrapper", "aclk_isp0", 0,
RK3399_CLKGATE_CON(27), 5, GFLAGS),
GATE(HCLK_ISP1_WRAPPER, "hclk_isp1_wrapper", "aclk_isp0", 0,
RK3399_CLKGATE_CON(27), 7, GFLAGS),
GATE(HCLK_ISP0_NOC, "hclk_isp0_noc", "hclk_isp0", CLK_IGNORE_UNUSED,
RK3399_CLKGATE_CON(27), 0, GFLAGS),
@@ -1344,11 +1342,13 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
GATE(ACLK_ISP1_NOC, "aclk_isp1_noc", "aclk_isp1", CLK_IGNORE_UNUSED,
RK3399_CLKGATE_CON(27), 3, GFLAGS),
GATE(ACLK_ISP1_WRAPPER, "aclk_isp1_wrapper", "aclk_isp1", 0,
RK3399_CLKGATE_CON(27), 8, GFLAGS),
GATE(HCLK_ISP1_NOC, "hclk_isp1_noc", "hclk_isp1", CLK_IGNORE_UNUSED,
RK3399_CLKGATE_CON(27), 2, GFLAGS),
GATE(ACLK_ISP1_WRAPPER, "aclk_isp1_wrapper", "hclk_isp1", 0,
RK3399_CLKGATE_CON(27), 8, GFLAGS),
GATE(HCLK_ISP1_WRAPPER, "hclk_isp1_wrapper", "hclk_isp1", 0,
RK3399_CLKGATE_CON(27), 7, GFLAGS),
COMPOSITE(SCLK_ISP1, "clk_isp1", mux_pll_src_cpll_gpll_npll_p, 0,
RK3399_CLKSEL_CON(55), 14, 2, MFLAGS, 8, 5, DFLAGS,