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rk2928: i2c init

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kfx
2012-07-11 16:38:16 +08:00
parent c0c865ee36
commit 02b33dc94f
4 changed files with 211 additions and 3 deletions
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5
arch/arm/configs/rk2928_fpga_defconfig
View File

@@ -10,6 +10,7 @@ CONFIG_RESOURCE_COUNTERS=y
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="root"
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=1
# CONFIG_SYSCTL_SYSCALL is not set
@@ -64,6 +65,10 @@ CONFIG_INPUT_EVDEV=y
# CONFIG_CONSOLE_TRANSLATIONS is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C0_CONTROLLER_RK30=y
CONFIG_I2C2_CONTROLLER_RK30=y
# CONFIG_I2C3_RK30 is not set
# CONFIG_ADC is not set
CONFIG_EXPANDED_GPIO_NUM=0
CONFIG_EXPANDED_GPIO_IRQ_NUM=0

201
arch/arm/mach-rk2928/devices.c
View File

@@ -26,7 +26,7 @@
#include <mach/board.h>
#include <mach/dma-pl330.h>
#include <mach/gpio.h>
//#include <mach/iomux.h>
#include <mach/iomux.h>
#include <plat/rk_fiq_debugger.h>
@@ -102,9 +102,208 @@ static void __init rk2928_init_dma(void)
{
platform_add_devices(rk2928_dmacs, ARRAY_SIZE(rk2928_dmacs));
}
// i2c
#ifdef CONFIG_I2C0_CONTROLLER_RK29
#define I2C0_ADAP_TYPE I2C_RK29_ADAP
#define I2C0_START RK2928_I2C0_PHYS
#define I2C0_END RK2928_I2C0_PHYS + SZ_4K - 1
#endif
#ifdef CONFIG_I2C0_CONTROLLER_RK30
#define I2C0_ADAP_TYPE I2C_RK30_ADAP
#define I2C0_START RK2928_RKI2C0_PHYS
#define I2C0_END RK2928_RKI2C0_PHYS + SZ_4K - 1
#endif
#ifdef CONFIG_I2C1_CONTROLLER_RK29
#define I2C1_ADAP_TYPE I2C_RK29_ADAP
#define I2C1_START RK2928_I2C1_PHYS
#define I2C1_END RK2928_I2C1_PHYS + SZ_4K - 1
#endif
#ifdef CONFIG_I2C1_CONTROLLER_RK30
#define I2C1_ADAP_TYPE I2C_RK30_ADAP
#define I2C1_START RK2928_RKI2C1_PHYS
#define I2C1_END RK2928_RKI2C1_PHYS + SZ_4K - 1
#endif
#ifdef CONFIG_I2C2_CONTROLLER_RK29
#define I2C2_ADAP_TYPE I2C_RK29_ADAP
#define I2C2_START RK2928_I2C2_PHYS
#define I2C2_END RK2928_I2C2_PHYS + SZ_4K - 1
#endif
#ifdef CONFIG_I2C2_CONTROLLER_RK30
#define I2C2_ADAP_TYPE I2C_RK30_ADAP
#define I2C2_START RK2928_RKI2C2_PHYS
#define I2C2_END RK2928_RKI2C2_PHYS + SZ_4K - 1
#endif
#ifdef CONFIG_I2C3_CONTROLLER_RK29
#define I2C3_ADAP_TYPE I2C_RK29_ADAP
#define I2C3_START RK2928_I2C3_PHYS
#define I2C3_END RK2928_I2C3_PHYS + SZ_4K - 1
#endif
#ifdef CONFIG_I2C3_CONTROLLER_RK30
#define I2C3_ADAP_TYPE I2C_RK30_ADAP
#define I2C3_START RK2928_RKI2C3_PHYS
#define I2C3_END RK2928_RKI2C3_PHYS + SZ_4K - 1
#endif
#ifdef CONFIG_I2C0_RK30
static struct rk30_i2c_platform_data default_i2c0_data = {
.bus_num = 0,
.is_div_from_arm = 1,
.adap_type = I2C0_ADAP_TYPE,
};
static struct resource resources_i2c0[] = {
{
.start = IRQ_I2C0,
.end = IRQ_I2C0,
.flags = IORESOURCE_IRQ,
},
{
.start = I2C0_START,
.end = I2C0_END,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device device_i2c0 = {
.name = "rk30_i2c",
.id = 0,
.num_resources = ARRAY_SIZE(resources_i2c0),
.resource = resources_i2c0,
.dev = {
.platform_data = &default_i2c0_data,
},
};
#endif
#ifdef CONFIG_I2C1_RK30
static struct rk30_i2c_platform_data default_i2c1_data = {
.bus_num = 1,
.is_div_from_arm = 1,
.adap_type = I2C1_ADAP_TYPE,
};
static struct resource resources_i2c1[] = {
{
.start = IRQ_I2C1,
.end = IRQ_I2C1,
.flags = IORESOURCE_IRQ,
},
{
.start = I2C1_START,
.end = I2C1_END,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device device_i2c1 = {
.name = "rk30_i2c",
.id = 1,
.num_resources = ARRAY_SIZE(resources_i2c1),
.resource = resources_i2c1,
.dev = {
.platform_data = &default_i2c1_data,
},
};
#endif
#ifdef CONFIG_I2C2_RK30
static struct rk30_i2c_platform_data default_i2c2_data = {
.bus_num = 2,
.is_div_from_arm = 0,
.adap_type = I2C2_ADAP_TYPE,
};
static struct resource resources_i2c2[] = {
{
.start = IRQ_I2C2,
.end = IRQ_I2C2,
.flags = IORESOURCE_IRQ,
},
{
.start = I2C2_START,
.end = I2C2_END,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device device_i2c2 = {
.name = "rk30_i2c",
.id = 2,
.num_resources = ARRAY_SIZE(resources_i2c2),
.resource = resources_i2c2,
.dev = {
.platform_data = &default_i2c2_data,
},
};
#endif
#ifdef CONFIG_I2C3_RK30
static struct rk30_i2c_platform_data default_i2c3_data = {
.bus_num = 3,
.is_div_from_arm = 0,
.adap_type = I2C3_ADAP_TYPE,
};
static struct resource resources_i2c3[] = {
{
.start = IRQ_I2C3,
.end = IRQ_I2C3,
.flags = IORESOURCE_IRQ,
},
{
.start = I2C3_START,
.end = I2C3_END,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device device_i2c3 = {
.name = "rk30_i2c",
.id = 3,
.num_resources = ARRAY_SIZE(resources_i2c3),
.resource = resources_i2c3,
.dev = {
.platform_data = &default_i2c3_data,
},
};
#endif
#ifdef CONFIG_I2C_GPIO_RK30
static struct platform_device device_i2c_gpio = {
.name = "i2c-gpio",
.id = 4,
.dev = {
.platform_data = &default_i2c_gpio_data,
},
};
#endif
static void __init rk30_init_i2c(void)
{
#ifdef CONFIG_I2C0_RK30
platform_device_register(&device_i2c0);
#endif
#ifdef CONFIG_I2C1_RK30
platform_device_register(&device_i2c1);
#endif
#ifdef CONFIG_I2C2_RK30
platform_device_register(&device_i2c2);
#endif
#ifdef CONFIG_I2C3_RK30
platform_device_register(&device_i2c3);
#endif
#ifdef CONFIG_I2C_GPIO_RK30
platform_device_register(&device_i2c_gpio);
#endif
}
//end of i2c
static int __init rk2928_init_devices(void)
{
rk2928_init_dma();
rk30_init_i2c();
#if defined(CONFIG_FIQ_DEBUGGER) && defined(DEBUG_UART_PHYS)
rk_serial_debug_init(DEBUG_UART_BASE, IRQ_DEBUG_UART, IRQ_UART_SIGNAL, -1);
#endif

2
drivers/i2c/busses/i2c-rk30.c
View File

@@ -17,7 +17,7 @@
void i2c_adap_sel(struct rk30_i2c *i2c, int nr, int adap_type)
{
writel((1 << I2C_ADAP_SEL_BIT(nr)) | (1 << I2C_ADAP_SEL_MASK(nr)) ,
i2c_writel((1 << I2C_ADAP_SEL_BIT(nr)) | (1 << I2C_ADAP_SEL_MASK(nr)) ,
i2c->con_base);
}

6
drivers/i2c/busses/i2c-rk30.h
View File

@@ -44,8 +44,12 @@
#define rk30_ceil(x, y) \
({ unsigned long __x = (x), __y = (y); (__x + __y - 1) / __y; })
#ifdef CONFIG_ARCH_RK30
#define GRF_I2C_CON_BASE (RK30_GRF_BASE + GRF_SOC_CON1)
#endif
#ifdef CONFIG_ARCH_RK2928
#define GRF_I2C_CON_BASE (RK2928_GRF_BASE + GRF_SOC_CON1)
#endif
#define I2C_ADAP_SEL_BIT(nr) ((nr) + 11)
#define I2C_ADAP_SEL_MASK(nr) ((nr) + 27)
enum rk30_i2c_state {