usb: dwc3: add rockchip specific glue layer

Add rockchip specific glue layer to support USB3 Peripheral mode
and Host mode on rockchip platforms (e.g. rk3399).

The DesignWare USB3 integrated in rockchip SoCs is a configurable
IP Core which can be instantiated as Dual-Role Device (DRD), Host
Only (XHCI) and Peripheral Only configurations.

We use extcon notifier to manage usb cable detection and mode switch.
Enable DWC3 PM runtime auto suspend to allow core enter runtime_suspend
if USB cable is dettached. For host mode, it requires to keep whole
DWC3 controller in reset state to hold pipe power state in P2 before
initializing PHY. And it need to reconfigure USB PHY interface of DWC3
core after deassert DWC3 controller reset.

The current driver supports Host only and Peripheral Only well, for
now, we will add support for OTG after we have it all stabilized.

Change-Id: I821dd19eedec73e6517f0cca184f939a9f313904
Signed-off-by: William Wu <william.wu@rock-chips.com>
This commit is contained in:
William Wu
2019-04-08 11:26:23 +08:00
committed by Tao Huang
parent 816d50d04b
commit 03674e9bd8
2 changed files with 9 additions and 0 deletions

View File

@@ -102,6 +102,14 @@ config USB_DWC3_OF_SIMPLE
Currently supports Xilinx and Qualcomm DWC USB3 IP.
Say 'Y' or 'M' if you have one such device.
config USB_DWC3_ROCKCHIP
tristate "Rockchip Platforms"
depends on EXTCON && (ARCH_ROCKCHIP || COMPILE_TEST)
depends on OF
default USB_DWC3
help
Support of USB2/3 functionality in Rockchip
config USB_DWC3_ST
tristate "STMicroelectronics Platforms"
depends on (ARCH_STI || COMPILE_TEST) && OF

View File

@@ -48,5 +48,6 @@ obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o
obj-$(CONFIG_USB_DWC3_HAPS) += dwc3-haps.o
obj-$(CONFIG_USB_DWC3_KEYSTONE) += dwc3-keystone.o
obj-$(CONFIG_USB_DWC3_OF_SIMPLE) += dwc3-of-simple.o
obj-$(CONFIG_USB_DWC3_ROCKCHIP) += dwc3-rockchip.o
obj-$(CONFIG_USB_DWC3_ST) += dwc3-st.o
obj-$(CONFIG_USB_DWC3_QCOM) += dwc3-qcom.o