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ARM: dts: rockchip: rk3288: add operating-points-v2 for cpu nodes

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Merge the pvtm patch to this patch.

Change-Id: I3cb938fbfaf0ae5957d4832f4ad5671ab9631409
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This commit is contained in:
Jianqun Xu
2022-11-17 11:03:36 +08:00
committed by Tao Huang
parent 3ad628c268
commit 043ddfca3f
1 changed files with 140 additions and 15 deletions
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155
arch/arm/boot/dts/rk3288.dtsi
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@@ -114,53 +114,136 @@
compatible = "operating-points-v2";
opp-shared;
clocks = <&cru PLL_APLL>;
rockchip,avs-scale = <17>;
rockchip,max-volt = <1350000>;
nvmem-cells = <&cpu_leakage>, <&special_function>,
<&performance>, <&process_version>,
<&performance_w>, <&package_info>;
nvmem-cell-names = "leakage", "special",
"performance", "process",
"performance-w", "package";
rockchip,bin-scaling-sel = <
0 17
1 25
2 27
3 31
>;
rockchip,pvtm-voltage-sel = <
0 15300 0
15301 16000 1
16001 17000 2
17001 99999 3
>;
rockchip,pvtm-freq = <408000>;
rockchip,pvtm-volt = <1000000>;
rockchip,pvtm-ch = <0 0>;
rockchip,pvtm-sample-time = <1000>;
rockchip,pvtm-number = <10>;
rockchip,pvtm-error = <1000>;
rockchip,pvtm-ref-temp = <35>;
rockchip,pvtm-temp-prop = <(-18) (-18)>;
rockchip,thermal-zone = "soc-thermal";
opp-126000000 {
opp-hz = /bits/ 64 <126000000>;
opp-microvolt = <900000>;
opp-microvolt = <950000 950000 1350000>;
opp-microvolt-L0 = <950000 950000 1350000>;
opp-microvolt-L1 = <950000 950000 1350000>;
opp-microvolt-L2 = <950000 950000 1350000>;
opp-microvolt-L3 = <950000 950000 1350000>;
clock-latency-ns = <40000>;
};
opp-216000000 {
opp-hz = /bits/ 64 <216000000>;
opp-microvolt = <900000>;
};
opp-312000000 {
opp-hz = /bits/ 64 <312000000>;
opp-microvolt = <900000>;
opp-microvolt = <950000 950000 1350000>;
opp-microvolt-L0 = <950000 950000 1350000>;
opp-microvolt-L1 = <950000 950000 1350000>;
opp-microvolt-L2 = <950000 950000 1350000>;
opp-microvolt-L3 = <950000 950000 1350000>;
clock-latency-ns = <40000>;
};
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <900000>;
opp-microvolt = <975000 975000 1350000>;
opp-microvolt-L0 = <975000 975000 1350000>;
opp-microvolt-L1 = <950000 950000 1350000>;
opp-microvolt-L2 = <950000 950000 1350000>;
opp-microvolt-L3 = <950000 950000 1350000>;
clock-latency-ns = <40000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
opp-microvolt = <975000 975000 1350000>;
opp-microvolt-L0 = <975000 975000 1350000>;
opp-microvolt-L1 = <950000 950000 1350000>;
opp-microvolt-L2 = <950000 950000 1350000>;
opp-microvolt-L3 = <950000 950000 1350000>;
clock-latency-ns = <40000>;
};
opp-696000000 {
opp-hz = /bits/ 64 <696000000>;
opp-microvolt = <950000>;
opp-microvolt = <975000 975000 1350000>;
opp-microvolt-L0 = <975000 975000 1350000>;
opp-microvolt-L1 = <950000 950000 1350000>;
opp-microvolt-L2 = <950000 950000 1350000>;
opp-microvolt-L3 = <950000 950000 1350000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1000000>;
opp-microvolt = <1075000 1075000 1350000>;
opp-microvolt-L0 = <1075000 1075000 1350000>;
opp-microvolt-L1 = <1050000 1050000 1350000>;
opp-microvolt-L2 = <1000000 1000000 1350000>;
opp-microvolt-L3 = <950000 950000 1350000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1050000>;
opp-microvolt = <1150000 1150000 1350000>;
opp-microvolt-L0 = <1150000 1150000 1350000>;
opp-microvolt-L1 = <1100000 1100000 1350000>;
opp-microvolt-L2 = <1050000 1050000 1350000>;
opp-microvolt-L3 = <1000000 1000000 1350000>;
clock-latency-ns = <40000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1100000>;
opp-microvolt = <1200000 1200000 1350000>;
opp-microvolt-L0 = <1200000 1200000 1350000>;
opp-microvolt-L1 = <1150000 1150000 1350000>;
opp-microvolt-L2 = <1100000 1100000 1350000>;
opp-microvolt-L3 = <1050000 1050000 1350000>;
clock-latency-ns = <40000>;
};
opp-1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1200000>;
opp-microvolt = <1300000 1300000 1350000>;
opp-microvolt-L0 = <1300000 1300000 1350000>;
opp-microvolt-L1 = <1250000 1250000 1350000>;
opp-microvolt-L2 = <1200000 1200000 1350000>;
opp-microvolt-L3 = <1150000 1150000 1350000>;
clock-latency-ns = <40000>;
};
opp-1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1300000>;
opp-microvolt = <1350000 1350000 1350000>;
opp-microvolt-L0 = <1350000 1350000 1350000>;
opp-microvolt-L1 = <1300000 1300000 1350000>;
opp-microvolt-L2 = <1250000 1250000 1350000>;
opp-microvolt-L3 = <1200000 1200000 1350000>;
clock-latency-ns = <40000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1350000>;
opp-microvolt = <1350000 1350000 1350000>;
opp-microvolt-L0 = <1350000 1350000 1350000>;
opp-microvolt-L1 = <1350000 1350000 1350000>;
opp-microvolt-L2 = <1300000 1300000 1350000>;
opp-microvolt-L3 = <1250000 1250000 1350000>;
clock-latency-ns = <40000>;
};
};
@@ -1035,6 +1118,28 @@
reset-names = "phy-reset";
};
};
pvtm: pvtm {
compatible = "rockchip,rk3288-pvtm";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pvtm@0 {
reg = <0>;
clocks = <&cru SCLK_PVTM_CORE>;
clock-names = "clk";
resets = <&cru SRST_CORE_PVTM>;
reset-names = "rst";
};
pvtm@1 {
reg = <1>;
clocks = <&cru SCLK_PVTM_GPU>;
clock-names = "clk";
resets = <&cru SRST_GPU_PVTM>;
reset-names = "rst";
};
};
};
wdt: watchdog@ff800000 {
@@ -1744,12 +1849,32 @@
clocks = <&cru PCLK_EFUSE256>;
clock-names = "pclk_efuse";
special_function: special-function@5 {
reg = <0x5 0x1>;
bits = <4 4>;
};
package_info: package-info@5 {
reg = <0x5 0x1>;
bits = <2 2>;
};
process_version: process-version@6 {
reg = <0x6 0x1>;
bits = <0 4>;
};
cpu_id: cpu-id@7 {
reg = <0x07 0x10>;
};
cpu_leakage: cpu_leakage@17 {
reg = <0x17 0x1>;
};
performance_w: performance@1c {
reg = <0x1c 0x1>;
bits = <4 3>;
};
performance: performance@1d {
reg = <0x1d 0x1>;
bits = <4 3>;
};
};
gic: interrupt-controller@ffc01000 {