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arm64: dts: g12a/g12b: correct i2c timeout interrupt number

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PD#169865: arm64: dts: g12a/g12b: correct i2c timeout interrupt number

I2c timeout interrupt number has changed since g12a SoC, the timeout
interrupt have not used in i2c controller driver, the function will
probably be added later.

Change-Id: I2aca009bacfda0bc2636e48032de71c9aa42cacb
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
This commit is contained in:
Jian Hu
2018-07-10 19:43:49 +08:00
committed by Yixun Lan
parent 8c4f33e3a9
commit 04bc92f23a
2 changed files with 12 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm64/boot/dts/amlogic/mesong12a.dtsi
View File

@@ -586,7 +586,7 @@
status = "disabled";
reg = <0x0 0x1f000 0x0 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
<GIC_SPI 91 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
@@ -598,7 +598,7 @@
status = "disabled";
reg = <0x0 0x1e000 0x0 0x20>;
interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
<GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
@@ -610,7 +610,7 @@
status = "disabled";
reg = <0x0 0x1d000 0x0 0x20>;
interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
<GIC_SPI 94 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
@@ -622,7 +622,7 @@
status = "disabled";
reg = <0x0 0x1c000 0x0 0x20>;
interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
<GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
@@ -719,7 +719,8 @@
compatible = "amlogic,meson-g12a-i2c";
status = "disabled";
reg = <0x0 0x05000 0x0 0x20>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 201 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;

11
arch/arm64/boot/dts/amlogic/mesong12b.dtsi
View File

@@ -567,7 +567,7 @@
status = "disabled";
reg = <0x0 0x1f000 0x0 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
<GIC_SPI 91 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
@@ -579,7 +579,7 @@
status = "disabled";
reg = <0x0 0x1e000 0x0 0x20>;
interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
<GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
@@ -591,7 +591,7 @@
status = "disabled";
reg = <0x0 0x1d000 0x0 0x20>;
interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
<GIC_SPI 94 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
@@ -603,7 +603,7 @@
status = "disabled";
reg = <0x0 0x1c000 0x0 0x20>;
interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
<GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
@@ -700,7 +700,8 @@
compatible = "amlogic,meson-g12b-i2c";
status = "disabled";
reg = <0x0 0x05000 0x0 0x20>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 201 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;