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drm/i915: Downgrade Gen9 Plane WM latency error

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[ Upstream commit 86c1c87d0e ]

According to intel_read_wm_latency() it is perfectly legal for one WM
and all subsequent levels to be 0 (and the deeper powersaving states
disabled), so don't shout *ERROR*, over and over again.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180726161527.10516-1-chris@chris-wilson.co.uk
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
This commit is contained in:
Chris Wilson
2018-07-26 17:15:27 +01:00
committed by Greg Kroah-Hartman
parent 02cf6220e4
commit 04ce7a7326
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/intel_pm.c
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@@ -2934,8 +2934,8 @@ static void intel_print_wm_latency(struct drm_i915_private *dev_priv,
unsigned int latency = wm[level];
if (latency == 0) {
DRM_ERROR("%s WM%d latency not provided\n",
name, level);
DRM_DEBUG_KMS("%s WM%d latency not provided\n",
name, level);
continue;
}