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ASoC: rockchip: rk817-codec: Add version recognition and set up different PLL configurations
Signed-off-by: Binyuan Lan <lby@rock-chips.com> Change-Id: I0209db73994e428b25e9cba4417f0f3dd98fb3dc
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@@ -88,6 +88,7 @@ struct rk817_codec_priv {
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struct gpio_desc *hp_ctl_gpio;
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int spk_mute_delay;
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int hp_mute_delay;
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int chip_ver;
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};
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static const struct reg_default rk817_reg_defaults[] = {
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@@ -153,6 +154,8 @@ static bool rk817_volatile_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case RK817_CODEC_DTOP_LPT_SRST:
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case RK817_PMIC_CHIP_NAME:
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case RK817_PMIC_CHIP_VER:
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return true;
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default:
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return false;
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@@ -218,6 +221,8 @@ static bool rk817_codec_register(struct device *dev, unsigned int reg)
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case RK817_CODEC_DI2S_TXCR1:
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case RK817_CODEC_DI2S_TXCR2:
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case RK817_CODEC_DI2S_TXCR3_TXCMD:
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case RK817_PMIC_CHIP_NAME:
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case RK817_PMIC_CHIP_VER:
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return true;
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default:
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return false;
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@@ -858,6 +863,7 @@ static int rk817_hw_params(struct snd_pcm_substream *substream,
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_component *component = asoc_rtd_to_codec(rtd, 0)->component;
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struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component);
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unsigned int rate = params_rate(params);
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unsigned char apll_cfg3_val;
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unsigned char dtop_digen_sr_lmt0;
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@@ -865,6 +871,16 @@ static int rk817_hw_params(struct snd_pcm_substream *substream,
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DBG("%s : sample rate = %dHz\n", __func__, rate);
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if (rk817->chip_ver <= 0x4) {
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DBG("%s: SMIC TudorAG and previous versions\n", __func__);
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snd_soc_component_write(component, RK817_CODEC_APLL_CFG0, 0x0c);
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snd_soc_component_write(component, RK817_CODEC_APLL_CFG4, 0x95);
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} else {
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DBG("%s: SMIC TudorAG version later\n", __func__);
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snd_soc_component_write(component, RK817_CODEC_APLL_CFG0, 0x04);
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snd_soc_component_write(component, RK817_CODEC_APLL_CFG4, 0xa5);
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}
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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dtop_digen_clke = DAC_DIG_CLK_EN;
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else
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@@ -1084,6 +1100,8 @@ static int rk817_resume(struct snd_soc_component *component)
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static int rk817_probe(struct snd_soc_component *component)
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{
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struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component);
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int chip_name = 0;
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int chip_ver = 0;
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DBG("%s\n", __func__);
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@@ -1097,6 +1115,11 @@ static int rk817_probe(struct snd_soc_component *component)
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rk817->playback_path = OFF;
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rk817->capture_path = MIC_OFF;
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chip_name = snd_soc_component_read(component, RK817_PMIC_CHIP_NAME);
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chip_ver = snd_soc_component_read(component, RK817_PMIC_CHIP_VER);
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rk817->chip_ver = (chip_ver & 0x0f);
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dev_info(component->dev, "%s: chip_name:0x%x, chip_ver:0x%x\n", __func__, chip_name, chip_ver);
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rk817_reset(component);
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snd_soc_add_component_controls(component, rk817_snd_path_controls,
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ARRAY_SIZE(rk817_snd_path_controls));
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@@ -1233,7 +1256,7 @@ static const struct regmap_config rk817_codec_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.reg_stride = 1,
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.max_register = 0x4f,
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.max_register = 0xfe,
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.cache_type = REGCACHE_FLAT,
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.volatile_reg = rk817_volatile_register,
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.writeable_reg = rk817_codec_register,
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@@ -74,6 +74,8 @@
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#define RK817_CODEC_DI2S_TXCR1 (RK817_CODEC_BASE + 0x4d)
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#define RK817_CODEC_DI2S_TXCR2 (RK817_CODEC_BASE + 0x4e)
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#define RK817_CODEC_DI2S_TXCR3_TXCMD (RK817_CODEC_BASE + 0x4f)
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#define RK817_PMIC_CHIP_NAME (RK817_CODEC_BASE + 0xed)
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#define RK817_PMIC_CHIP_VER (RK817_CODEC_BASE + 0xee)
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/* RK817_CODEC_DTOP_DIGEN_CLKE */
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#define ADC_DIG_CLK_MASK (0xf << 4)
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