dt-bindings: PCI: microchip,pcie-host: fix missing clocks properties

Recent versions of dt-schema warn about unevaluatedProperties:
arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: pcie@2000000000: Unevaluated properties are not allowed ('clock-names', 'clocks', 'legacy-interrupt-controller', 'microchip,axi-m-atr0' were unexpected)
        From schema: Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml

The clocks are required to enable interfaces between the FPGA fabric
and the core complex, so add them to the binding.

Link: https://lore.kernel.org/r/20220819231415.3860210-3-mail@conchuod.ie
Fixes: 6ee6c89aac ("dt-bindings: PCI: microchip: Add Microchip PolarFire host binding")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Conor Dooley
2022-08-20 00:14:11 +01:00
committed by Lorenzo Pieralisi
parent b408fad61d
commit 05a5741019

View File

@@ -25,6 +25,33 @@ properties:
- const: cfg
- const: apb
clocks:
description:
Fabric Interface Controllers, FICs, are the interface between the FPGA
fabric and the core complex on PolarFire SoC. The FICs require two clocks,
one from each side of the interface. The "FIC clocks" described by this
property are on the core complex side & communication through a FIC is not
possible unless it's corresponding clock is enabled. A clock must be
enabled for each of the interfaces the root port is connected through.
This could in theory be all 4 interfaces, one interface or any combination
in between.
minItems: 1
items:
- description: FIC0's clock
- description: FIC1's clock
- description: FIC2's clock
- description: FIC3's clock
clock-names:
description:
As any FIC connection combination is possible, the names should match the
order in the clocks property and take the form "ficN" where N is a number
0-3
minItems: 1
maxItems: 4
items:
pattern: '^fic[0-3]$'
interrupts:
minItems: 1
items: