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clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL

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[ Upstream commit 2f290b7c67 ]

The "rate" parameter in meson_clk_pll_set_rate() contains the new rate.
Retrieve the old rate with clk_hw_get_rate() so we don't inifinitely try
to switch from the new rate to the same rate again.

Fixes: 7a29a86943 ("clk: meson: Add support for Meson clock controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201226121556.975418-2-martin.blumenstingl@googlemail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Martin Blumenstingl
2020-12-26 13:15:54 +01:00
committed by Chris
parent b480df56cb
commit 05c85a8c77
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/meson/clk-pll.c
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@@ -145,7 +145,7 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
if (parent_rate == 0 || rate == 0)
return -EINVAL;
old_rate = rate;
old_rate = clk_hw_get_rate(hw);
rate_set = meson_clk_get_pll_settings(pll, rate);
if (!rate_set)