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drm/rockchip: dw-mipi-dsi: fix escape clock rate

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Use the same calculation as the vendor kernel to derive the escape clock
speed.

Change-Id: I7aff4dc7fa9598df164148eaf44304caad704f23
Signed-off-by: xubilv <xbl@rock-chips.com>
This commit is contained in:
xubilv
2017-07-18 11:24:39 +08:00
committed by Huang, Tao
parent 6d82179b6f
commit 0734b0f474
1 changed files with 6 additions and 1 deletions
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7
drivers/gpu/drm/rockchip/dw-mipi-dsi.c
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@@ -749,11 +749,16 @@ static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
{
u32 esc_clk_div;
dsi_write(dsi, DSI_PWR_UP, RESET);
dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
| PHY_RSTZ | PHY_SHUTDOWNZ);
/* The maximum value of the escape clock frequency is 20MHz */
esc_clk_div = DIV_ROUND_UP(dsi->lane_mbps >> 3, 20);
dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) |
TX_ESC_CLK_DIVIDSION(7));
TX_ESC_CLK_DIVIDSION(esc_clk_div));
}
static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,