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media: rockchip: isp: fix b3dldc for isp35

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Change-Id: I277bc48f132487811c28c27e6f443a4db33df9f2
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
This commit is contained in:
Cai YiWei
2025-06-12 17:31:32 +08:00
parent 59f68a3106
commit 08dcc444a4
6 changed files with 37 additions and 12 deletions
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36
drivers/media/platform/rockchip/isp/isp_params_v35.c
View File

@@ -4002,6 +4002,9 @@ isp_bay3d_config(struct rkisp_isp_params_vdev *params_vdev,
arg->btnr_ldc_wrap_ext_bound_offset;
isp3_param_write(params_vdev, value, ISP35_B3DLDC_EXTBOUND1, id);
value = arg->b3dldc_last;
isp3_param_write(params_vdev, value, ISP35_B3DLDC_FFFF_OFF, id);
ctrl = 0;
if (arg->b3dldch_en) {
value = priv->buf_b3dldc[id][buf_idx].dma_addr + head->data_oft;
@@ -4029,6 +4032,8 @@ isp_bay3d_config(struct rkisp_isp_params_vdev *params_vdev,
ISP35_B3DLDC_EN;
}
isp3_param_write(params_vdev, ctrl, ISP35_B3DLDC_CTRL, id);
if (dev->hw_dev->is_single)
isp3_param_set_bits(params_vdev, MI_WR_CTRL2, ISP3X_BAY3D_RDSELF_UPD, id);
}
static void
@@ -4050,6 +4055,10 @@ isp_bay3d_enable(struct rkisp_isp_params_vdev *params_vdev, bool en, u32 id)
dev_err(dev->dev, "no bay3d buffer available\n");
return;
}
value = priv->bay3d_iir_stride;
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_IIR_WR_LENGTH, id);
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_IIR_RD_LENGTH, id);
isp3_param_write(params_vdev, value, ISP35_B3DLDC_WR_STRIDE, id);
priv->bay3d_iir_idx = 0;
priv->bay3d_iir_cur_idx = 0;
@@ -4058,12 +4067,14 @@ isp_bay3d_enable(struct rkisp_isp_params_vdev *params_vdev, bool en, u32 id)
value = priv->buf_bay3d_iir[0].dma_addr + value * id;
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_IIR_RD_BASE, id);
if (priv->bay3d_iir_rw_fmt == 3) {
isp3_param_write(params_vdev, priv->bay3d_iir_pk_stride, ISP3X_MI_BAY3D_IIR_WR_LENGTH, id);
isp3_param_write(params_vdev, value, ISP35_B3DLDC_WR_ADDR, id);
if (b3dldc_ctrl & ISP35_B3DLDC_EN) {
b3dldc_ctrl |= ISP35_B3DLDC_FORCE_UPD;
isp3_param_write(params_vdev, b3dldc_ctrl, ISP35_B3DLDC_CTRL, id);
}
value += priv->bay3d_iir_offs;
value += priv->bay3d_iir_pk_offs;
}
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_IIR_WR_BASE, id);
if (priv->buf_aiisp[0].mem_priv) {
@@ -4073,10 +4084,6 @@ isp_bay3d_enable(struct rkisp_isp_params_vdev *params_vdev, bool en, u32 id)
value = priv->buf_aiisp[0].stride;
isp3_param_write(params_vdev, value, ISP3X_MI_DBR_RD_LENGTH, id);
}
value = priv->bay3d_iir_stride;
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_IIR_WR_LENGTH, id);
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_IIR_RD_LENGTH, id);
isp3_param_write(params_vdev, value, ISP35_B3DLDC_WR_STRIDE, id);
priv->bay3d_ds_idx = 0;
priv->bay3d_ds_cur_idx = 0;
@@ -5331,7 +5338,8 @@ rkisp_params_init_bnr_buf_v35(struct rkisp_isp_params_vdev *params_vdev,
w32 = ALIGN(w, 32);
w128 = ALIGN(w, 128);
priv->bay3d_iir_stride = 0;
priv->bay3d_iir_offs = 0;
priv->bay3d_iir_pk_stride = 0;
priv->bay3d_iir_pk_offs = 0;
switch (iir_rw_fmt) {
case 0:
stride = ALIGN(w16 * 7 / 4, 16);
@@ -5345,15 +5353,22 @@ rkisp_params_init_bnr_buf_v35(struct rkisp_isp_params_vdev *params_vdev,
priv->bay3d_iir_stride = stride;
break;
case 3:
/* pk_wr */
stride = ALIGN(w128 / 8 * 2, 16);
priv->bay3d_iir_pk_stride = stride;
/* iir_rw + pk_rd */
stride = ALIGN((w32 + w128 / 8) * 2, 16);
priv->bay3d_iir_stride = stride;
priv->bay3d_iir_offs = w32 * 2;
/* iir_rw + pk_rd + pk_wr */
priv->bay3d_iir_pk_offs = priv->bay3d_iir_stride * h;
size = (priv->bay3d_iir_stride + priv->bay3d_iir_pk_stride) * h;
break;
default:
dev_err(dev->dev, "bay3d iir_rw_fmt:%d error\n", iir_rw_fmt);
return -EINVAL;
}
size = ALIGN(stride * h, 16);
if (iir_rw_fmt != 3)
size = ALIGN(stride * h, 16);
priv->bay3d_iir_size = size;
if (dev->unite_div > ISP_UNITE_DIV1)
size *= dev->unite_div;
@@ -6490,7 +6505,7 @@ rkisp_params_isr_v35(struct rkisp_isp_params_vdev *params_vdev, u32 isp_mis)
val += i * priv->bay3d_iir_size;
if (priv->bay3d_iir_rw_fmt == 3) {
isp3_param_write(params_vdev, val, ISP35_B3DLDC_WR_ADDR, i);
val += priv->bay3d_iir_offs;
val += priv->bay3d_iir_pk_offs;
}
isp3_param_write(params_vdev, val, ISP3X_MI_BAY3D_IIR_WR_BASE, i);
}
@@ -9041,6 +9056,9 @@ static void rkisp_get_params_bay3d(struct rkisp_isp_params_vdev *params_vdev,
arg->btnr_ldc_wrap_ext_bound_offset = val & 0xffff;
arg->btnr_ldcltp_mode = !!(val & BIT(16));
val = isp3_param_read(params_vdev, ISP35_B3DLDC_FFFF_OFF, 0);
arg->b3dldc_last = val & 0x1ff;
val = priv->buf_b3dldc_idx[0];
arg->lut_buf_fd = priv->buf_b3dldc[0][val].dma_fd;
}

3
drivers/media/platform/rockchip/isp/isp_params_v35.h
View File

@@ -57,7 +57,8 @@ struct rkisp_isp_params_val_v35 {
struct rkisp_dummy_buffer *pbuf_y_src;
u32 bay3d_iir_rw_fmt;
u32 bay3d_iir_offs;
u32 bay3d_iir_pk_offs;
u32 bay3d_iir_pk_stride;
u32 bay3d_iir_stride;
u32 bay3d_iir_size;
int bay3d_iir_cnt;

5
drivers/media/platform/rockchip/isp/procfs.c
View File

@@ -1189,11 +1189,14 @@ static void isp35_show(struct rkisp_device *dev, struct seq_file *p)
val, dev->hdr_wrap_line);
val = rkisp_read(dev, ISP33_BAY3D_CTRL0, false);
tmp = rkisp_read(dev, ISP33_BAY3D_CTRL2, false);
seq_printf(p, "%-10s %s(0x%x) bypass:%d iir_rw_fmt:%d b3dldch:0x%x b3dldcv:0x%x\n"
seq_printf(p, "%-10s %s(0x%x) bypass:%d iir_rw_fmt:%d\n"
"\t b3dldch:0x%x map_err:%d b3dldcv:0x%x map_err:%d\n"
"\t lp_en(me_off:%d gic:%d bf:%d avg:%d) size(iir:%d ds:%d wgt:%d)\n",
"BAY3D", (val & 1) ? "ON" : "OFF", val, !!(val & BIT(1)), (val >> 13) & 0x7,
rkisp_read(dev, ISP35_B3DLDC_ADR_STS, false),
!!(rkisp_read(dev, ISP35_B3DLDC_ADR_STS, true) & BIT(29)),
rkisp_read(dev, ISP35_B3DLDC_CTRL, false),
!!(rkisp_read(dev, ISP35_B3DLDC_CTRL, true) & BIT(12)),
!(val & BIT(8)), !!(tmp & BIT(20)), !!(tmp & BIT(21)), !!(tmp & BIT(22)),
priv->buf_bay3d_iir[0].size, priv->buf_bay3d_ds[0].size, priv->buf_bay3d_wgt[0].size);
val = rkisp_read(dev, ISP35_AI_CTRL, false);

1
drivers/media/platform/rockchip/isp/regs_v3x.h
View File

@@ -2090,6 +2090,7 @@
#define ISP35_B3DLDC_CTRL (ISP3X_LDCH_BASE + 0x00080)
#define ISP35_B3DLDC_WR_ADDR (ISP3X_LDCH_BASE + 0x000a8)
#define ISP35_B3DLDC_WR_STRIDE (ISP3X_LDCH_BASE + 0x000ac)
#define ISP35_B3DLDC_FFFF_OFF (ISP3X_LDCH_BASE + 0x000b0)
#define ISP35_B3DLDC_ADR_STS (ISP3X_LDCH_BASE + 0x000e0)
#define ISP35_B3DLDC_EXTBOUND1 (ISP3X_LDCH_BASE + 0x000e8)

2
include/uapi/linux/rk-isp2-config.h
View File

@@ -331,7 +331,7 @@
#define ISP2X_FBCBUF_FD_NUM 64
#define ISP2X_MESH_BUF_NUM 2
#define ISP2X_MESH_BUF_NUM 3
#define RKISP_BUFFER_MAX 8
struct rkisp_buf_info {

2
include/uapi/linux/rk-isp35-config.h
View File

@@ -604,6 +604,8 @@ struct isp35_bay3d_cfg {
/* B3DLDC_EXTBOUND1 */
__u8 btnr_ldcltp_mode;
__u16 btnr_ldc_wrap_ext_bound_offset;
/* B3DLDC_FFFF_OFF */
__u16 b3dldc_last;
/* lut_ldch:offset data_oft; lut_ldcv:offset data1_oft */
__s32 lut_buf_fd;
} __attribute__ ((packed));