mtd: add a new slc nand and avoid the 2nd column in some command

PD#158989: mtd: add a new slc nand and avoid the 2nd column in some command

new slc nand: F59L1G81MB (2M)(same id with F59L1G81MA (2Y),
called a joint name of F59L1G81Mxxx).
We do not send the 2nd column in some command such as: read id,
read parameter etc

Change-Id: Ibeac872231c880efde8a38e6344c326043e7d7dc
Signed-off-by: Yi Zeng <yi.zeng@amlogic.com>
This commit is contained in:
Yi Zeng
2018-01-18 10:53:29 +08:00
committed by Jianxin Pan
parent 5f115a3e40
commit 093712257d
2 changed files with 16 additions and 9 deletions

View File

@@ -875,11 +875,13 @@ void aml_nand_base_command(struct aml_nand_chip *aml_chip,
/* Serially input address */
if (column != -1) {
/* Adjust columns for 16 bit buswidth */
if (chip->options & NAND_BUSWIDTH_16)
if (chip->options & NAND_BUSWIDTH_16 &&
!nand_opcode_8bits(command))
column >>= 1;
chip->cmd_ctrl(mtd, column, ctrl);
ctrl &= ~NAND_CTRL_CHANGE;
chip->cmd_ctrl(mtd, column >> 8, ctrl);
if (!nand_opcode_8bits(command))
chip->cmd_ctrl(mtd, column >> 8, ctrl);
}
if (page_addr != -1) {
chip->cmd_ctrl(mtd, plane_page_addr, ctrl);
@@ -982,11 +984,13 @@ void aml_nand_base_command(struct aml_nand_chip *aml_chip,
/* Serially input address */
if (column != -1) {
/* Adjust columns for 16 bit buswidth */
if (chip->options & NAND_BUSWIDTH_16)
if (chip->options & NAND_BUSWIDTH_16 &&
!nand_opcode_8bits(command))
column >>= 1;
chip->cmd_ctrl(mtd, column, ctrl);
ctrl &= ~NAND_CTRL_CHANGE;
chip->cmd_ctrl(mtd, column >> 8, ctrl);
if (!nand_opcode_8bits(command))
chip->cmd_ctrl(mtd, column >> 8, ctrl);
}
if (page_addr != -1) {
/* plane_page_addr |= */
@@ -1042,11 +1046,13 @@ void aml_nand_base_command(struct aml_nand_chip *aml_chip,
/* Serially input address */
if (column != -1) {
/* Adjust columns for 16 bit buswidth */
if (chip->options & NAND_BUSWIDTH_16)
if (chip->options & NAND_BUSWIDTH_16 &&
!nand_opcode_8bits(command))
column >>= 1;
chip->cmd_ctrl(mtd, column, ctrl);
ctrl &= ~NAND_CTRL_CHANGE;
chip->cmd_ctrl(mtd, column >> 8, ctrl);
if (!nand_opcode_8bits(command))
chip->cmd_ctrl(mtd, column >> 8, ctrl);
}
if (page_addr != -1) {
@@ -1148,7 +1154,8 @@ void aml_nand_command(struct mtd_info *mtd,
aml_chip->page_addr |=
(1 << aml_chip->internal_chip_shift)*aml_chip->internal_chipnr;
}
}
} else
aml_chip->page_addr = page_addr;
/* Emulate NAND_CMD_READOOB */
if (command == NAND_CMD_READOOB) {
@@ -2065,7 +2072,7 @@ int aml_nand_init(struct aml_nand_chip *aml_chip)
*/
chip->select_chip = aml_nand_select_chip;
chip->cmd_ctrl = aml_nand_cmd_ctrl;
chip->cmdfunc = aml_nand_command;
/* chip->cmdfunc = aml_nand_command; */
chip->read_byte = aml_platform_read_byte;
controller->chip_num = plat->platform_nand_data.chip.nr_chips;

View File

@@ -377,7 +377,7 @@ struct aml_nand_flash_dev aml_nand_flash_ids[] = {
0,
0,
(NAND_TIMING_MODE5 | NAND_ECC_BCH8_MODE)},
{"ESMT SLC 128MiB 3.3V 8-bit F59L1G81MA (2Y)",
{"ESMT SLC 128MiB 3.3V 8-bit F59L1G81Mxxx",
{NAND_ID_ESMT, 0xd1, 0x80, 0x95, 0x40, 0x7f},
2048,
128,