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mtd: add a new slc nand and avoid the 2nd column in some command
PD#158989: mtd: add a new slc nand and avoid the 2nd column in some command new slc nand: F59L1G81MB (2M)(same id with F59L1G81MA (2Y), called a joint name of F59L1G81Mxxx). We do not send the 2nd column in some command such as: read id, read parameter etc Change-Id: Ibeac872231c880efde8a38e6344c326043e7d7dc Signed-off-by: Yi Zeng <yi.zeng@amlogic.com>
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@@ -875,11 +875,13 @@ void aml_nand_base_command(struct aml_nand_chip *aml_chip,
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/* Serially input address */
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if (column != -1) {
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/* Adjust columns for 16 bit buswidth */
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if (chip->options & NAND_BUSWIDTH_16)
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if (chip->options & NAND_BUSWIDTH_16 &&
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!nand_opcode_8bits(command))
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column >>= 1;
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chip->cmd_ctrl(mtd, column, ctrl);
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ctrl &= ~NAND_CTRL_CHANGE;
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chip->cmd_ctrl(mtd, column >> 8, ctrl);
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if (!nand_opcode_8bits(command))
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chip->cmd_ctrl(mtd, column >> 8, ctrl);
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}
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if (page_addr != -1) {
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chip->cmd_ctrl(mtd, plane_page_addr, ctrl);
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@@ -982,11 +984,13 @@ void aml_nand_base_command(struct aml_nand_chip *aml_chip,
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/* Serially input address */
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if (column != -1) {
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/* Adjust columns for 16 bit buswidth */
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if (chip->options & NAND_BUSWIDTH_16)
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if (chip->options & NAND_BUSWIDTH_16 &&
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!nand_opcode_8bits(command))
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column >>= 1;
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chip->cmd_ctrl(mtd, column, ctrl);
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ctrl &= ~NAND_CTRL_CHANGE;
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chip->cmd_ctrl(mtd, column >> 8, ctrl);
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if (!nand_opcode_8bits(command))
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chip->cmd_ctrl(mtd, column >> 8, ctrl);
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}
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if (page_addr != -1) {
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/* plane_page_addr |= */
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@@ -1042,11 +1046,13 @@ void aml_nand_base_command(struct aml_nand_chip *aml_chip,
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/* Serially input address */
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if (column != -1) {
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/* Adjust columns for 16 bit buswidth */
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if (chip->options & NAND_BUSWIDTH_16)
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if (chip->options & NAND_BUSWIDTH_16 &&
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!nand_opcode_8bits(command))
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column >>= 1;
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chip->cmd_ctrl(mtd, column, ctrl);
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ctrl &= ~NAND_CTRL_CHANGE;
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chip->cmd_ctrl(mtd, column >> 8, ctrl);
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if (!nand_opcode_8bits(command))
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chip->cmd_ctrl(mtd, column >> 8, ctrl);
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}
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if (page_addr != -1) {
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@@ -1148,7 +1154,8 @@ void aml_nand_command(struct mtd_info *mtd,
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aml_chip->page_addr |=
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(1 << aml_chip->internal_chip_shift)*aml_chip->internal_chipnr;
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}
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}
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} else
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aml_chip->page_addr = page_addr;
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/* Emulate NAND_CMD_READOOB */
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if (command == NAND_CMD_READOOB) {
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@@ -2065,7 +2072,7 @@ int aml_nand_init(struct aml_nand_chip *aml_chip)
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*/
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chip->select_chip = aml_nand_select_chip;
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chip->cmd_ctrl = aml_nand_cmd_ctrl;
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chip->cmdfunc = aml_nand_command;
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/* chip->cmdfunc = aml_nand_command; */
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chip->read_byte = aml_platform_read_byte;
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controller->chip_num = plat->platform_nand_data.chip.nr_chips;
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@@ -377,7 +377,7 @@ struct aml_nand_flash_dev aml_nand_flash_ids[] = {
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0,
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0,
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(NAND_TIMING_MODE5 | NAND_ECC_BCH8_MODE)},
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{"ESMT SLC 128MiB 3.3V 8-bit F59L1G81MA (2Y)",
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{"ESMT SLC 128MiB 3.3V 8-bit F59L1G81Mxxx",
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{NAND_ID_ESMT, 0xd1, 0x80, 0x95, 0x40, 0x7f},
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2048,
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128,
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