ARM64: dts: rk3368-android: update route state

1. add lvds node to /display_subsystem;
2. set route_mipi state to closed at rk3368-android.dtsi
3. set route_mipi state to okay at rk3368-sheep.dts

Change-Id: I8052e38764f85f700014ea40b208b38c09cae56b
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

arch/arm64/boot/dts/rockchip/rk3368-android.dtsi

@@ -167,6 +167,15 @@
 			charge_logo,mode = "center";
 			connect = <&vop_out_hdmi>;
 		};
+
+		route_lvds: route-lvds {
+			status = "disabled";
+			logo,uboot = "logo.bmp";
+			logo,kernel = "logo_kernel.bmp";
+			logo,mode = "center";
+			charge_logo,mode = "center";
+			connect = <&vop_out_lvds>;
+		};
 	};
 };
 

arch/arm64/boot/dts/rockchip/rk3368-sheep.dts

@@ -591,6 +591,10 @@
 	status = "okay";
 };
 
+&route_mipi {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 };

arch/arm64/boot/dts/rockchip/rk3368.dtsi

@@ -1333,6 +1333,11 @@
 				reg = <2>;
 				remote-endpoint = <&hdmi_in_vop>;
 			};
+
+			vop_out_lvds: endpoint@3 {
+				reg = <3>;
+				remote-endpoint = <&lvds_in_vop>;
+			};
 		};
 	};
 
@@ -1390,6 +1395,32 @@
 		status = "disabled";
 	};
 
+	lvds: lvds@ff968000 {
+		compatible = "rockchip,rk33xx-lvds";
+		reg = <0x0 0xff968000 0x0 0x4000>, <0x0 0xff9600a0 0x0 0x20>;
+		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
+		clocks = <&cru PCLK_DPHYTX0>, <&cru PCLK_MIPI_DSI0>;
+		clock-names = "pclk_lvds", "pclk_lvds_ctl";
+		power-domains = <&power RK3368_PD_VIO>;
+		rockchip,grf = <&grf>;
+		pinctrl-names = "lcdc", "gpio";
+		pinctrl-0 = <&lcdc_lcdc>;
+		pinctrl-1 = <&lcdc_gpio>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			lvds_in: port@0 {
+				reg = <0>;
+				lvds_in_vop: endpoint {
+					remote-endpoint = <&vop_out_lvds>;
+				};
+			};
+		};
+	};
+
 	edp: edp@ff970000 {
 		compatible = "rockchip,rk3368-edp";
 		reg = <0x0 0xff970000 0x0 0x8000>;