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media: rockchip: hdmirx: edid support yuv444

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Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
Change-Id: Ifb52d50a982fcd23d557c977c874478bade14277
This commit is contained in:
Wangqiang Guo
2022-06-15 06:50:06 +00:00
committed by Tao Huang
parent 046993ac20
commit 09a4eade6e
1 changed files with 6 additions and 6 deletions
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12
drivers/media/platform/rockchip/hdmirx/rk_hdmirx.c
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@@ -262,11 +262,11 @@ static u8 edid_init_data_340M[] = {
0x00, 0x3B, 0x46, 0x1F, 0x8C, 0x3C, 0x00, 0x0A,
0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0xA7,
0x02, 0x03, 0x2F, 0xD1, 0x51, 0x07, 0x16, 0x14,
0x02, 0x03, 0x2F, 0xF1, 0x51, 0x07, 0x16, 0x14,
0x05, 0x01, 0x03, 0x12, 0x13, 0x84, 0x22, 0x1F,
0x90, 0x5D, 0x5E, 0x5F, 0x60, 0x61, 0x23, 0x09,
0x07, 0x07, 0x83, 0x01, 0x00, 0x00, 0x67, 0x03,
0x0C, 0x00, 0x30, 0x00, 0x10, 0x44, 0xE3, 0x05,
0x0C, 0x00, 0x30, 0x00, 0x18, 0x44, 0xE3, 0x05,
0x03, 0x01, 0xE4, 0x0F, 0x00, 0x80, 0x01, 0x02,
0x3A, 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40, 0x58,
0x2C, 0x45, 0x00, 0x20, 0xC2, 0x31, 0x00, 0x00,
@@ -277,7 +277,7 @@ static u8 edid_init_data_340M[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF7,
};
static u8 edid_init_data_600M[] = {
@@ -298,9 +298,9 @@ static u8 edid_init_data_600M[] = {
0x00, 0x3B, 0x46, 0x1F, 0x8C, 0x3C, 0x00, 0x0A,
0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0x39,
0x02, 0x03, 0x21, 0xD2, 0x41, 0x61, 0x23, 0x09,
0x02, 0x03, 0x21, 0xF2, 0x41, 0x61, 0x23, 0x09,
0x07, 0x07, 0x83, 0x01, 0x00, 0x00, 0x66, 0x03,
0x0C, 0x00, 0x30, 0x00, 0x10, 0x67, 0xD8, 0x5D,
0x0C, 0x00, 0x30, 0x00, 0x18, 0x67, 0xD8, 0x5D,
0xC4, 0x01, 0x78, 0xC0, 0x07, 0xE3, 0x05, 0x03,
0x01, 0x08, 0xE8, 0x00, 0x30, 0xF2, 0x70, 0x5A,
0x80, 0xB0, 0x58, 0x8A, 0x00, 0xC4, 0x8E, 0x21,
@@ -313,7 +313,7 @@ static u8 edid_init_data_600M[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE8,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0,
};
static const struct v4l2_dv_timings_cap hdmirx_timings_cap = {