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FROMLIST: arm64: dts: rockchip: add aspm-no-l0s for rk3399

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Per the discussion of bug fix[1], we now actually
leaves the default clock choice for pcie phy is
derived from 24MHz OSC to guarantee the least BER.
So let's add aspm-no-l0s here and folks could delete
this property from their dts.

Change-Id: I5ee57a2e27d3751f6541fdf059e6745c26d0a6ef
[1] https://patchwork.kernel.org/patch/9470519/
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherr picked from https://patchwork.kernel.org/patch/9477651/)
This commit is contained in:
Shawn Lin
2017-01-13 09:56:51 +08:00
parent 01f4eaa6a4
commit 09c6498051
1 changed files with 1 additions and 0 deletions
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1
arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -1190,6 +1190,7 @@
compatible = "rockchip,rk3399-pcie";
#address-cells = <3>;
#size-cells = <2>;
aspm-no-l0s;
clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
<&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
clock-names = "aclk", "aclk-perf",