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media: rockchip: isp: make sure 3dlut no continuous read twice

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if 3dlut enable and 3DLUT_UPDATE = 1,
will start read lut at following case:
1. isp force update
2. frame end
2->1 shouldn't for 3dlut.

Change-Id: I82d03836035bc06e25839fe4d90dba7cd36c2e1a
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
This commit is contained in:
Cai YiWei
2021-03-18 09:41:05 +08:00
committed by Tao Huang
parent 2dc370f09b
commit 0a70e9461d
4 changed files with 18 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/media/platform/rockchip/isp/common.c
View File

@@ -32,6 +32,11 @@ u32 rkisp_read(struct rkisp_device *dev, u32 reg, bool is_direct)
return val;
}
u32 rkisp_read_reg_cache(struct rkisp_device *dev, u32 reg)
{
return *(u32 *)(dev->sw_base_addr + reg);
}
void rkisp_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, bool is_direct)
{
u32 tmp = rkisp_read(dev, reg, is_direct) & ~mask;

1
drivers/media/platform/rockchip/isp/common.h
View File

@@ -163,6 +163,7 @@ static inline struct vb2_queue *to_vb2_queue(struct file *file)
void rkisp_write(struct rkisp_device *dev, u32 reg, u32 val, bool is_direct);
u32 rkisp_read(struct rkisp_device *dev, u32 reg, bool is_direct);
u32 rkisp_read_reg_cache(struct rkisp_device *dev, u32 reg);
void rkisp_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, bool is_direct);
void rkisp_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, bool is_direct);
void rkisp_update_regs(struct rkisp_device *dev, u32 start, u32 end);

10
drivers/media/platform/rockchip/isp/csi.c
View File

@@ -491,7 +491,7 @@ void rkisp_trigger_read_back(struct rkisp_csi_device *csi, u8 dma2frm, u32 mode)
u32 val, cur_frame_id, tmp, rd_mode;
bool is_feature_on = hw->is_feature_on;
u64 iq_feature = hw->iq_feature;
bool is_upd = false;
bool is_upd = false, is_3dlut_upd = false;
if (dev->isp_ver == ISP_V21)
dma2frm = 0;
@@ -574,11 +574,19 @@ void rkisp_trigger_read_back(struct rkisp_csi_device *csi, u8 dma2frm, u32 mode)
if (IS_HDR_RDBK(dev->csi_dev.rd_mode))
rkisp_params_cfgsram(params_vdev);
/* read 3d lut at frame end */
if (hw->is_single && is_upd &&
rkisp_read_reg_cache(dev, ISP_3DLUT_UPDATE) & 0x1) {
rkisp_write(dev, ISP_3DLUT_UPDATE, 0, true);
is_3dlut_upd = true;
}
if (is_upd) {
val = rkisp_read(dev, ISP_CTRL, false);
val |= CIF_ISP_CTRL_ISP_CFG_UPD;
rkisp_write(dev, ISP_CTRL, val, true);
}
if (is_3dlut_upd)
rkisp_write(dev, ISP_3DLUT_UPDATE, 1, true);
memset(csi->filt_state, 0, sizeof(csi->filt_state));
csi->filt_state[CSI_F_VS] = dma2frm;

3
drivers/media/platform/rockchip/isp/rkisp.c
View File

@@ -2332,6 +2332,9 @@ void rkisp_isp_isr(unsigned int isp_mis,
else
dev->csi_dev.filt_state[CSI_F_VS]--;
if (IS_HDR_RDBK(dev->hdr.op_mode)) {
/* read 3d lut at isp readback */
if (!dev->hw_dev->is_single)
rkisp_write(dev, ISP_3DLUT_UPDATE, 0, true);
rkisp_stats_rdbk_enable(&dev->stats_vdev, true);
goto vs_skip;
}