mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-05 02:21:52 +09:00
i40iw: Fix sequence number for the first partial FPDU
[ Upstream commitdf8b13a1b2] Partial FPDU processing is broken as the sequence number for the first partial FPDU is wrong due to incorrect Q2 buffer offset. The offset should be 64 rather than 16. Fixes:786c6adb3a("i40iw: add puda code") Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
b867b7a7e5
commit
0bc82eae12
@@ -93,6 +93,7 @@
|
||||
#define RDMA_OPCODE_MASK 0x0f
|
||||
#define RDMA_READ_REQ_OPCODE 1
|
||||
#define Q2_BAD_FRAME_OFFSET 72
|
||||
#define Q2_FPSN_OFFSET 64
|
||||
#define CQE_MAJOR_DRV 0x8000
|
||||
|
||||
#define I40IW_TERM_SENT 0x01
|
||||
|
||||
@@ -1376,7 +1376,7 @@ static void i40iw_ieq_handle_exception(struct i40iw_puda_rsrc *ieq,
|
||||
u32 *hw_host_ctx = (u32 *)qp->hw_host_ctx;
|
||||
u32 rcv_wnd = hw_host_ctx[23];
|
||||
/* first partial seq # in q2 */
|
||||
u32 fps = qp->q2_buf[16];
|
||||
u32 fps = *(u32 *)(qp->q2_buf + Q2_FPSN_OFFSET);
|
||||
struct list_head *rxlist = &pfpdu->rxlist;
|
||||
struct list_head *plist;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user