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arm64: dts: rockchip: rk3588s: add more clk for fec_mmu

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Change-Id: I13f136d4a756db9a5ccb0d0c48cb24a7e0ee3589
Signed-off-by: Lian Xu <xu.lian@rock-chips.com>
This commit is contained in:
Lian Xu
2021-12-10 19:25:52 +08:00
committed by Tao Huang
parent e29b836b17
commit 0c0743db3c
1 changed files with 6 additions and 4 deletions
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10
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@@ -2315,10 +2315,11 @@
reg = <0x0 0xfdcd0f00 0x0 0x100>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "fec0_mmu";
clocks = <&cru ACLK_FISHEYE0>, <&cru HCLK_FISHEYE0>;
clock-names = "aclk", "iface";
clocks = <&cru ACLK_FISHEYE0>, <&cru HCLK_FISHEYE0>, <&cru CLK_FISHEYE0_CORE>;
clock-names = "aclk", "iface", "pclk";
power-domains = <&power RK3588_PD_FEC>;
#iommu-cells = <0>;
rockchip,disable-mmu-reset;
status = "disabled";
};
@@ -2340,10 +2341,11 @@
reg = <0x0 0xfdcd8f00 0x0 0x100>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "fec1_mmu";
clocks = <&cru ACLK_FISHEYE1>, <&cru HCLK_FISHEYE1>;
clock-names = "aclk", "iface";
clocks = <&cru ACLK_FISHEYE1>, <&cru HCLK_FISHEYE1>, <&cru CLK_FISHEYE1_CORE>;
clock-names = "aclk", "iface", "pclk";
power-domains = <&power RK3588_PD_FEC>;
#iommu-cells = <0>;
rockchip,disable-mmu-reset;
status = "disabled";
};