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clk/rockchip/regmap: pll: fix integer overflow in clk_pll_round_rate

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Change-Id: I94c90f400f69351f9e592f44c2e167a98d96945f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
Wyon Bi
2020-09-21 15:17:08 +08:00
committed by Tao Huang
parent d6a89a1517
commit 0d3f9ae026
1 changed files with 1 additions and 1 deletions
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drivers/clk/rockchip/regmap/clk-regmap-pll.c
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@@ -201,7 +201,7 @@ static long clk_pll_round_rate(unsigned long fin, unsigned long fout,
do_div(foutvco, _refdiv);
if (!_dsmpd) {
u64 frac_rate = fin * _frac;
u64 frac_rate = (u64)fin * _frac;
do_div(frac_rate, _refdiv);
foutvco += frac_rate >> 24;