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Merge dfdc1de642 ("Merge tag 'staging-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging") into android-mainline

Browse Source 
Steps on the way to 5.18-rc1

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: Idfedaa5459b8af0fdfc56e481619772243ef45c9
This commit is contained in:
Greg Kroah-Hartman
2022-04-13 13:43:13 +02:00
parent 094f5702db dfdc1de642
commit 0d9670519c
206 changed files with 3338 additions and 9795 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml
View File

@@ -22,6 +22,11 @@ description: |
The clocks are provided inside a system controller node.
This node is also a reset provider for all the peripherals.
Reset related bits are defined in:
[2]: <include/dt-bindings/reset/mt7621-reset.h>.
properties:
compatible:
items:
@@ -37,6 +42,12 @@ properties:
clocks.
const: 1
"#reset-cells":
description:
The first cell indicates the reset bit within the register, see
[2] for available resets.
const: 1
ralink,memctl:
$ref: /schemas/types.yaml#/definitions/phandle
description:
@@ -61,6 +72,7 @@ examples:
compatible = "mediatek,mt7621-sysc", "syscon";
reg = <0x0 0x100>;
#clock-cells = <1>;
#reset-cells = <1>;
ralink,memctl = <&memc>;
clock-output-names = "xtal", "cpu", "bus",
"50m", "125m", "150m",

82
drivers/staging/wfx/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml → Documentation/devicetree/bindings/staging/net/wireless/silabs,wfx.yaml
View File

@@ -3,7 +3,7 @@
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/wireless/silabs,wfx.yaml#
$id: http://devicetree.org/schemas/staging/net/wireless/silabs,wfx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Silicon Labs WFxxx devicetree bindings
@@ -11,67 +11,79 @@ title: Silicon Labs WFxxx devicetree bindings
maintainers:
- Jérôme Pouiller <jerome.pouiller@silabs.com>
description:
The WFxxx chip series can be connected via SPI or via SDIO.
description: >
Support for the Wifi chip WFxxx from Silicon Labs. Currently, the only device
from the WFxxx series is the WF200 described here:
https://www.silabs.com/documents/public/data-sheets/wf200-datasheet.pdf
For SDIO':'
The WF200 can be connected via SPI or via SDIO.
The driver is able to detect a WFxxx chip on SDIO bus by matching its Vendor
ID and Product ID. However, driver will only provide limited features in
this case. Thus declaring WFxxx chip in device tree is recommended (and may
become mandatory in the future).
For SDIO:
In addition, it is recommended to declare a mmc-pwrseq on SDIO host above
WFx. Without it, you may encounter issues with warm boot. The mmc-pwrseq
should be compatible with mmc-pwrseq-simple. Please consult
Declaring the WFxxx chip in device tree is mandatory (usually, the VID/PID is
sufficient for the SDIO devices).
It is recommended to declare a mmc-pwrseq on SDIO host above WFx. Without
it, you may encounter issues during reboot. The mmc-pwrseq should be
compatible with mmc-pwrseq-simple. Please consult
Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml for more
information.
For SPI':'
For SPI:
In add of the properties below, please consult
Documentation/devicetree/bindings/spi/spi-controller.yaml for optional SPI
related properties.
Note that in add of the properties below, the WFx driver also supports
`mac-address` and `local-mac-address` as described in
Documentation/devicetree/bindings/net/ethernet.txt
properties:
compatible:
const: silabs,wf200
items:
- enum:
- silabs,brd4001a # WGM160P Evaluation Board
- silabs,brd8022a # WF200 Evaluation Board
- silabs,brd8023a # WFM200 Evaluation Board
- const: silabs,wf200 # Chip alone without antenna
reg:
description:
When used on SDIO bus, <reg> must be set to 1. When used on SPI bus, it is
the chip select address of the device as defined in the SPI devices
bindings.
maxItems: 1
spi-max-frequency:
description: (SPI only) Maximum SPI clocking speed of device in Hz.
maxItems: 1
spi-max-frequency: true
interrupts:
description: The interrupt line. Triggers IRQ_TYPE_LEVEL_HIGH and
IRQ_TYPE_EDGE_RISING are both supported by the chip and the driver. When
SPI is used, this property is required. When SDIO is used, the "in-band"
description: The interrupt line. Should be IRQ_TYPE_EDGE_RISING. When SPI is
used, this property is required. When SDIO is used, the "in-band"
interrupt provided by the SDIO bus is used unless an interrupt is defined
in the Device Tree.
maxItems: 1
reset-gpios:
description: (SPI only) Phandle of gpio that will be used to reset chip
during probe. Without this property, you may encounter issues with warm
boot. (For legacy purpose, the gpio in inverted when compatible ==
"silabs,wfx-spi")
boot.
For SDIO, the reset gpio should declared using a mmc-pwrseq.
maxItems: 1
wakeup-gpios:
description: Phandle of gpio that will be used to wake-up chip. Without this
property, driver will disable most of power saving features.
maxItems: 1
config-file:
description: Use an alternative file as PDS. Default is `wf200.pds`. Only
necessary for development/debug purpose.
maxItems: 1
silabs,antenna-config-file:
$ref: /schemas/types.yaml#/definitions/string
description: Use an alternative file for antenna configuration (aka
"Platform Data Set" in Silabs jargon). Default depends of "compatible"
string. For "silabs,wf200", the default is 'wf200.pds'.
local-mac-address: true
mac-address: true
additionalProperties: false
required:
- compatible
@@ -82,12 +94,12 @@ examples:
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;
wfx@0 {
compatible = "silabs,wf200";
wifi@0 {
compatible = "silabs,brd8022a", "silabs,wf200";
pinctrl-names = "default";
pinctrl-0 = <&wfx_irq &wfx_gpios>;
reg = <0>;
@@ -109,13 +121,13 @@ examples:
reset-gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
mmc0 {
mmc {
mmc-pwrseq = <&wfx_pwrseq>;
#address-cells = <1>;
#size-cells = <0>;
mmc@1 {
compatible = "silabs,wf200";
wifi@1 {
compatible = "silabs,brd8022a", "silabs,wf200";
pinctrl-names = "default";
pinctrl-0 = <&wfx_wakeup>;
reg = <1>;

9
MAINTAINERS
View File

@@ -1325,7 +1325,6 @@ L: linux-kernel@vger.kernel.org
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git
F: drivers/android/
F: drivers/staging/android/
ANDROID GOLDFISH PIC DRIVER
M: Miodrag Dinic <miodrag.dinic@mips.com>
@@ -16467,6 +16466,13 @@ L: linux-mips@vger.kernel.org
S: Maintained
F: arch/mips/ralink
RALINK MT7621 MIPS ARCHITECTURE
M: Arınç ÜNAL <arinc.unal@arinc9.com>
M: Sergio Paracuellos <sergio.paracuellos@gmail.com>
L: linux-mips@vger.kernel.org
S: Maintained
F: arch/mips/boot/dts/ralink/mt7621*
RALINK RT2X00 WIRELESS LAN DRIVER
M: Stanislaw Gruszka <stf_xl@wp.pl>
M: Helmut Schaa <helmut.schaa@googlemail.com>
@@ -17947,6 +17953,7 @@ F: drivers/platform/x86/touchscreen_dmi.c
SILICON LABS WIRELESS DRIVERS (for WFxxx series)
M: Jérôme Pouiller <jerome.pouiller@silabs.com>
S: Supported
F: Documentation/devicetree/bindings/staging/net/wireless/silabs,wfx.yaml
F: drivers/staging/wfx/
SILICON MOTION SM712 FRAME BUFFER DRIVER

4
arch/mips/boot/dts/ralink/Makefile
View File

@@ -6,4 +6,8 @@ dtb-$(CONFIG_DTB_MT7620A_EVAL) += mt7620a_eval.dtb
dtb-$(CONFIG_DTB_OMEGA2P) += omega2p.dtb
dtb-$(CONFIG_DTB_VOCORE2) += vocore2.dtb
dtb-$(CONFIG_SOC_MT7621) += \
mt7621-gnubee-gb-pc1.dtb \
mt7621-gnubee-gb-pc2.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

44
drivers/staging/mt7621-dts/gbpc1.dts → arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc1.dts
View File

@@ -12,7 +12,8 @@
memory@0 {
device_type = "memory";
reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
reg = <0x00000000 0x1c000000>,
<0x20000000 0x04000000>;
};
chosen {
@@ -38,24 +39,16 @@
gpio-leds {
compatible = "gpio-leds";
system {
label = "gb-pc1:green:system";
power {
label = "green:power";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
status {
label = "gb-pc1:green:status";
system {
label = "green:system";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "gb-pc1:green:lan1";
gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "gb-pc1:green:lan2";
gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
linux,default-trigger = "disk-activity";
};
};
};
@@ -95,9 +88,8 @@
partition@50000 {
label = "firmware";
reg = <0x50000 0x1FB0000>;
reg = <0x50000 0x1fb0000>;
};
};
};
@@ -106,23 +98,31 @@
};
&pinctrl {
state_default: pinctrl0 {
default_gpio: gpio {
groups = "wdt", "rgmii2", "uart3";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: state-default {
gpio-pinmux {
groups = "rgmii2", "uart3", "wdt";
function = "gpio";
};
};
};
&ethernet {
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "ethblack";
status = "ok";
};
port@4 {
status = "okay";
label = "ethblue";
status = "ok";
};
};
};

122
arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts Normal file
View File

@@ -0,0 +1,122 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "gnubee,gb-pc2", "mediatek,mt7621-soc";
model = "GB-PC2";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x1c000000>,
<0x20000000 0x04000000>;
};
chosen {
bootargs = "console=ttyS0,57600";
};
palmbus: palmbus@1e000000 {
i2c@900 {
status = "okay";
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RESTART>;
};
};
};
&sdhci {
status = "okay";
};
&spi0 {
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
broken-flash-reset;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0x1fb0000>;
};
};
};
&pcie {
status = "okay";
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: state-default {
gpio-pinmux {
groups = "wdt";
function = "gpio";
};
};
};
&ethernet {
gmac1: mac@1 {
status = "okay";
phy-handle = <&ethphy7>;
};
mdio-bus {
ethphy7: ethernet-phy@7 {
reg = <7>;
phy-mode = "rgmii-rxid";
};
};
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "ethblack";
};
port@4 {
status = "okay";
label = "ethblue";
};
};
};

59
drivers/staging/mt7621-dts/mt7621.dtsi → arch/mips/boot/dts/ralink/mt7621.dtsi
View File

@@ -2,6 +2,7 @@
#include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/mt7621-clk.h>
#include <dt-bindings/reset/mt7621-reset.h>
/ {
#address-cells = <1>;
@@ -25,7 +26,7 @@
};
};
cpuintc: cpuintc@0 {
cpuintc: cpuintc {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
@@ -37,16 +38,16 @@
};
mmc_fixed_3v3: fixedregulator@0 {
mmc_fixed_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "mmc_power";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
regulator-always-on;
};
};
mmc_fixed_1v8_io: fixedregulator@1 {
mmc_fixed_1v8_io: regulator-1v8 {
compatible = "regulator-fixed";
regulator-name = "mmc_io";
regulator-min-microvolt = <1800000>;
@@ -67,6 +68,7 @@
compatible = "mediatek,mt7621-sysc", "syscon";
reg = <0x0 0x100>;
#clock-cells = <1>;
#reset-cells = <1>;
ralink,memctl = <&memc>;
clock-output-names = "xtal", "cpu", "bus",
"50m", "125m", "150m",
@@ -96,7 +98,7 @@
clocks = <&sysc MT7621_CLK_I2C>;
clock-names = "i2c";
resets = <&rstctrl 16>;
resets = <&sysc MT7621_RST_I2C>;
reset-names = "i2c";
#address-cells = <1>;
@@ -137,7 +139,7 @@
clocks = <&sysc MT7621_CLK_SPI>;
clock-names = "spi";
resets = <&rstctrl 18>;
resets = <&sysc MT7621_RST_SPI>;
reset-names = "spi";
#address-cells = <1>;
@@ -234,11 +236,6 @@
};
};
rstctrl: rstctrl {
compatible = "ralink,rt2880-reset";
#reset-cells = <1>;
};
sdhci: sdhci@1e130000 {
status = "disabled";
@@ -266,8 +263,6 @@
};
xhci: xhci@1e1c0000 {
status = "okay";
compatible = "mediatek,mt8173-xhci";
reg = <0x1e1c0000 0x1000
0x1e1d0700 0x0100>;
@@ -317,7 +312,7 @@
#address-cells = <1>;
#size-cells = <0>;
resets = <&rstctrl 6 &rstctrl 23>;
resets = <&sysc MT7621_RST_FE &sysc MT7621_RST_ETH>;
reset-names = "fe", "eth";
interrupt-parent = <&gic>;
@@ -325,44 +320,37 @@
mediatek,ethsys = <&sysc>;
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>, <&rgmii2_pins>;
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "rgmii";
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
status = "off";
phy-mode = "rgmii-rxid";
phy-handle = <&phy_external>;
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy_external: ethernet-phy@5 {
status = "off";
reg = <5>;
phy-mode = "rgmii-rxid";
pinctrl-names = "default";
pinctrl-0 = <&rgmii2_pins>;
};
switch0: switch0@0 {
compatible = "mediatek,mt7621";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
mediatek,mcm;
resets = <&rstctrl 2>;
resets = <&sysc MT7621_RST_MCM>;
reset-names = "mcm";
interrupt-controller;
#interrupt-cells = <1>;
@@ -372,40 +360,47 @@
ports {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
port@0 {
status = "off";
reg = <0>;
label = "lan0";
};
port@1 {
status = "off";
reg = <1>;
label = "lan1";
};
port@2 {
status = "off";
reg = <2>;
label = "lan2";
};
port@3 {
status = "off";
reg = <3>;
label = "lan3";
};
port@4 {
status = "off";
reg = <4>;
label = "lan4";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
};
@@ -448,7 +443,7 @@
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rstctrl 24>;
resets = <&sysc MT7621_RST_PCIE0>;
clocks = <&sysc MT7621_CLK_PCIE0>;
phys = <&pcie0_phy 1>;
phy-names = "pcie-phy0";
@@ -463,7 +458,7 @@
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rstctrl 25>;
resets = <&sysc MT7621_RST_PCIE1>;
clocks = <&sysc MT7621_CLK_PCIE1>;
phys = <&pcie0_phy 1>;
phy-names = "pcie-phy1";
@@ -478,7 +473,7 @@
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rstctrl 26>;
resets = <&sysc MT7621_RST_PCIE2>;
clocks = <&sysc MT7621_CLK_PCIE2>;
phys = <&pcie2_phy 0>;
phy-names = "pcie-phy2";

5
arch/mips/ralink/Kconfig
View File

@@ -54,10 +54,15 @@ choice
select HAVE_PCI
select PCI_DRIVERS_GENERIC
select SOC_BUS
help
The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc dual-core CPU,
a 5-port 10/100/1000 switch/PHY and one RGMII.
endchoice
choice
prompt "Devicetree selection"
depends on !SOC_MT7621
default DTB_RT_NONE
help
Select the devicetree.

92
drivers/clk/ralink/clk-mt7621.c
View File

@@ -11,14 +11,17 @@
#include <linux/mfd/syscon.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/reset-controller.h>
#include <linux/slab.h>
#include <dt-bindings/clock/mt7621-clk.h>
#include <dt-bindings/reset/mt7621-reset.h>
/* Configuration registers */
#define SYSC_REG_SYSTEM_CONFIG0 0x10
#define SYSC_REG_SYSTEM_CONFIG1 0x14
#define SYSC_REG_CLKCFG0 0x2c
#define SYSC_REG_CLKCFG1 0x30
#define SYSC_REG_RESET_CTRL 0x34
#define SYSC_REG_CUR_CLK_STS 0x44
#define MEMC_REG_CPU_PLL 0x648
@@ -398,6 +401,82 @@ free_clk_priv:
}
CLK_OF_DECLARE_DRIVER(mt7621_clk, "mediatek,mt7621-sysc", mt7621_clk_init);
struct mt7621_rst {
struct reset_controller_dev rcdev;
struct regmap *sysc;
};
static struct mt7621_rst *to_mt7621_rst(struct reset_controller_dev *dev)
{
return container_of(dev, struct mt7621_rst, rcdev);
}
static int mt7621_assert_device(struct reset_controller_dev *rcdev,
unsigned long id)
{
struct mt7621_rst *data = to_mt7621_rst(rcdev);
struct regmap *sysc = data->sysc;
return regmap_update_bits(sysc, SYSC_REG_RESET_CTRL, BIT(id), BIT(id));
}
static int mt7621_deassert_device(struct reset_controller_dev *rcdev,
unsigned long id)
{
struct mt7621_rst *data = to_mt7621_rst(rcdev);
struct regmap *sysc = data->sysc;
return regmap_update_bits(sysc, SYSC_REG_RESET_CTRL, BIT(id), 0);
}
static int mt7621_reset_device(struct reset_controller_dev *rcdev,
unsigned long id)
{
int ret;
ret = mt7621_assert_device(rcdev, id);
if (ret < 0)
return ret;
return mt7621_deassert_device(rcdev, id);
}
static int mt7621_rst_xlate(struct reset_controller_dev *rcdev,
const struct of_phandle_args *reset_spec)
{
unsigned long id = reset_spec->args[0];
if (id == MT7621_RST_SYS || id >= rcdev->nr_resets)
return -EINVAL;
return id;
}
static const struct reset_control_ops reset_ops = {
.reset = mt7621_reset_device,
.assert = mt7621_assert_device,
.deassert = mt7621_deassert_device
};
static int mt7621_reset_init(struct device *dev, struct regmap *sysc)
{
struct mt7621_rst *rst_data;
rst_data = devm_kzalloc(dev, sizeof(*rst_data), GFP_KERNEL);
if (!rst_data)
return -ENOMEM;
rst_data->sysc = sysc;
rst_data->rcdev.ops = &reset_ops;
rst_data->rcdev.owner = THIS_MODULE;
rst_data->rcdev.nr_resets = 32;
rst_data->rcdev.of_reset_n_cells = 1;
rst_data->rcdev.of_xlate = mt7621_rst_xlate;
rst_data->rcdev.of_node = dev_of_node(dev);
return devm_reset_controller_register(dev, &rst_data->rcdev);
}
static int mt7621_clk_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
@@ -424,6 +503,12 @@ static int mt7621_clk_probe(struct platform_device *pdev)
return ret;
}
ret = mt7621_reset_init(dev, priv->sysc);
if (ret) {
dev_err(dev, "Could not init reset controller\n");
return ret;
}
count = ARRAY_SIZE(mt7621_clks_base) +
ARRAY_SIZE(mt7621_fixed_clks) + ARRAY_SIZE(mt7621_gates);
clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, count),
@@ -485,4 +570,9 @@ static struct platform_driver mt7621_clk_driver = {
.of_match_table = mt7621_clk_of_match,
},
};
builtin_platform_driver(mt7621_clk_driver);
static int __init mt7621_clk_reset_init(void)
{
return platform_driver_register(&mt7621_clk_driver);
}
arch_initcall(mt7621_clk_reset_init);

5
drivers/mmc/core/quirks.h
View File

@@ -149,6 +149,11 @@ static const struct mmc_fixup __maybe_unused sdio_fixup_methods[] = {
static const struct mmc_fixup __maybe_unused sdio_card_init_methods[] = {
SDIO_FIXUP_COMPATIBLE("ti,wl1251", wl1251_quirk, 0),
SDIO_FIXUP_COMPATIBLE("silabs,wf200", add_quirk,
MMC_QUIRK_BROKEN_BYTE_MODE_512 |
MMC_QUIRK_LENIENT_FN0 |
MMC_QUIRK_BLKSZ_FOR_BYTE_MODE),
END_FIXUP
};

6
drivers/staging/Kconfig
View File

@@ -58,16 +58,12 @@ source "drivers/staging/nvec/Kconfig"
source "drivers/staging/media/Kconfig"
source "drivers/staging/android/Kconfig"
source "drivers/staging/board/Kconfig"
source "drivers/staging/gdm724x/Kconfig"
source "drivers/staging/fwserial/Kconfig"
source "drivers/staging/gs_fpgaboot/Kconfig"
source "drivers/staging/unisys/Kconfig"
source "drivers/staging/clocking-wizard/Kconfig"
@@ -84,8 +80,6 @@ source "drivers/staging/vc04_services/Kconfig"
source "drivers/staging/pi433/Kconfig"
source "drivers/staging/mt7621-dts/Kconfig"
source "drivers/staging/axis-fifo/Kconfig"
source "drivers/staging/fieldbus/Kconfig"

3
drivers/staging/Makefile
View File

@@ -19,11 +19,9 @@ obj-$(CONFIG_IIO) += iio/
obj-$(CONFIG_FB_SM750) += sm750fb/
obj-$(CONFIG_USB_EMXX) += emxx_udc/
obj-$(CONFIG_MFD_NVEC) += nvec/
obj-$(CONFIG_ANDROID) += android/
obj-$(CONFIG_STAGING_BOARD) += board/
obj-$(CONFIG_LTE_GDM724X) += gdm724x/
obj-$(CONFIG_FIREWIRE_SERIAL) += fwserial/
obj-$(CONFIG_GS_FPGABOOT) += gs_fpgaboot/
obj-$(CONFIG_UNISYSSPAR) += unisys/
obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/
obj-$(CONFIG_FB_TFT) += fbtft/
@@ -32,7 +30,6 @@ obj-$(CONFIG_KS7010) += ks7010/
obj-$(CONFIG_GREYBUS) += greybus/
obj-$(CONFIG_BCM2835_VCHIQ) += vc04_services/
obj-$(CONFIG_PI433) += pi433/
obj-$(CONFIG_SOC_MT7621) += mt7621-dts/
obj-$(CONFIG_XIL_AXIS_FIFO) += axis-fifo/
obj-$(CONFIG_FIELDBUS_DEV) += fieldbus/
obj-$(CONFIG_QLGE) += qlge/

19
drivers/staging/android/Kconfig
View File

@@ -1,19 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
menu "Android"
if ANDROID
config ASHMEM
bool "Enable the Anonymous Shared Memory Subsystem"
depends on SHMEM
help
The ashmem subsystem is a new shared memory allocator, similar to
POSIX SHM but with different behavior and sporting a simpler
file-based API.
It is, in theory, a good memory allocator for low-memory devices,
because it can discard shared memory units when under memory pressure.
endif # if ANDROID
endmenu

4
drivers/staging/android/Makefile
View File

@@ -1,4 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
ccflags-y += -I$(src) # needed for trace events
obj-$(CONFIG_ASHMEM) += ashmem.o

8
drivers/staging/android/TODO
View File

@@ -1,8 +0,0 @@
TODO:
- sparse fixes
- rename files to be not so "generic"
- add proper arch dependencies as needed
- audit userspace interfaces to make sure they are sane
Please send patches to Greg Kroah-Hartman <greg@kroah.com> and Cc:
Arve Hjønnevåg <arve@android.com> and Riley Andrews <riandrews@android.com>

970
drivers/staging/android/ashmem.c
View File

@@ -1,970 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/* mm/ashmem.c
*
* Anonymous Shared Memory Subsystem, ashmem
*
* Copyright (C) 2008 Google, Inc.
*
* Robert Love <rlove@google.com>
*/
#define pr_fmt(fmt) "ashmem: " fmt
#include <linux/init.h>
#include <linux/export.h>
#include <linux/file.h>
#include <linux/fs.h>
#include <linux/falloc.h>
#include <linux/miscdevice.h>
#include <linux/security.h>
#include <linux/mm.h>
#include <linux/mman.h>
#include <linux/uaccess.h>
#include <linux/personality.h>
#include <linux/bitops.h>
#include <linux/mutex.h>
#include <linux/shmem_fs.h>
#include "ashmem.h"
#define ASHMEM_NAME_PREFIX "dev/ashmem/"
#define ASHMEM_NAME_PREFIX_LEN (sizeof(ASHMEM_NAME_PREFIX) - 1)
#define ASHMEM_FULL_NAME_LEN (ASHMEM_NAME_LEN + ASHMEM_NAME_PREFIX_LEN)
/**
* struct ashmem_area - The anonymous shared memory area
* @name: The optional name in /proc/pid/maps
* @unpinned_list: The list of all ashmem areas
* @file: The shmem-based backing file
* @size: The size of the mapping, in bytes
* @prot_mask: The allowed protection bits, as vm_flags
*
* The lifecycle of this structure is from our parent file's open() until
* its release(). It is also protected by 'ashmem_mutex'
*
* Warning: Mappings do NOT pin this structure; It dies on close()
*/
struct ashmem_area {
char name[ASHMEM_FULL_NAME_LEN];
struct list_head unpinned_list;
struct file *file;
size_t size;
unsigned long prot_mask;
};
/**
* struct ashmem_range - A range of unpinned/evictable pages
* @lru: The entry in the LRU list
* @unpinned: The entry in its area's unpinned list
* @asma: The associated anonymous shared memory area.
* @pgstart: The starting page (inclusive)
* @pgend: The ending page (inclusive)
* @purged: The purge status (ASHMEM_NOT or ASHMEM_WAS_PURGED)
*
* The lifecycle of this structure is from unpin to pin.
* It is protected by 'ashmem_mutex'
*/
struct ashmem_range {
struct list_head lru;
struct list_head unpinned;
struct ashmem_area *asma;
size_t pgstart;
size_t pgend;
unsigned int purged;
};
/* LRU list of unpinned pages, protected by ashmem_mutex */
static LIST_HEAD(ashmem_lru_list);
static atomic_t ashmem_shrink_inflight = ATOMIC_INIT(0);
static DECLARE_WAIT_QUEUE_HEAD(ashmem_shrink_wait);
/*
* long lru_count - The count of pages on our LRU list.
*
* This is protected by ashmem_mutex.
*/
static unsigned long lru_count;
/*
* ashmem_mutex - protects the list of and each individual ashmem_area
*
* Lock Ordering: ashmex_mutex -> i_mutex -> i_alloc_sem
*/
static DEFINE_MUTEX(ashmem_mutex);
static struct kmem_cache *ashmem_area_cachep __read_mostly;
static struct kmem_cache *ashmem_range_cachep __read_mostly;
/*
* A separate lockdep class for the backing shmem inodes to resolve the lockdep
* warning about the race between kswapd taking fs_reclaim before inode_lock
* and write syscall taking inode_lock and then fs_reclaim.
* Note that such race is impossible because ashmem does not support write
* syscalls operating on the backing shmem.
*/
static struct lock_class_key backing_shmem_inode_class;
static inline unsigned long range_size(struct ashmem_range *range)
{
return range->pgend - range->pgstart + 1;
}
static inline bool range_on_lru(struct ashmem_range *range)
{
return range->purged == ASHMEM_NOT_PURGED;
}
static inline bool page_range_subsumes_range(struct ashmem_range *range,
size_t start, size_t end)
{
return (range->pgstart >= start) && (range->pgend <= end);
}
static inline bool page_range_subsumed_by_range(struct ashmem_range *range,
size_t start, size_t end)
{
return (range->pgstart <= start) && (range->pgend >= end);
}
static inline bool page_in_range(struct ashmem_range *range, size_t page)
{
return (range->pgstart <= page) && (range->pgend >= page);
}
static inline bool page_range_in_range(struct ashmem_range *range,
size_t start, size_t end)
{
return page_in_range(range, start) || page_in_range(range, end) ||
page_range_subsumes_range(range, start, end);
}
static inline bool range_before_page(struct ashmem_range *range,
size_t page)
{
return range->pgend < page;
}
#define PROT_MASK (PROT_EXEC | PROT_READ | PROT_WRITE)
/**
* lru_add() - Adds a range of memory to the LRU list
* @range: The memory range being added.
*
* The range is first added to the end (tail) of the LRU list.
* After this, the size of the range is added to @lru_count
*/
static inline void lru_add(struct ashmem_range *range)
{
list_add_tail(&range->lru, &ashmem_lru_list);
lru_count += range_size(range);
}
/**
* lru_del() - Removes a range of memory from the LRU list
* @range: The memory range being removed
*
* The range is first deleted from the LRU list.
* After this, the size of the range is removed from @lru_count
*/
static inline void lru_del(struct ashmem_range *range)
{
list_del(&range->lru);
lru_count -= range_size(range);
}
/**
* range_alloc() - Allocates and initializes a new ashmem_range structure
* @asma: The associated ashmem_area
* @prev_range: The previous ashmem_range in the sorted asma->unpinned list
* @purged: Initial purge status (ASMEM_NOT_PURGED or ASHMEM_WAS_PURGED)
* @start: The starting page (inclusive)
* @end: The ending page (inclusive)
* @new_range: The placeholder for the new range
*
* This function is protected by ashmem_mutex.
*/
static void range_alloc(struct ashmem_area *asma,
struct ashmem_range *prev_range, unsigned int purged,
size_t start, size_t end,
struct ashmem_range **new_range)
{
struct ashmem_range *range = *new_range;
*new_range = NULL;
range->asma = asma;
range->pgstart = start;
range->pgend = end;
range->purged = purged;
list_add_tail(&range->unpinned, &prev_range->unpinned);
if (range_on_lru(range))
lru_add(range);
}
/**
* range_del() - Deletes and deallocates an ashmem_range structure
* @range: The associated ashmem_range that has previously been allocated
*/
static void range_del(struct ashmem_range *range)
{
list_del(&range->unpinned);
if (range_on_lru(range))
lru_del(range);
kmem_cache_free(ashmem_range_cachep, range);
}
/**
* range_shrink() - Shrinks an ashmem_range
* @range: The associated ashmem_range being shrunk
* @start: The starting byte of the new range
* @end: The ending byte of the new range
*
* This does not modify the data inside the existing range in any way - It
* simply shrinks the boundaries of the range.
*
* Theoretically, with a little tweaking, this could eventually be changed
* to range_resize, and expand the lru_count if the new range is larger.
*/
static inline void range_shrink(struct ashmem_range *range,
size_t start, size_t end)
{
size_t pre = range_size(range);
range->pgstart = start;
range->pgend = end;
if (range_on_lru(range))
lru_count -= pre - range_size(range);
}
/**
* ashmem_open() - Opens an Anonymous Shared Memory structure
* @inode: The backing file's index node(?)
* @file: The backing file
*
* Please note that the ashmem_area is not returned by this function - It is
* instead written to "file->private_data".
*
* Return: 0 if successful, or another code if unsuccessful.
*/
static int ashmem_open(struct inode *inode, struct file *file)
{
struct ashmem_area *asma;
int ret;
ret = generic_file_open(inode, file);
if (ret)
return ret;
asma = kmem_cache_zalloc(ashmem_area_cachep, GFP_KERNEL);
if (!asma)
return -ENOMEM;
INIT_LIST_HEAD(&asma->unpinned_list);
memcpy(asma->name, ASHMEM_NAME_PREFIX, ASHMEM_NAME_PREFIX_LEN);
asma->prot_mask = PROT_MASK;
file->private_data = asma;
return 0;
}
/**
* ashmem_release() - Releases an Anonymous Shared Memory structure
* @ignored: The backing file's Index Node(?) - It is ignored here.
* @file: The backing file
*
* Return: 0 if successful. If it is anything else, go have a coffee and
* try again.
*/
static int ashmem_release(struct inode *ignored, struct file *file)
{
struct ashmem_area *asma = file->private_data;
struct ashmem_range *range, *next;
mutex_lock(&ashmem_mutex);
list_for_each_entry_safe(range, next, &asma->unpinned_list, unpinned)
range_del(range);
mutex_unlock(&ashmem_mutex);
if (asma->file)
fput(asma->file);
kmem_cache_free(ashmem_area_cachep, asma);
return 0;
}
static ssize_t ashmem_read_iter(struct kiocb *iocb, struct iov_iter *iter)
{
struct ashmem_area *asma = iocb->ki_filp->private_data;
int ret = 0;
mutex_lock(&ashmem_mutex);
/* If size is not set, or set to 0, always return EOF. */
if (asma->size == 0)
goto out_unlock;
if (!asma->file) {
ret = -EBADF;
goto out_unlock;
}
/*
* asma and asma->file are used outside the lock here. We assume
* once asma->file is set it will never be changed, and will not
* be destroyed until all references to the file are dropped and
* ashmem_release is called.
*/
mutex_unlock(&ashmem_mutex);
ret = vfs_iter_read(asma->file, iter, &iocb->ki_pos, 0);
mutex_lock(&ashmem_mutex);
if (ret > 0)
asma->file->f_pos = iocb->ki_pos;
out_unlock:
mutex_unlock(&ashmem_mutex);
return ret;
}
static loff_t ashmem_llseek(struct file *file, loff_t offset, int origin)
{
struct ashmem_area *asma = file->private_data;
loff_t ret;
mutex_lock(&ashmem_mutex);
if (asma->size == 0) {
mutex_unlock(&ashmem_mutex);
return -EINVAL;
}
if (!asma->file) {
mutex_unlock(&ashmem_mutex);
return -EBADF;
}
mutex_unlock(&ashmem_mutex);
ret = vfs_llseek(asma->file, offset, origin);
if (ret < 0)
return ret;
/** Copy f_pos from backing file, since f_ops->llseek() sets it */
file->f_pos = asma->file->f_pos;
return ret;
}
static inline vm_flags_t calc_vm_may_flags(unsigned long prot)
{
return _calc_vm_trans(prot, PROT_READ, VM_MAYREAD) |
_calc_vm_trans(prot, PROT_WRITE, VM_MAYWRITE) |
_calc_vm_trans(prot, PROT_EXEC, VM_MAYEXEC);
}
static int ashmem_vmfile_mmap(struct file *file, struct vm_area_struct *vma)
{
/* do not allow to mmap ashmem backing shmem file directly */
return -EPERM;
}
static unsigned long
ashmem_vmfile_get_unmapped_area(struct file *file, unsigned long addr,
unsigned long len, unsigned long pgoff,
unsigned long flags)
{
return current->mm->get_unmapped_area(file, addr, len, pgoff, flags);
}
static int ashmem_mmap(struct file *file, struct vm_area_struct *vma)
{
static struct file_operations vmfile_fops;
struct ashmem_area *asma = file->private_data;
int ret = 0;
mutex_lock(&ashmem_mutex);
/* user needs to SET_SIZE before mapping */
if (!asma->size) {
ret = -EINVAL;
goto out;
}
/* requested mapping size larger than object size */
if (vma->vm_end - vma->vm_start > PAGE_ALIGN(asma->size)) {
ret = -EINVAL;
goto out;
}
/* requested protection bits must match our allowed protection mask */
if ((vma->vm_flags & ~calc_vm_prot_bits(asma->prot_mask, 0)) &
calc_vm_prot_bits(PROT_MASK, 0)) {
ret = -EPERM;
goto out;
}
vma->vm_flags &= ~calc_vm_may_flags(~asma->prot_mask);
if (!asma->file) {
char *name = ASHMEM_NAME_DEF;
struct file *vmfile;
struct inode *inode;
if (asma->name[ASHMEM_NAME_PREFIX_LEN] != '\0')
name = asma->name;
/* ... and allocate the backing shmem file */
vmfile = shmem_file_setup(name, asma->size, vma->vm_flags);
if (IS_ERR(vmfile)) {
ret = PTR_ERR(vmfile);
goto out;
}
vmfile->f_mode |= FMODE_LSEEK;
inode = file_inode(vmfile);
lockdep_set_class(&inode->i_rwsem, &backing_shmem_inode_class);
asma->file = vmfile;
/*
* override mmap operation of the vmfile so that it can't be
* remapped which would lead to creation of a new vma with no
* asma permission checks. Have to override get_unmapped_area
* as well to prevent VM_BUG_ON check for f_ops modification.
*/
if (!vmfile_fops.mmap) {
vmfile_fops = *vmfile->f_op;
vmfile_fops.mmap = ashmem_vmfile_mmap;
vmfile_fops.get_unmapped_area =
ashmem_vmfile_get_unmapped_area;
}
vmfile->f_op = &vmfile_fops;
}
get_file(asma->file);
/*
* XXX - Reworked to use shmem_zero_setup() instead of
* shmem_set_file while we're in staging. -jstultz
*/
if (vma->vm_flags & VM_SHARED) {
ret = shmem_zero_setup(vma);
if (ret) {
fput(asma->file);
goto out;
}
} else {
vma_set_anonymous(vma);
}
vma_set_file(vma, asma->file);
/* XXX: merge this with the get_file() above if possible */
fput(asma->file);
out:
mutex_unlock(&ashmem_mutex);
return ret;
}
/*
* ashmem_shrink - our cache shrinker, called from mm/vmscan.c
*
* 'nr_to_scan' is the number of objects to scan for freeing.
*
* 'gfp_mask' is the mask of the allocation that got us into this mess.
*
* Return value is the number of objects freed or -1 if we cannot
* proceed without risk of deadlock (due to gfp_mask).
*
* We approximate LRU via least-recently-unpinned, jettisoning unpinned partial
* chunks of ashmem regions LRU-wise one-at-a-time until we hit 'nr_to_scan'
* pages freed.
*/
static unsigned long
ashmem_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
{
unsigned long freed = 0;
/* We might recurse into filesystem code, so bail out if necessary */
if (!(sc->gfp_mask & __GFP_FS))
return SHRINK_STOP;
if (!mutex_trylock(&ashmem_mutex))
return -1;
while (!list_empty(&ashmem_lru_list)) {
struct ashmem_range *range =
list_first_entry(&ashmem_lru_list, typeof(*range), lru);
loff_t start = range->pgstart * PAGE_SIZE;
loff_t end = (range->pgend + 1) * PAGE_SIZE;
struct file *f = range->asma->file;
get_file(f);
atomic_inc(&ashmem_shrink_inflight);
range->purged = ASHMEM_WAS_PURGED;
lru_del(range);
freed += range_size(range);
mutex_unlock(&ashmem_mutex);
f->f_op->fallocate(f,
FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
start, end - start);
fput(f);
if (atomic_dec_and_test(&ashmem_shrink_inflight))
wake_up_all(&ashmem_shrink_wait);
if (!mutex_trylock(&ashmem_mutex))
goto out;
if (--sc->nr_to_scan <= 0)
break;
}
mutex_unlock(&ashmem_mutex);
out:
return freed;
}
static unsigned long
ashmem_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
{
/*
* note that lru_count is count of pages on the lru, not a count of
* objects on the list. This means the scan function needs to return the
* number of pages freed, not the number of objects scanned.
*/
return lru_count;
}
static struct shrinker ashmem_shrinker = {
.count_objects = ashmem_shrink_count,
.scan_objects = ashmem_shrink_scan,
/*
* XXX (dchinner): I wish people would comment on why they need on
* significant changes to the default value here
*/
.seeks = DEFAULT_SEEKS * 4,
};
static int set_prot_mask(struct ashmem_area *asma, unsigned long prot)
{
int ret = 0;
mutex_lock(&ashmem_mutex);
/* the user can only remove, not add, protection bits */
if ((asma->prot_mask & prot) != prot) {
ret = -EINVAL;
goto out;
}
/* does the application expect PROT_READ to imply PROT_EXEC? */
if ((prot & PROT_READ) && (current->personality & READ_IMPLIES_EXEC))
prot |= PROT_EXEC;
asma->prot_mask = prot;
out:
mutex_unlock(&ashmem_mutex);
return ret;
}
static int set_name(struct ashmem_area *asma, void __user *name)
{
int len;
int ret = 0;
char local_name[ASHMEM_NAME_LEN];
/*
* Holding the ashmem_mutex while doing a copy_from_user might cause
* an data abort which would try to access mmap_lock. If another
* thread has invoked ashmem_mmap then it will be holding the
* semaphore and will be waiting for ashmem_mutex, there by leading to
* deadlock. We'll release the mutex and take the name to a local
* variable that does not need protection and later copy the local
* variable to the structure member with lock held.
*/
len = strncpy_from_user(local_name, name, ASHMEM_NAME_LEN);
if (len < 0)
return len;
mutex_lock(&ashmem_mutex);
/* cannot change an existing mapping's name */
if (asma->file)
ret = -EINVAL;
else
strscpy(asma->name + ASHMEM_NAME_PREFIX_LEN, local_name,
ASHMEM_NAME_LEN);
mutex_unlock(&ashmem_mutex);
return ret;
}
static int get_name(struct ashmem_area *asma, void __user *name)
{
int ret = 0;
size_t len;
/*
* Have a local variable to which we'll copy the content
* from asma with the lock held. Later we can copy this to the user
* space safely without holding any locks. So even if we proceed to
* wait for mmap_lock, it won't lead to deadlock.
*/
char local_name[ASHMEM_NAME_LEN];
mutex_lock(&ashmem_mutex);
if (asma->name[ASHMEM_NAME_PREFIX_LEN] != '\0') {
/*
* Copying only `len', instead of ASHMEM_NAME_LEN, bytes
* prevents us from revealing one user's stack to another.
*/
len = strlen(asma->name + ASHMEM_NAME_PREFIX_LEN) + 1;
memcpy(local_name, asma->name + ASHMEM_NAME_PREFIX_LEN, len);
} else {
len = sizeof(ASHMEM_NAME_DEF);
memcpy(local_name, ASHMEM_NAME_DEF, len);
}
mutex_unlock(&ashmem_mutex);
/*
* Now we are just copying from the stack variable to userland
* No lock held
*/
if (copy_to_user(name, local_name, len))
ret = -EFAULT;
return ret;
}
/*
* ashmem_pin - pin the given ashmem region, returning whether it was
* previously purged (ASHMEM_WAS_PURGED) or not (ASHMEM_NOT_PURGED).
*
* Caller must hold ashmem_mutex.
*/
static int ashmem_pin(struct ashmem_area *asma, size_t pgstart, size_t pgend,
struct ashmem_range **new_range)
{
struct ashmem_range *range, *next;
int ret = ASHMEM_NOT_PURGED;
list_for_each_entry_safe(range, next, &asma->unpinned_list, unpinned) {
/* moved past last applicable page; we can short circuit */
if (range_before_page(range, pgstart))
break;
/*
* The user can ask us to pin pages that span multiple ranges,
* or to pin pages that aren't even unpinned, so this is messy.
*
* Four cases:
* 1. The requested range subsumes an existing range, so we
* just remove the entire matching range.
* 2. The requested range overlaps the start of an existing
* range, so we just update that range.
* 3. The requested range overlaps the end of an existing
* range, so we just update that range.
* 4. The requested range punches a hole in an existing range,
* so we have to update one side of the range and then
* create a new range for the other side.
*/
if (page_range_in_range(range, pgstart, pgend)) {
ret |= range->purged;
/* Case #1: Easy. Just nuke the whole thing. */
if (page_range_subsumes_range(range, pgstart, pgend)) {
range_del(range);
continue;
}
/* Case #2: We overlap from the start, so adjust it */
if (range->pgstart >= pgstart) {
range_shrink(range, pgend + 1, range->pgend);
continue;
}
/* Case #3: We overlap from the rear, so adjust it */
if (range->pgend <= pgend) {
range_shrink(range, range->pgstart,
pgstart - 1);
continue;
}
/*
* Case #4: We eat a chunk out of the middle. A bit
* more complicated, we allocate a new range for the
* second half and adjust the first chunk's endpoint.
*/
range_alloc(asma, range, range->purged,
pgend + 1, range->pgend, new_range);
range_shrink(range, range->pgstart, pgstart - 1);
break;
}
}
return ret;
}
/*
* ashmem_unpin - unpin the given range of pages. Returns zero on success.
*
* Caller must hold ashmem_mutex.
*/
static int ashmem_unpin(struct ashmem_area *asma, size_t pgstart, size_t pgend,
struct ashmem_range **new_range)
{
struct ashmem_range *range, *next;
unsigned int purged = ASHMEM_NOT_PURGED;
restart:
list_for_each_entry_safe(range, next, &asma->unpinned_list, unpinned) {
/* short circuit: this is our insertion point */
if (range_before_page(range, pgstart))
break;
/*
* The user can ask us to unpin pages that are already entirely
* or partially pinned. We handle those two cases here.
*/
if (page_range_subsumed_by_range(range, pgstart, pgend))
return 0;
if (page_range_in_range(range, pgstart, pgend)) {
pgstart = min(range->pgstart, pgstart);
pgend = max(range->pgend, pgend);
purged |= range->purged;
range_del(range);
goto restart;
}
}
range_alloc(asma, range, purged, pgstart, pgend, new_range);
return 0;
}
/*
* ashmem_get_pin_status - Returns ASHMEM_IS_UNPINNED if _any_ pages in the
* given interval are unpinned and ASHMEM_IS_PINNED otherwise.
*
* Caller must hold ashmem_mutex.
*/
static int ashmem_get_pin_status(struct ashmem_area *asma, size_t pgstart,
size_t pgend)
{
struct ashmem_range *range;
int ret = ASHMEM_IS_PINNED;
list_for_each_entry(range, &asma->unpinned_list, unpinned) {
if (range_before_page(range, pgstart))
break;
if (page_range_in_range(range, pgstart, pgend)) {
ret = ASHMEM_IS_UNPINNED;
break;
}
}
return ret;
}
static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd,
void __user *p)
{
struct ashmem_pin pin;
size_t pgstart, pgend;
int ret = -EINVAL;
struct ashmem_range *range = NULL;
if (copy_from_user(&pin, p, sizeof(pin)))
return -EFAULT;
if (cmd == ASHMEM_PIN || cmd == ASHMEM_UNPIN) {
range = kmem_cache_zalloc(ashmem_range_cachep, GFP_KERNEL);
if (!range)
return -ENOMEM;
}
mutex_lock(&ashmem_mutex);
wait_event(ashmem_shrink_wait, !atomic_read(&ashmem_shrink_inflight));
if (!asma->file)
goto out_unlock;
/* per custom, you can pass zero for len to mean "everything onward" */
if (!pin.len)
pin.len = PAGE_ALIGN(asma->size) - pin.offset;
if ((pin.offset | pin.len) & ~PAGE_MASK)
goto out_unlock;
if (((__u32)-1) - pin.offset < pin.len)
goto out_unlock;
if (PAGE_ALIGN(asma->size) < pin.offset + pin.len)
goto out_unlock;
pgstart = pin.offset / PAGE_SIZE;
pgend = pgstart + (pin.len / PAGE_SIZE) - 1;
switch (cmd) {
case ASHMEM_PIN:
ret = ashmem_pin(asma, pgstart, pgend, &range);
break;
case ASHMEM_UNPIN:
ret = ashmem_unpin(asma, pgstart, pgend, &range);
break;
case ASHMEM_GET_PIN_STATUS:
ret = ashmem_get_pin_status(asma, pgstart, pgend);
break;
}
out_unlock:
mutex_unlock(&ashmem_mutex);
if (range)
kmem_cache_free(ashmem_range_cachep, range);
return ret;
}
static long ashmem_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
struct ashmem_area *asma = file->private_data;
long ret = -ENOTTY;
switch (cmd) {
case ASHMEM_SET_NAME:
ret = set_name(asma, (void __user *)arg);
break;
case ASHMEM_GET_NAME:
ret = get_name(asma, (void __user *)arg);
break;
case ASHMEM_SET_SIZE:
ret = -EINVAL;
mutex_lock(&ashmem_mutex);
if (!asma->file) {
ret = 0;
asma->size = (size_t)arg;
}
mutex_unlock(&ashmem_mutex);
break;
case ASHMEM_GET_SIZE:
ret = asma->size;
break;
case ASHMEM_SET_PROT_MASK:
ret = set_prot_mask(asma, arg);
break;
case ASHMEM_GET_PROT_MASK:
ret = asma->prot_mask;
break;
case ASHMEM_PIN:
case ASHMEM_UNPIN:
case ASHMEM_GET_PIN_STATUS:
ret = ashmem_pin_unpin(asma, cmd, (void __user *)arg);
break;
case ASHMEM_PURGE_ALL_CACHES:
ret = -EPERM;
if (capable(CAP_SYS_ADMIN)) {
struct shrink_control sc = {
.gfp_mask = GFP_KERNEL,
.nr_to_scan = LONG_MAX,
};
ret = ashmem_shrink_count(&ashmem_shrinker, &sc);
ashmem_shrink_scan(&ashmem_shrinker, &sc);
}
break;
}
return ret;
}
/* support of 32bit userspace on 64bit platforms */
#ifdef CONFIG_COMPAT
static long compat_ashmem_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
switch (cmd) {
case COMPAT_ASHMEM_SET_SIZE:
cmd = ASHMEM_SET_SIZE;
break;
case COMPAT_ASHMEM_SET_PROT_MASK:
cmd = ASHMEM_SET_PROT_MASK;
break;
}
return ashmem_ioctl(file, cmd, arg);
}
#endif
#ifdef CONFIG_PROC_FS
static void ashmem_show_fdinfo(struct seq_file *m, struct file *file)
{
struct ashmem_area *asma = file->private_data;
mutex_lock(&ashmem_mutex);
if (asma->file)
seq_printf(m, "inode:\t%ld\n", file_inode(asma->file)->i_ino);
if (asma->name[ASHMEM_NAME_PREFIX_LEN] != '\0')
seq_printf(m, "name:\t%s\n",
asma->name + ASHMEM_NAME_PREFIX_LEN);
seq_printf(m, "size:\t%zu\n", asma->size);
mutex_unlock(&ashmem_mutex);
}
#endif
static const struct file_operations ashmem_fops = {
.owner = THIS_MODULE,
.open = ashmem_open,
.release = ashmem_release,
.read_iter = ashmem_read_iter,
.llseek = ashmem_llseek,
.mmap = ashmem_mmap,
.unlocked_ioctl = ashmem_ioctl,
#ifdef CONFIG_COMPAT
.compat_ioctl = compat_ashmem_ioctl,
#endif
#ifdef CONFIG_PROC_FS
.show_fdinfo = ashmem_show_fdinfo,
#endif
};
static struct miscdevice ashmem_misc = {
.minor = MISC_DYNAMIC_MINOR,
.name = "ashmem",
.fops = &ashmem_fops,
};
static int __init ashmem_init(void)
{
int ret = -ENOMEM;
ashmem_area_cachep = kmem_cache_create("ashmem_area_cache",
sizeof(struct ashmem_area),
0, 0, NULL);
if (!ashmem_area_cachep) {
pr_err("failed to create slab cache\n");
goto out;
}
ashmem_range_cachep = kmem_cache_create("ashmem_range_cache",
sizeof(struct ashmem_range),
0, SLAB_RECLAIM_ACCOUNT, NULL);
if (!ashmem_range_cachep) {
pr_err("failed to create slab cache\n");
goto out_free1;
}
ret = misc_register(&ashmem_misc);
if (ret) {
pr_err("failed to register misc device!\n");
goto out_free2;
}
ret = register_shrinker(&ashmem_shrinker);
if (ret) {
pr_err("failed to register shrinker!\n");
goto out_demisc;
}
pr_info("initialized\n");
return 0;
out_demisc:
misc_deregister(&ashmem_misc);
out_free2:
kmem_cache_destroy(ashmem_range_cachep);
out_free1:
kmem_cache_destroy(ashmem_area_cachep);
out:
return ret;
}
device_initcall(ashmem_init);

24
drivers/staging/android/ashmem.h
View File

@@ -1,24 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 OR Apache-2.0 */
/*
* include/linux/ashmem.h
*
* Copyright 2008 Google Inc.
* Author: Robert Love
*/
#ifndef _LINUX_ASHMEM_H
#define _LINUX_ASHMEM_H
#include <linux/limits.h>
#include <linux/ioctl.h>
#include <linux/compat.h>
#include "uapi/ashmem.h"
/* support of 32bit userspace on 64bit platforms */
#ifdef CONFIG_COMPAT
#define COMPAT_ASHMEM_SET_SIZE _IOW(__ASHMEMIOC, 3, compat_size_t)
#define COMPAT_ASHMEM_SET_PROT_MASK _IOW(__ASHMEMIOC, 5, unsigned int)
#endif
#endif /* _LINUX_ASHMEM_H */

43
drivers/staging/android/uapi/ashmem.h
View File

@@ -1,43 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 OR Apache-2.0 */
/*
* Copyright 2008 Google Inc.
* Author: Robert Love
*/
#ifndef _UAPI_LINUX_ASHMEM_H
#define _UAPI_LINUX_ASHMEM_H
#include <linux/ioctl.h>
#include <linux/types.h>
#define ASHMEM_NAME_LEN 256
#define ASHMEM_NAME_DEF "dev/ashmem"
/* Return values from ASHMEM_PIN: Was the mapping purged while unpinned? */
#define ASHMEM_NOT_PURGED 0
#define ASHMEM_WAS_PURGED 1
/* Return values from ASHMEM_GET_PIN_STATUS: Is the mapping pinned? */
#define ASHMEM_IS_UNPINNED 0
#define ASHMEM_IS_PINNED 1
struct ashmem_pin {
__u32 offset; /* offset into region, in bytes, page-aligned */
__u32 len; /* length forward from offset, in bytes, page-aligned */
};
#define __ASHMEMIOC 0x77
#define ASHMEM_SET_NAME _IOW(__ASHMEMIOC, 1, char[ASHMEM_NAME_LEN])
#define ASHMEM_GET_NAME _IOR(__ASHMEMIOC, 2, char[ASHMEM_NAME_LEN])
#define ASHMEM_SET_SIZE _IOW(__ASHMEMIOC, 3, size_t)
#define ASHMEM_GET_SIZE _IO(__ASHMEMIOC, 4)
#define ASHMEM_SET_PROT_MASK _IOW(__ASHMEMIOC, 5, unsigned long)
#define ASHMEM_GET_PROT_MASK _IO(__ASHMEMIOC, 6)
#define ASHMEM_PIN _IOW(__ASHMEMIOC, 7, struct ashmem_pin)
#define ASHMEM_UNPIN _IOW(__ASHMEMIOC, 8, struct ashmem_pin)
#define ASHMEM_GET_PIN_STATUS _IO(__ASHMEMIOC, 9)
#define ASHMEM_PURGE_ALL_CACHES _IO(__ASHMEMIOC, 10)
#endif /* _UAPI_LINUX_ASHMEM_H */

9
drivers/staging/fbtft/fbtft-core.c
View File

@@ -49,7 +49,7 @@ int fbtft_write_buf_dc(struct fbtft_par *par, void *buf, size_t len, int dc)
EXPORT_SYMBOL(fbtft_write_buf_dc);
void fbtft_dbg_hex(const struct device *dev, int groupsize,
void *buf, size_t len, const char *fmt, ...)
const void *buf, size_t len, const char *fmt, ...)
{
va_list args;
static char textbuf[512];
@@ -1035,10 +1035,9 @@ int fbtft_init_display(struct fbtft_par *par)
for (j = 0; par->init_sequence[i + 1 + j] >= 0; j++)
;
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par,
"init: write(0x%02X) %*ph\n",
par->init_sequence[i], j,
&par->init_sequence[i + 1]);
fbtft_par_dbg_hex(DEBUG_INIT_DISPLAY, par, par->info->device,
s16, &par->init_sequence[i + 1], j,
"init: write(0x%02X)", par->init_sequence[i]);
/* Write */
j = 0;

2
drivers/staging/fbtft/fbtft.h
View File

@@ -240,7 +240,7 @@ struct fbtft_par {
int fbtft_write_buf_dc(struct fbtft_par *par, void *buf, size_t len, int dc);
__printf(5, 6)
void fbtft_dbg_hex(const struct device *dev, int groupsize,
void *buf, size_t len, const char *fmt, ...);
const void *buf, size_t len, const char *fmt, ...);
struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,
struct device *dev,
struct fbtft_platform_data *pdata);

1
drivers/staging/gdm724x/gdm_lte.c
View File

@@ -195,7 +195,6 @@ static __sum16 icmp6_checksum(struct ipv6hdr *ipv6, u16 *ptr, int len)
pseudo_header.ph.ph_len = be16_to_cpu(ipv6->payload_len);
pseudo_header.ph.ph_nxt = ipv6->nexthdr;
w = (u16 *)&pseudo_header;
for (i = 0; i < ARRAY_SIZE(pseudo_header.pa); i++) {
pa = pseudo_header.pa[i];
sum = csum_add(sum, csum_unfold((__force __sum16)pa));

2
drivers/staging/gdm724x/hci_packet.h
View File

@@ -34,7 +34,7 @@ struct hci_packet {
struct tlv {
u8 type;
u8 len;
u8 *data[1];
u8 *data[];
} __packed;
struct sdu_header {

64
drivers/staging/greybus/pwm.c
View File

@@ -204,43 +204,59 @@ static void gb_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
gb_pwm_deactivate_operation(pwmc, pwm->hwpwm);
}
static int gb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
int duty_ns, int period_ns)
static int gb_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
const struct pwm_state *state)
{
int err;
bool enabled = pwm->state.enabled;
u64 period = state->period;
u64 duty_cycle = state->duty_cycle;
struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip);
return gb_pwm_config_operation(pwmc, pwm->hwpwm, duty_ns, period_ns);
};
/* Set polarity */
if (state->polarity != pwm->state.polarity) {
if (enabled) {
gb_pwm_disable_operation(pwmc, pwm->hwpwm);
enabled = false;
}
err = gb_pwm_set_polarity_operation(pwmc, pwm->hwpwm, state->polarity);
if (err)
return err;
}
static int gb_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
enum pwm_polarity polarity)
{
struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip);
if (!state->enabled) {
if (enabled)
gb_pwm_disable_operation(pwmc, pwm->hwpwm);
return 0;
}
return gb_pwm_set_polarity_operation(pwmc, pwm->hwpwm, polarity);
};
/*
* Set period and duty cycle
*
* PWM privodes 64-bit period and duty_cycle, but greybus only accepts
* 32-bit, so their values have to be limited to U32_MAX.
*/
if (period > U32_MAX)
period = U32_MAX;
static int gb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip);
if (duty_cycle > period)
duty_cycle = period;
return gb_pwm_enable_operation(pwmc, pwm->hwpwm);
};
err = gb_pwm_config_operation(pwmc, pwm->hwpwm, duty_cycle, period);
if (err)
return err;
static void gb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip);
/* enable/disable */
if (!enabled)
return gb_pwm_enable_operation(pwmc, pwm->hwpwm);
gb_pwm_disable_operation(pwmc, pwm->hwpwm);
};
return 0;
}
static const struct pwm_ops gb_pwm_ops = {
.request = gb_pwm_request,
.free = gb_pwm_free,
.config = gb_pwm_config,
.set_polarity = gb_pwm_set_polarity,
.enable = gb_pwm_enable,
.disable = gb_pwm_disable,
.apply = gb_pwm_apply,
.owner = THIS_MODULE,
};

1
drivers/staging/greybus/sdio.c
View File

@@ -858,7 +858,6 @@ static void gb_sdio_remove(struct gbphy_device *gbphy_dev)
gb_connection_set_data(connection, NULL);
mutex_unlock(&host->lock);
flush_workqueue(host->mrq_workqueue);
destroy_workqueue(host->mrq_workqueue);
gb_connection_disable_rx(connection);
mmc_remove_host(mmc);

8
drivers/staging/gs_fpgaboot/Kconfig
View File

@@ -1,8 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
#
# "xilinx FPGA firmware download, fpgaboot"
#
config GS_FPGABOOT
tristate "Xilinx FPGA firmware download module"
help
Xilinx FPGA firmware download module

3
drivers/staging/gs_fpgaboot/Makefile
View File

@@ -1,3 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
gs_fpga-y += gs_fpgaboot.o io.o
obj-$(CONFIG_GS_FPGABOOT) += gs_fpga.o

70
drivers/staging/gs_fpgaboot/README
View File

@@ -1,70 +0,0 @@
==============================================================================
Linux Driver Source for Xilinx FPGA firmware download
==============================================================================
TABLE OF CONTENTS.
1. SUMMARY
2. BACKGROUND
3. DESIGN
4. HOW TO USE
5. REFERENCE
1. SUMMARY
- Download Xilinx FPGA firmware
- This module downloads Xilinx FPGA firmware using gpio pins.
2. BACKGROUND
An FPGA (Field Programmable Gate Array) is a programmable hardware that is
used in various applications. Hardware design needs to programmed through
a dedicated device or CPU assisted way (serial or parallel).
This driver provides a way to download FPGA firmware.
3. DESIGN
- load Xilinx FPGA bitstream format[1] firmware image file using
kernel firmware framework, request_firmware()
- program the Xilinx FPGA using SelectMAP (parallel) mode [2]
- FPGA prgram is done by gpio based bit-banging, as an example
- platform independent file: gs_fpgaboot.c
- platform dependent file: io.c
4. HOW TO USE
$ insmod gs_fpga.ko file="xlinx_fpga_top_bitstream.bit"
$ rmmod gs_fpga
5. USE CASE (from a mailing list discussion with Greg)
a. As an FPGA development support tool,
During FPGA firmware development, you need to download a new FPGA
image frequently.
You would do that with a dedicated JTAG, which usually a limited
resource in the lab.
However, if you use my driver, you don't have to have a dedicated JTAG.
This is a real gain :)
b. For the FPGA that runs without config after the download, which
doesn't talk to any of Linux interfaces (such as PCIE).
We download FPGA firmware from user triggered or some other way, and that's it.
Since that FPGA runs on its own, it doesn't require a linux driver
after the download.
c. For the FPGA that requires config after the download, which talk to
any of linux interfaces (such as PCIE)
Then, this type of FPGA config can be put into device tree and have a
separate driver (pcie or others), then THAT driver calls my driver to
download FPGA firmware during the Linux boot, the take over the device
through the interface.
6. REFERENCE
1. Xilinx APP NOTE XAPP583:
https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
2. bitstream file info:
http://home.earthlink.net/~davesullins/software/bitinfo.html

7
drivers/staging/gs_fpgaboot/TODO
View File

@@ -1,7 +0,0 @@
TODO:
- get bus width input instead of hardcoded bus width
- get it reviewed
Please send any patches for this driver to Insop Song<insop.song@gainspeed.com>
and Greg Kroah-Hartman <gregkh@linuxfoundation.org>.
And please CC to "Staging subsystem" mail list <devel@driverdev.osuosl.org> too.

394
drivers/staging/gs_fpgaboot/gs_fpgaboot.c
View File

@@ -1,394 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/device.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/fs.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/firmware.h>
#include <asm/unaligned.h>
#include "gs_fpgaboot.h"
#include "io.h"
#define DEVICE_NAME "device"
#define CLASS_NAME "fpgaboot"
static u8 bits_magic[] = {
0x0, 0x9, 0xf, 0xf0, 0xf, 0xf0,
0xf, 0xf0, 0xf, 0xf0, 0x0, 0x0, 0x1};
/* fake device for request_firmware */
static struct platform_device *firmware_pdev;
static char *file = "xlinx_fpga_firmware.bit";
module_param(file, charp, 0444);
MODULE_PARM_DESC(file, "Xilinx FPGA firmware file.");
static void read_bitstream(u8 *bitdata, u8 *buf, int *offset, int rdsize)
{
memcpy(buf, bitdata + *offset, rdsize);
*offset += rdsize;
}
static int readinfo_bitstream(u8 *bitdata, u8 *buf, int size, int *offset)
{
u8 tbuf[2];
u16 len;
/* read section char */
read_bitstream(bitdata, tbuf, offset, 1);
/* read length */
read_bitstream(bitdata, tbuf, offset, 2);
len = get_unaligned_be16(tbuf);
if (len >= size) {
pr_err("error: readinfo buffer too small\n");
return -EINVAL;
}
read_bitstream(bitdata, buf, offset, len);
buf[len] = '\0';
return 0;
}
/*
* read bitdata length
*/
static int readlength_bitstream(u8 *bitdata, int *lendata, int *offset)
{
u8 tbuf[4];
/* read section char */
read_bitstream(bitdata, tbuf, offset, 1);
/* make sure it is section 'e' */
if (tbuf[0] != 'e') {
pr_err("error: length section is not 'e', but %c\n", tbuf[0]);
return -EINVAL;
}
/* read 4bytes length */
read_bitstream(bitdata, tbuf, offset, 4);
*lendata = get_unaligned_be32(tbuf);
return 0;
}
/*
* read first 13 bytes to check bitstream magic number
*/
static int readmagic_bitstream(u8 *bitdata, int *offset)
{
u8 buf[13];
int r;
read_bitstream(bitdata, buf, offset, 13);
r = memcmp(buf, bits_magic, 13);
if (r) {
pr_err("error: corrupted header\n");
return -EINVAL;
}
pr_info("bitstream file magic number Ok\n");
*offset = 13; /* magic length */
return 0;
}
/*
* NOTE: supports only bitstream format
*/
static enum fmt_image get_imageformat(void)
{
return f_bit;
}
static void gs_print_header(struct fpgaimage *fimage)
{
pr_info("file: %s\n", fimage->filename);
pr_info("part: %s\n", fimage->part);
pr_info("date: %s\n", fimage->date);
pr_info("time: %s\n", fimage->time);
pr_info("lendata: %d\n", fimage->lendata);
}
static int gs_read_bitstream(struct fpgaimage *fimage)
{
u8 *bitdata;
int offset;
int err;
offset = 0;
bitdata = (u8 *)fimage->fw_entry->data;
err = readmagic_bitstream(bitdata, &offset);
if (err)
return err;
err = readinfo_bitstream(bitdata, fimage->filename, MAX_STR, &offset);
if (err)
return err;
err = readinfo_bitstream(bitdata, fimage->part, MAX_STR, &offset);
if (err)
return err;
err = readinfo_bitstream(bitdata, fimage->date, MAX_STR, &offset);
if (err)
return err;
err = readinfo_bitstream(bitdata, fimage->time, MAX_STR, &offset);
if (err)
return err;
err = readlength_bitstream(bitdata, &fimage->lendata, &offset);
if (err)
return err;
fimage->fpgadata = bitdata + offset;
return 0;
}
static int gs_read_image(struct fpgaimage *fimage)
{
int img_fmt;
int err;
img_fmt = get_imageformat();
switch (img_fmt) {
case f_bit:
pr_info("image is bitstream format\n");
err = gs_read_bitstream(fimage);
if (err)
return err;
break;
default:
pr_err("unsupported fpga image format\n");
return -EINVAL;
}
gs_print_header(fimage);
return 0;
}
static int gs_load_image(struct fpgaimage *fimage, char *fw_file)
{
int err;
pr_info("load fpgaimage %s\n", fw_file);
err = request_firmware(&fimage->fw_entry, fw_file, &firmware_pdev->dev);
if (err != 0) {
pr_err("firmware %s is missing, cannot continue.\n", fw_file);
return err;
}
return 0;
}
static int gs_download_image(struct fpgaimage *fimage, enum wbus bus_bytes)
{
u8 *bitdata;
int size, i, cnt;
cnt = 0;
bitdata = (u8 *)fimage->fpgadata;
size = fimage->lendata;
#ifdef DEBUG_FPGA
print_hex_dump_bytes("bitfile sample: ", DUMP_PREFIX_OFFSET,
bitdata, 0x100);
#endif /* DEBUG_FPGA */
if (!xl_supported_prog_bus_width(bus_bytes)) {
pr_err("unsupported program bus width %d\n",
bus_bytes);
return -EINVAL;
}
/* Bring csi_b, rdwr_b Low and program_b High */
xl_program_b(1);
xl_rdwr_b(0);
xl_csi_b(0);
/* Configuration reset */
xl_program_b(0);
msleep(20);
xl_program_b(1);
/* Wait for Device Initialization */
while (xl_get_init_b() == 0)
;
pr_info("device init done\n");
for (i = 0; i < size; i += bus_bytes)
xl_shift_bytes_out(bus_bytes, bitdata + i);
pr_info("program done\n");
/* Check INIT_B */
if (xl_get_init_b() == 0) {
pr_err("init_b 0\n");
return -EIO;
}
while (xl_get_done_b() == 0) {
if (cnt++ > MAX_WAIT_DONE) {
pr_err("init_B %d\n", xl_get_init_b());
break;
}
}
if (cnt > MAX_WAIT_DONE) {
pr_err("fpga download fail\n");
return -EIO;
}
pr_info("download fpgaimage\n");
/* Compensate for Special Startup Conditions */
xl_shift_cclk(8);
return 0;
}
static int gs_release_image(struct fpgaimage *fimage)
{
release_firmware(fimage->fw_entry);
pr_info("release fpgaimage\n");
return 0;
}
/*
* NOTE: supports systemmap parallel programming
*/
static int gs_set_download_method(struct fpgaimage *fimage)
{
pr_info("set program method\n");
fimage->dmethod = m_systemmap;
pr_info("systemmap program method\n");
return 0;
}
static int init_driver(void)
{
firmware_pdev = platform_device_register_simple("fpgaboot", -1,
NULL, 0);
return PTR_ERR_OR_ZERO(firmware_pdev);
}
static int gs_fpgaboot(void)
{
int err;
struct fpgaimage *fimage;
fimage = kmalloc(sizeof(*fimage), GFP_KERNEL);
if (!fimage)
return -ENOMEM;
err = gs_load_image(fimage, file);
if (err) {
pr_err("gs_load_image error\n");
goto err_out1;
}
err = gs_read_image(fimage);
if (err) {
pr_err("gs_read_image error\n");
goto err_out2;
}
err = gs_set_download_method(fimage);
if (err) {
pr_err("gs_set_download_method error\n");
goto err_out2;
}
err = gs_download_image(fimage, bus_2byte);
if (err) {
pr_err("gs_download_image error\n");
goto err_out2;
}
err = gs_release_image(fimage);
if (err) {
pr_err("gs_release_image error\n");
goto err_out1;
}
kfree(fimage);
return 0;
err_out2:
err = gs_release_image(fimage);
if (err)
pr_err("gs_release_image error\n");
err_out1:
kfree(fimage);
return err;
}
static int __init gs_fpgaboot_init(void)
{
int err;
pr_info("FPGA DOWNLOAD --->\n");
pr_info("FPGA image file name: %s\n", file);
err = init_driver();
if (err) {
pr_err("FPGA DRIVER INIT FAIL!!\n");
return err;
}
err = xl_init_io();
if (err) {
pr_err("GPIO INIT FAIL!!\n");
goto errout;
}
err = gs_fpgaboot();
if (err) {
pr_err("FPGA DOWNLOAD FAIL!!\n");
goto errout;
}
pr_info("FPGA DOWNLOAD DONE <---\n");
return 0;
errout:
platform_device_unregister(firmware_pdev);
return err;
}
static void __exit gs_fpgaboot_exit(void)
{
platform_device_unregister(firmware_pdev);
pr_info("FPGA image download module removed\n");
}
module_init(gs_fpgaboot_init);
module_exit(gs_fpgaboot_exit);
MODULE_AUTHOR("Insop Song");
MODULE_DESCRIPTION("Xlinix FPGA firmware download");
MODULE_LICENSE("GPL");

41
drivers/staging/gs_fpgaboot/gs_fpgaboot.h
View File

@@ -1,41 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
#include <linux/firmware.h>
#define MAX_STR 256
enum fmt_image {
f_bit, /* only bitstream is supported */
f_rbt,
f_bin,
f_mcs,
f_hex,
};
enum mdownload {
m_systemmap, /* only system map is supported */
m_serial,
m_jtag,
};
/*
* xilinx fpgaimage information
* NOTE: use MAX_STR instead of dynamic alloc for simplicity
*/
struct fpgaimage {
enum fmt_image fmt_img;
enum mdownload dmethod;
const struct firmware *fw_entry;
/*
* the following can be read from bitstream,
* but other image format should have as well
*/
char filename[MAX_STR];
char part[MAX_STR];
char date[MAX_STR];
char time[MAX_STR];
int lendata;
u8 *fpgadata;
};

105
drivers/staging/gs_fpgaboot/io.c
View File

@@ -1,105 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/device.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/fs.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/firmware.h>
#include <linux/io.h>
#include "io.h"
static inline void byte0_out(unsigned char data);
static inline void byte1_out(unsigned char data);
static inline void xl_cclk_b(int32_t i);
/* Assert and Deassert CCLK */
void xl_shift_cclk(int count)
{
int i;
for (i = 0; i < count; i++) {
xl_cclk_b(1);
xl_cclk_b(0);
}
}
int xl_supported_prog_bus_width(enum wbus bus_bytes)
{
switch (bus_bytes) {
case bus_1byte:
break;
case bus_2byte:
break;
default:
pr_err("unsupported program bus width %d\n", bus_bytes);
return 0;
}
return 1;
}
/* Serialize byte and clock each bit on target's DIN and CCLK pins */
void xl_shift_bytes_out(enum wbus bus_byte, unsigned char *pdata)
{
/*
* supports 1 and 2 bytes programming mode
*/
if (likely(bus_byte == bus_2byte))
byte0_out(pdata[0]);
byte1_out(pdata[1]);
xl_shift_cclk(1);
}
/*
* generic bit swap for xilinx SYSTEMMAP FPGA programming
*/
void xl_program_b(int32_t i)
{
}
void xl_rdwr_b(int32_t i)
{
}
void xl_csi_b(int32_t i)
{
}
int xl_get_init_b(void)
{
return -1;
}
int xl_get_done_b(void)
{
return -1;
}
static inline void byte0_out(unsigned char data)
{
}
static inline void byte1_out(unsigned char data)
{
}
static inline void xl_cclk_b(int32_t i)
{
}
/*
* configurable per device type for different I/O config
*/
int xl_init_io(void)
{
return -1;
}

73
drivers/staging/gs_fpgaboot/io.h
View File

@@ -1,73 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
#define GPDIR 0
#define GPCFG 4 /* open drain or not */
#define GPDAT 8
/*
* gpio port and pin definitions
* NOTE: port number starts from 0
*/
#define XL_INITN_PORT 1
#define XL_INITN_PIN 14
#define XL_RDWRN_PORT 1
#define XL_RDWRN_PIN 13
#define XL_CCLK_PORT 1
#define XL_CCLK_PIN 10
#define XL_PROGN_PORT 1
#define XL_PROGN_PIN 25
#define XL_CSIN_PORT 1
#define XL_CSIN_PIN 26
#define XL_DONE_PORT 1
#define XL_DONE_PIN 27
/*
* gpio mapping
*
XL_config_D0 – gpio1_31
Xl_config_d1 – gpio1_30
Xl_config_d2 – gpio1_29
Xl_config_d3 – gpio1_28
Xl_config_d4 – gpio1_27
Xl_config_d5 – gpio1_26
Xl_config_d6 – gpio1_25
Xl_config_d7 – gpio1_24
Xl_config_d8 – gpio1_23
Xl_config_d9 – gpio1_22
Xl_config_d10 – gpio1_21
Xl_config_d11 – gpio1_20
Xl_config_d12 – gpio1_19
Xl_config_d13 – gpio1_18
Xl_config_d14 – gpio1_16
Xl_config_d15 – gpio1_14
*
*/
/*
* program bus width in bytes
*/
enum wbus {
bus_1byte = 1,
bus_2byte = 2,
};
#define MAX_WAIT_DONE 10000
struct gpiobus {
int ngpio;
void __iomem *r[4];
};
int xl_supported_prog_bus_width(enum wbus bus_bytes);
void xl_program_b(int32_t i);
void xl_rdwr_b(int32_t i);
void xl_csi_b(int32_t i);
int xl_get_init_b(void);
int xl_get_done_b(void);
void xl_shift_cclk(int count);
void xl_shift_bytes_out(enum wbus bus_byte, unsigned char *pdata);
int xl_init_io(void);

4
drivers/staging/ks7010/ks7010_sdio.c
View File

@@ -1102,10 +1102,8 @@ static void ks7010_sdio_remove(struct sdio_func *func)
if (ret) /* memory allocation failure */
goto err_free_card;
if (priv->wq) {
flush_workqueue(priv->wq);
if (priv->wq)
destroy_workqueue(priv->wq);
}
hostif_exit(priv);

2
drivers/staging/most/net/net.c
View File

@@ -67,7 +67,7 @@ struct net_dev_context {
struct list_head list;
};
static struct list_head net_devices = LIST_HEAD_INIT(net_devices);
static LIST_HEAD(net_devices);
static DEFINE_MUTEX(probe_disc_mt); /* ch->linked = true, most_nd_open */
static DEFINE_SPINLOCK(list_lock); /* list_head, ch->linked = false, dev_hold */
static struct most_component comp;

2
drivers/staging/most/video/video.c
View File

@@ -52,7 +52,7 @@ struct comp_fh {
u32 offs;
};
static struct list_head video_devices = LIST_HEAD_INIT(video_devices);
static LIST_HEAD(video_devices);
static DEFINE_SPINLOCK(list_lock);
static inline bool data_ready(struct most_video_dev *mdev)

11
drivers/staging/mt7621-dts/Kconfig
View File

@@ -1,11 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
config DTB_GNUBEE1
bool "GnuBee1 2.5inch NAS"
depends on SOC_MT7621 && DTB_RT_NONE
select BUILTIN_DTB
config DTB_GNUBEE2
bool "GnuBee2 3.5inch NAS"
depends on SOC_MT7621 && DTB_RT_NONE
select BUILTIN_DTB

5
drivers/staging/mt7621-dts/Makefile
View File

@@ -1,5 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_DTB_GNUBEE1) += gbpc1.dtb
dtb-$(CONFIG_DTB_GNUBEE2) += gbpc2.dtb
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))

5
drivers/staging/mt7621-dts/TODO
View File

@@ -1,5 +0,0 @@
- ensure all usage matches code
- ensure all features used are documented
Cc: NeilBrown <neil@brown.name>

22
drivers/staging/mt7621-dts/gbpc2.dts
View File

@@ -1,22 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "gbpc1.dts"
/ {
compatible = "gnubee,gb-pc2", "mediatek,mt7621-soc";
model = "GB-PC2";
};
&default_gpio {
groups = "wdt", "uart3";
function = "gpio";
};
&gmac1 {
status = "ok";
};
&phy_external {
status = "ok";
};

4
drivers/staging/nvec/nvec.c
View File

@@ -383,8 +383,8 @@ static void nvec_request_master(struct work_struct *work)
msg = list_first_entry(&nvec->tx_data, struct nvec_msg, node);
spin_unlock_irqrestore(&nvec->tx_lock, flags);
nvec_gpio_set_value(nvec, 0);
err = wait_for_completion_interruptible_timeout(
&nvec->ec_transfer, msecs_to_jiffies(5000));
err = wait_for_completion_interruptible_timeout(&nvec->ec_transfer,
msecs_to_jiffies(5000));
if (err == 0) {
dev_warn(nvec->dev, "timeout waiting for ec transfer\n");

4
drivers/staging/pi433/TODO
View File

@@ -1,5 +1,5 @@
* coding style does not fully comply with the kernel style guide.
* still TODOs, annotated in the code
* currently the code introduces new IOCTLs. I'm afraid this is a bad idea.
-> Replace this with another interface, hints are welcome!
* Some missing data (marked with ###) needs to be added in the documentation
* Change (struct pi433_tx_cfg)->bit_rate to be a u32 so that we can support
bit rates up to 300kbps per the spec.

176
drivers/staging/pi433/pi433_if.c
View File

@@ -41,6 +41,8 @@
#ifdef CONFIG_COMPAT
#include <linux/compat.h>
#endif
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include "pi433_if.h"
#include "rf69.h"
@@ -108,6 +110,9 @@ struct pi433_device {
struct pi433_instance {
struct pi433_device *device;
struct pi433_tx_cfg tx_cfg;
/* control flags */
bool tx_cfg_initialized;
};
/*-------------------------------------------------------------------------*/
@@ -164,10 +169,10 @@ rf69_set_rx_cfg(struct pi433_device *dev, struct pi433_rx_cfg *rx_cfg)
ret = rf69_set_frequency(dev->spi, rx_cfg->frequency);
if (ret < 0)
return ret;
ret = rf69_set_bit_rate(dev->spi, rx_cfg->bit_rate);
ret = rf69_set_modulation(dev->spi, rx_cfg->modulation);
if (ret < 0)
return ret;
ret = rf69_set_modulation(dev->spi, rx_cfg->modulation);
ret = rf69_set_bit_rate(dev->spi, rx_cfg->bit_rate);
if (ret < 0)
return ret;
ret = rf69_set_antenna_impedance(dev->spi, rx_cfg->antenna_impedance);
@@ -287,10 +292,10 @@ rf69_set_tx_cfg(struct pi433_device *dev, struct pi433_tx_cfg *tx_cfg)
ret = rf69_set_frequency(dev->spi, tx_cfg->frequency);
if (ret < 0)
return ret;
ret = rf69_set_bit_rate(dev->spi, tx_cfg->bit_rate);
ret = rf69_set_modulation(dev->spi, tx_cfg->modulation);
if (ret < 0)
return ret;
ret = rf69_set_modulation(dev->spi, tx_cfg->modulation);
ret = rf69_set_bit_rate(dev->spi, tx_cfg->bit_rate);
if (ret < 0)
return ret;
ret = rf69_set_deviation(dev->spi, tx_cfg->dev_frequency);
@@ -359,8 +364,7 @@ rf69_set_tx_cfg(struct pi433_device *dev, struct pi433_tx_cfg *tx_cfg)
/*-------------------------------------------------------------------------*/
static int
pi433_start_rx(struct pi433_device *dev)
static int pi433_start_rx(struct pi433_device *dev)
{
int retval;
@@ -400,8 +404,7 @@ pi433_start_rx(struct pi433_device *dev)
/*-------------------------------------------------------------------------*/
static int
pi433_receive(void *data)
static int pi433_receive(void *data)
{
struct pi433_device *dev = data;
struct spi_device *spi = dev->spi;
@@ -411,7 +414,7 @@ pi433_receive(void *data)
dev->interrupt_rx_allowed = false;
/* wait for any tx to finish */
dev_dbg(dev->dev, "rx: going to wait for any tx to finish");
dev_dbg(dev->dev, "rx: going to wait for any tx to finish\n");
retval = wait_event_interruptible(dev->rx_wait_queue, !dev->tx_active);
if (retval) {
/* wait was interrupted */
@@ -431,16 +434,16 @@ pi433_receive(void *data)
return retval;
/* now check RSSI, if low wait for getting high (RSSI interrupt) */
while (!rf69_get_flag(dev->spi, rssi_exceeded_threshold)) {
while (!(rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI)) {
/* allow tx to interrupt us while waiting for high RSSI */
dev->interrupt_rx_allowed = true;
wake_up_interruptible(&dev->tx_wait_queue);
/* wait for RSSI level to become high */
dev_dbg(dev->dev, "rx: going to wait for high RSSI level");
dev_dbg(dev->dev, "rx: going to wait for high RSSI level\n");
retval = wait_event_interruptible(dev->rx_wait_queue,
rf69_get_flag(dev->spi,
rssi_exceeded_threshold));
rf69_read_reg(spi, REG_IRQFLAGS1) &
MASK_IRQFLAGS1_RSSI);
if (retval) /* wait was interrupted */
goto abort;
dev->interrupt_rx_allowed = false;
@@ -464,11 +467,11 @@ pi433_receive(void *data)
goto abort;
}
bytes_total = dev->rx_cfg.fixed_message_length;
dev_dbg(dev->dev, "rx: msg len set to %d by fixed length",
dev_dbg(dev->dev, "rx: msg len set to %d by fixed length\n",
bytes_total);
} else {
bytes_total = dev->rx_buffer_size;
dev_dbg(dev->dev, "rx: msg len set to %d as requested by read",
dev_dbg(dev->dev, "rx: msg len set to %d as requested by read\n",
bytes_total);
}
@@ -485,7 +488,7 @@ pi433_receive(void *data)
goto abort;
}
dev->free_in_fifo++;
dev_dbg(dev->dev, "rx: msg len reset to %d due to length byte",
dev_dbg(dev->dev, "rx: msg len reset to %d due to length byte\n",
bytes_total);
}
@@ -502,12 +505,12 @@ pi433_receive(void *data)
rf69_read_fifo(spi, &dummy, 1);
dev->free_in_fifo++;
dev_dbg(dev->dev, "rx: address byte stripped off");
dev_dbg(dev->dev, "rx: address byte stripped off\n");
}
/* get payload */
while (dev->rx_position < bytes_total) {
if (!rf69_get_flag(dev->spi, payload_ready)) {
if (!(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY)) {
retval = wait_event_interruptible(dev->fifo_wait_queue,
dev->free_in_fifo < FIFO_SIZE);
if (retval) /* wait was interrupted */
@@ -552,8 +555,7 @@ abort:
return bytes_total;
}
static int
pi433_tx_thread(void *data)
static int pi433_tx_thread(void *data)
{
struct pi433_device *device = data;
struct spi_device *spi = device->spi;
@@ -565,7 +567,7 @@ pi433_tx_thread(void *data)
while (1) {
/* wait for fifo to be populated or for request to terminate*/
dev_dbg(device->dev, "thread: going to wait for new messages");
dev_dbg(device->dev, "thread: going to wait for new messages\n");
wait_event_interruptible(device->tx_wait_queue,
(!kfifo_is_empty(&device->tx_fifo) ||
kthread_should_stop()));
@@ -581,7 +583,7 @@ pi433_tx_thread(void *data)
retval = kfifo_out(&device->tx_fifo, &tx_cfg, sizeof(tx_cfg));
if (retval != sizeof(tx_cfg)) {
dev_dbg(device->dev,
"reading tx_cfg from fifo failed: got %d byte(s), expected %d",
"reading tx_cfg from fifo failed: got %d byte(s), expected %d\n",
retval, (unsigned int)sizeof(tx_cfg));
continue;
}
@@ -589,7 +591,7 @@ pi433_tx_thread(void *data)
retval = kfifo_out(&device->tx_fifo, &size, sizeof(size_t));
if (retval != sizeof(size_t)) {
dev_dbg(device->dev,
"reading msg size from fifo failed: got %d, expected %d",
"reading msg size from fifo failed: got %d, expected %d\n",
retval, (unsigned int)sizeof(size_t));
continue;
}
@@ -626,7 +628,7 @@ pi433_tx_thread(void *data)
retval = kfifo_out(&device->tx_fifo, &device->buffer[position],
sizeof(device->buffer) - position);
dev_dbg(device->dev,
"read %d message byte(s) from fifo queue.", retval);
"read %d message byte(s) from fifo queue.\n", retval);
/*
* if rx is active, we need to interrupt the waiting for
@@ -731,7 +733,7 @@ pi433_tx_thread(void *data)
/* we are done. Wait for packet to get sent */
dev_dbg(device->dev,
"thread: wait for packet to get sent/fifo to be empty");
"thread: wait for packet to get sent/fifo to be empty\n");
wait_event_interruptible(device->fifo_wait_queue,
device->free_in_fifo == FIFO_SIZE ||
kthread_should_stop());
@@ -739,7 +741,7 @@ pi433_tx_thread(void *data)
return 0;
/* STOP_TRANSMISSION */
dev_dbg(device->dev, "thread: Packet sent. Set mode to stby.");
dev_dbg(device->dev, "thread: Packet sent. Set mode to stby.\n");
retval = rf69_set_mode(spi, standby);
if (retval < 0)
goto abort;
@@ -823,6 +825,16 @@ pi433_write(struct file *filp, const char __user *buf,
if (count > MAX_MSG_SIZE)
return -EMSGSIZE;
/*
* check if tx_cfg has been initialized otherwise we won't be able to
* config the RF trasmitter correctly due to invalid settings
*/
if (!instance->tx_cfg_initialized) {
dev_notice_once(device->dev,
"write: failed due to unconfigured tx_cfg (see PI433_IOC_WR_TX_CFG)\n");
return -EINVAL;
}
/*
* write the following sequence into fifo:
* - tx_cfg
@@ -834,7 +846,7 @@ pi433_write(struct file *filp, const char __user *buf,
required = sizeof(instance->tx_cfg) + sizeof(size_t) + count;
available = kfifo_avail(&device->tx_fifo);
if (required > available) {
dev_dbg(device->dev, "write to fifo failed: %d bytes required but %d available",
dev_dbg(device->dev, "write to fifo failed: %d bytes required but %d available\n",
required, available);
mutex_unlock(&device->tx_fifo_lock);
return -EAGAIN;
@@ -857,19 +869,18 @@ pi433_write(struct file *filp, const char __user *buf,
/* start transfer */
wake_up_interruptible(&device->tx_wait_queue);
dev_dbg(device->dev, "write: generated new msg with %d bytes.", copied);
dev_dbg(device->dev, "write: generated new msg with %d bytes.\n", copied);
return copied;
abort:
dev_warn(device->dev,
"write to fifo failed, non recoverable: 0x%x", retval);
"write to fifo failed, non recoverable: 0x%x\n", retval);
mutex_unlock(&device->tx_fifo_lock);
return -EAGAIN;
}
static long
pi433_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
static long pi433_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
struct pi433_instance *instance;
struct pi433_device *device;
@@ -897,6 +908,7 @@ pi433_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
return -EFAULT;
mutex_lock(&device->tx_fifo_lock);
memcpy(&instance->tx_cfg, &tx_cfg, sizeof(struct pi433_tx_cfg));
instance->tx_cfg_initialized = true;
mutex_unlock(&device->tx_fifo_lock);
break;
case PI433_IOC_RD_RX_CFG:
@@ -949,8 +961,6 @@ static int pi433_open(struct inode *inode, struct file *filp)
/* setup instance data*/
instance->device = device;
instance->tx_cfg.bit_rate = 4711;
// TODO: fill instance->tx_cfg;
/* instance data as context */
filp->private_data = instance;
@@ -990,12 +1000,12 @@ static int setup_gpio(struct pi433_device *device)
if (device->gpiod[i] == ERR_PTR(-ENOENT)) {
dev_dbg(&device->spi->dev,
"Could not find entry for %s. Ignoring.", name);
"Could not find entry for %s. Ignoring.\n", name);
continue;
}
if (device->gpiod[i] == ERR_PTR(-EBUSY))
dev_dbg(&device->spi->dev, "%s is busy.", name);
dev_dbg(&device->spi->dev, "%s is busy.\n", name);
if (IS_ERR(device->gpiod[i])) {
retval = PTR_ERR(device->gpiod[i]);
@@ -1028,7 +1038,7 @@ static int setup_gpio(struct pi433_device *device)
if (retval)
return retval;
dev_dbg(&device->spi->dev, "%s successfully configured", name);
dev_dbg(&device->spi->dev, "%s successfully configured\n", name);
}
return 0;
@@ -1090,12 +1100,76 @@ static const struct file_operations pi433_fops = {
.llseek = no_llseek,
};
static int pi433_debugfs_regs_show(struct seq_file *m, void *p)
{
struct pi433_device *dev;
u8 reg_data[114];
int i;
char *fmt = "0x%02x, 0x%02x\n";
int ret;
dev = m->private;
mutex_lock(&dev->tx_fifo_lock);
mutex_lock(&dev->rx_lock);
// wait for on-going operations to finish
ret = wait_event_interruptible(dev->rx_wait_queue, !dev->tx_active);
if (ret)
goto out_unlock;
ret = wait_event_interruptible(dev->tx_wait_queue, !dev->rx_active);
if (ret)
goto out_unlock;
// skip FIFO register (0x0) otherwise this can affect some of uC ops
for (i = 1; i < 0x50; i++)
reg_data[i] = rf69_read_reg(dev->spi, i);
reg_data[REG_TESTLNA] = rf69_read_reg(dev->spi, REG_TESTLNA);
reg_data[REG_TESTPA1] = rf69_read_reg(dev->spi, REG_TESTPA1);
reg_data[REG_TESTPA2] = rf69_read_reg(dev->spi, REG_TESTPA2);
reg_data[REG_TESTDAGC] = rf69_read_reg(dev->spi, REG_TESTDAGC);
reg_data[REG_TESTAFC] = rf69_read_reg(dev->spi, REG_TESTAFC);
seq_puts(m, "# reg, val\n");
for (i = 1; i < 0x50; i++)
seq_printf(m, fmt, i, reg_data[i]);
seq_printf(m, fmt, REG_TESTLNA, reg_data[REG_TESTLNA]);
seq_printf(m, fmt, REG_TESTPA1, reg_data[REG_TESTPA1]);
seq_printf(m, fmt, REG_TESTPA2, reg_data[REG_TESTPA2]);
seq_printf(m, fmt, REG_TESTDAGC, reg_data[REG_TESTDAGC]);
seq_printf(m, fmt, REG_TESTAFC, reg_data[REG_TESTAFC]);
out_unlock:
mutex_unlock(&dev->rx_lock);
mutex_unlock(&dev->tx_fifo_lock);
return ret;
}
static int pi433_debugfs_regs_open(struct inode *inode, struct file *filp)
{
return single_open(filp, pi433_debugfs_regs_show, inode->i_private);
}
static const struct file_operations debugfs_fops = {
.llseek = seq_lseek,
.open = pi433_debugfs_regs_open,
.owner = THIS_MODULE,
.read = seq_read,
.release = single_release
};
/*-------------------------------------------------------------------------*/
static int pi433_probe(struct spi_device *spi)
{
struct pi433_device *device;
int retval;
struct dentry *entry;
/* setup spi parameters */
spi->mode = 0x00;
@@ -1112,20 +1186,20 @@ static int pi433_probe(struct spi_device *spi)
}
dev_dbg(&spi->dev,
"spi interface setup: mode 0x%2x, %d bits per word, %dhz max speed",
"spi interface setup: mode 0x%2x, %d bits per word, %dhz max speed\n",
spi->mode, spi->bits_per_word, spi->max_speed_hz);
/* Ping the chip by reading the version register */
retval = spi_w8r8(spi, 0x10);
/* read chip version */
retval = rf69_get_version(spi);
if (retval < 0)
return retval;
switch (retval) {
case 0x24:
dev_dbg(&spi->dev, "found pi433 (ver. 0x%x)", retval);
dev_dbg(&spi->dev, "found pi433 (ver. 0x%x)\n", retval);
break;
default:
dev_dbg(&spi->dev, "unknown chip version: 0x%x", retval);
dev_dbg(&spi->dev, "unknown chip version: 0x%x\n", retval);
return -ENODEV;
}
@@ -1162,7 +1236,7 @@ static int pi433_probe(struct spi_device *spi)
/* setup GPIO (including irq_handler) for the different DIOs */
retval = setup_gpio(device);
if (retval) {
dev_dbg(&spi->dev, "setup of GPIOs failed");
dev_dbg(&spi->dev, "setup of GPIOs failed\n");
goto GPIO_failed;
}
@@ -1192,7 +1266,7 @@ static int pi433_probe(struct spi_device *spi)
/* determ minor number */
retval = pi433_get_minor(device);
if (retval) {
dev_dbg(&spi->dev, "get of minor number failed");
dev_dbg(&spi->dev, "get of minor number failed\n");
goto minor_failed;
}
@@ -1221,7 +1295,7 @@ static int pi433_probe(struct spi_device *spi)
"pi433.%d_tx_task",
device->minor);
if (IS_ERR(device->tx_task_struct)) {
dev_dbg(device->dev, "start of send thread failed");
dev_dbg(device->dev, "start of send thread failed\n");
retval = PTR_ERR(device->tx_task_struct);
goto send_thread_failed;
}
@@ -1229,7 +1303,7 @@ static int pi433_probe(struct spi_device *spi)
/* create cdev */
device->cdev = cdev_alloc();
if (!device->cdev) {
dev_dbg(device->dev, "allocation of cdev failed");
dev_dbg(device->dev, "allocation of cdev failed\n");
retval = -ENOMEM;
goto cdev_failed;
}
@@ -1237,13 +1311,17 @@ static int pi433_probe(struct spi_device *spi)
cdev_init(device->cdev, &pi433_fops);
retval = cdev_add(device->cdev, device->devt, 1);
if (retval) {
dev_dbg(device->dev, "register of cdev failed");
dev_dbg(device->dev, "register of cdev failed\n");
goto del_cdev;
}
/* spi setup */
spi_set_drvdata(spi, device);
entry = debugfs_create_dir(dev_name(device->dev),
debugfs_lookup(KBUILD_MODNAME, NULL));
debugfs_create_file("regs", 0400, entry, device, &debugfs_fops);
return 0;
del_cdev:
@@ -1267,6 +1345,9 @@ RX_failed:
static void pi433_remove(struct spi_device *spi)
{
struct pi433_device *device = spi_get_drvdata(spi);
struct dentry *mod_entry = debugfs_lookup(KBUILD_MODNAME, NULL);
debugfs_remove(debugfs_lookup(dev_name(device->dev), mod_entry));
/* free GPIOs */
free_gpio(device);
@@ -1339,6 +1420,8 @@ static int __init pi433_init(void)
return PTR_ERR(pi433_class);
}
debugfs_create_dir(KBUILD_MODNAME, NULL);
status = spi_register_driver(&pi433_spi_driver);
if (status < 0) {
class_destroy(pi433_class);
@@ -1356,6 +1439,7 @@ static void __exit pi433_exit(void)
spi_unregister_driver(&pi433_spi_driver);
class_destroy(pi433_class);
unregister_chrdev(MAJOR(pi433_dev), pi433_spi_driver.driver.name);
debugfs_remove_recursive(debugfs_lookup(KBUILD_MODNAME, NULL));
}
module_exit(pi433_exit);

2
drivers/staging/pi433/pi433_if.h
View File

@@ -1,7 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* include/linux/TODO
*
* userspace interface for pi433 radio module
*
* Pi433 is a 433MHz radio module for the Raspberry Pi.

169
drivers/staging/pi433/rf69.c
View File

@@ -6,13 +6,6 @@
* Marcus Wolf <linux@wolf-entwicklungen.de>
*/
/* enable prosa debug info */
#undef DEBUG
/* enable print of values on reg access */
#undef DEBUG_VALUES
/* enable print of values on fifo access */
#undef DEBUG_FIFO_ACCESS
#include <linux/types.h>
#include <linux/spi/spi.h>
@@ -24,50 +17,19 @@
/*-------------------------------------------------------------------------*/
static u8 rf69_read_reg(struct spi_device *spi, u8 addr)
u8 rf69_read_reg(struct spi_device *spi, u8 addr)
{
int retval;
retval = spi_w8r8(spi, addr);
#ifdef DEBUG_VALUES
if (retval < 0)
/*
* should never happen, since we already checked,
* that module is connected. Therefore no error
* handling, just an optional error message...
*/
dev_dbg(&spi->dev, "read 0x%x FAILED\n", addr);
else
dev_dbg(&spi->dev, "read 0x%x from reg 0x%x\n", retval, addr);
#endif
return retval;
return spi_w8r8(spi, addr);
}
static int rf69_write_reg(struct spi_device *spi, u8 addr, u8 value)
{
int retval;
char buffer[2];
buffer[0] = addr | WRITE_BIT;
buffer[1] = value;
retval = spi_write(spi, &buffer, 2);
#ifdef DEBUG_VALUES
if (retval < 0)
/*
* should never happen, since we already checked,
* that module is connected. Therefore no error
* handling, just an optional error message...
*/
dev_dbg(&spi->dev, "write 0x%x to 0x%x FAILED\n", value, addr);
else
dev_dbg(&spi->dev, "wrote 0x%x to reg 0x%x\n", value, addr);
#endif
return retval;
return spi_write(spi, &buffer, ARRAY_SIZE(buffer));
}
/*-------------------------------------------------------------------------*/
@@ -102,6 +64,11 @@ static inline int rf69_read_mod_write(struct spi_device *spi, u8 reg,
/*-------------------------------------------------------------------------*/
int rf69_get_version(struct spi_device *spi)
{
return rf69_read_reg(spi, REG_VERSION);
}
int rf69_set_mode(struct spi_device *spi, enum mode mode)
{
static const u8 mode_map[] = {
@@ -113,7 +80,7 @@ int rf69_set_mode(struct spi_device *spi, enum mode mode)
};
if (unlikely(mode >= ARRAY_SIZE(mode_map))) {
dev_dbg(&spi->dev, "set: illegal mode %u", mode);
dev_dbg(&spi->dev, "set: illegal mode %u\n", mode);
return -EINVAL;
}
@@ -143,7 +110,7 @@ int rf69_set_modulation(struct spi_device *spi, enum modulation modulation)
};
if (unlikely(modulation >= ARRAY_SIZE(modulation_map))) {
dev_dbg(&spi->dev, "set: illegal modulation %u", modulation);
dev_dbg(&spi->dev, "set: illegal modulation %u\n", modulation);
return -EINVAL;
}
@@ -191,7 +158,7 @@ int rf69_set_modulation_shaping(struct spi_device *spi,
MASK_DATAMODUL_MODULATION_SHAPE,
DATAMODUL_MODULATION_SHAPE_0_3);
default:
dev_dbg(&spi->dev, "set: illegal mod shaping for FSK %u", mod_shaping);
dev_dbg(&spi->dev, "set: illegal mod shaping for FSK %u\n", mod_shaping);
return -EINVAL;
}
case OOK:
@@ -209,11 +176,11 @@ int rf69_set_modulation_shaping(struct spi_device *spi,
MASK_DATAMODUL_MODULATION_SHAPE,
DATAMODUL_MODULATION_SHAPE_2BR);
default:
dev_dbg(&spi->dev, "set: illegal mod shaping for OOK %u", mod_shaping);
dev_dbg(&spi->dev, "set: illegal mod shaping for OOK %u\n", mod_shaping);
return -EINVAL;
}
default:
dev_dbg(&spi->dev, "set: modulation undefined");
dev_dbg(&spi->dev, "set: modulation undefined\n");
return -EINVAL;
}
}
@@ -221,15 +188,21 @@ int rf69_set_modulation_shaping(struct spi_device *spi,
int rf69_set_bit_rate(struct spi_device *spi, u16 bit_rate)
{
int retval;
u32 bit_rate_min;
u32 bit_rate_reg;
u8 msb;
u8 lsb;
enum modulation mod;
// check if modulation is configured
mod = rf69_get_modulation(spi);
if (mod == UNDEF) {
dev_dbg(&spi->dev, "setBitRate: modulation is undefined\n");
return -EINVAL;
}
// check input value
bit_rate_min = F_OSC / 8388608; // 8388608 = 2^23;
if (bit_rate < bit_rate_min) {
dev_dbg(&spi->dev, "setBitRate: illegal input param");
if (bit_rate < 1200 || (mod == OOK && bit_rate > 32768)) {
dev_dbg(&spi->dev, "setBitRate: illegal input param\n");
return -EINVAL;
}
@@ -273,7 +246,7 @@ int rf69_set_deviation(struct spi_device *spi, u32 deviation)
*/
if (deviation < 600 || (deviation + (bit_rate / 2)) > 500000) {
dev_dbg(&spi->dev,
"set_deviation: illegal input param: %u", deviation);
"set_deviation: illegal input param: %u\n", deviation);
return -EINVAL;
}
@@ -290,7 +263,7 @@ int rf69_set_deviation(struct spi_device *spi, u32 deviation)
// check msb
if (msb & ~FDEVMASB_MASK) {
dev_dbg(&spi->dev, "set_deviation: err in calc of msb");
dev_dbg(&spi->dev, "set_deviation: err in calc of msb\n");
return -EINVAL;
}
@@ -323,7 +296,7 @@ int rf69_set_frequency(struct spi_device *spi, u32 frequency)
// check input value
f_max = div_u64(f_step * 8388608, factor);
if (frequency > f_max) {
dev_dbg(&spi->dev, "setFrequency: illegal input param");
dev_dbg(&spi->dev, "setFrequency: illegal input param\n");
return -EINVAL;
}
@@ -404,7 +377,7 @@ int rf69_set_output_power_level(struct spi_device *spi, u8 power_level)
return rf69_read_mod_write(spi, REG_PALEVEL, MASK_PALEVEL_OUTPUT_POWER,
power_level);
failed:
dev_dbg(&spi->dev, "set: illegal power level %u", power_level);
dev_dbg(&spi->dev, "set: illegal power level %u\n", power_level);
return -EINVAL;
}
@@ -429,7 +402,7 @@ int rf69_set_pa_ramp(struct spi_device *spi, enum pa_ramp pa_ramp)
};
if (unlikely(pa_ramp >= ARRAY_SIZE(pa_ramp_map))) {
dev_dbg(&spi->dev, "set: illegal pa_ramp %u", pa_ramp);
dev_dbg(&spi->dev, "set: illegal pa_ramp %u\n", pa_ramp);
return -EINVAL;
}
@@ -445,7 +418,7 @@ int rf69_set_antenna_impedance(struct spi_device *spi,
case two_hundred_ohm:
return rf69_set_bit(spi, REG_LNA, MASK_LNA_ZIN);
default:
dev_dbg(&spi->dev, "set: illegal antenna impedance %u", antenna_impedance);
dev_dbg(&spi->dev, "set: illegal antenna impedance %u\n", antenna_impedance);
return -EINVAL;
}
}
@@ -463,7 +436,7 @@ int rf69_set_lna_gain(struct spi_device *spi, enum lna_gain lna_gain)
};
if (unlikely(lna_gain >= ARRAY_SIZE(lna_gain_map))) {
dev_dbg(&spi->dev, "set: illegal lna gain %u", lna_gain);
dev_dbg(&spi->dev, "set: illegal lna gain %u\n", lna_gain);
return -EINVAL;
}
@@ -478,14 +451,14 @@ static int rf69_set_bandwidth_intern(struct spi_device *spi, u8 reg,
// check value for mantisse and exponent
if (exponent > 7) {
dev_dbg(&spi->dev, "set: illegal bandwidth exponent %u", exponent);
dev_dbg(&spi->dev, "set: illegal bandwidth exponent %u\n", exponent);
return -EINVAL;
}
if (mantisse != mantisse16 &&
mantisse != mantisse20 &&
mantisse != mantisse24) {
dev_dbg(&spi->dev, "set: illegal bandwidth mantisse %u", mantisse);
dev_dbg(&spi->dev, "set: illegal bandwidth mantisse %u\n", mantisse);
return -EINVAL;
}
@@ -543,7 +516,8 @@ int rf69_set_ook_threshold_dec(struct spi_device *spi,
};
if (unlikely(threshold_decrement >= ARRAY_SIZE(td_map))) {
dev_dbg(&spi->dev, "set: illegal OOK threshold decrement %u", threshold_decrement);
dev_dbg(&spi->dev, "set: illegal OOK threshold decrement %u\n",
threshold_decrement);
return -EINVAL;
}
@@ -590,7 +564,7 @@ int rf69_set_dio_mapping(struct spi_device *spi, u8 dio_number, u8 value)
dio_addr = REG_DIOMAPPING2;
break;
default:
dev_dbg(&spi->dev, "set: illegal dio number %u", dio_number);
dev_dbg(&spi->dev, "set: illegal dio number %u\n", dio_number);
return -EINVAL;
}
@@ -604,49 +578,6 @@ int rf69_set_dio_mapping(struct spi_device *spi, u8 dio_number, u8 value)
return rf69_write_reg(spi, dio_addr, dio_value);
}
bool rf69_get_flag(struct spi_device *spi, enum flag flag)
{
switch (flag) {
case mode_switch_completed:
return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
case ready_to_receive:
return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
case ready_to_send:
return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
case pll_locked:
return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
case rssi_exceeded_threshold:
return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
case timeout:
return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
case automode:
return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
case sync_address_match:
return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
case fifo_full:
return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
/*
* case fifo_not_empty:
* return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
*/
case fifo_empty:
return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
case fifo_level_below_threshold:
return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
case fifo_overrun:
return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
case packet_sent:
return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
case payload_ready:
return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
case crc_ok:
return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
case battery_low:
return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
default: return false;
}
}
int rf69_set_rssi_threshold(struct spi_device *spi, u8 threshold)
{
/* no value check needed - u8 exactly matches register size */
@@ -693,7 +624,7 @@ int rf69_set_fifo_fill_condition(struct spi_device *spi,
return rf69_clear_bit(spi, REG_SYNC_CONFIG,
MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
default:
dev_dbg(&spi->dev, "set: illegal fifo fill condition %u", fifo_fill_condition);
dev_dbg(&spi->dev, "set: illegal fifo fill condition %u\n", fifo_fill_condition);
return -EINVAL;
}
}
@@ -702,7 +633,7 @@ int rf69_set_sync_size(struct spi_device *spi, u8 sync_size)
{
// check input value
if (sync_size > 0x07) {
dev_dbg(&spi->dev, "set: illegal sync size %u", sync_size);
dev_dbg(&spi->dev, "set: illegal sync size %u\n", sync_size);
return -EINVAL;
}
@@ -739,7 +670,7 @@ int rf69_set_packet_format(struct spi_device *spi,
return rf69_clear_bit(spi, REG_PACKETCONFIG1,
MASK_PACKETCONFIG1_PACKET_FORMAT_VARIABLE);
default:
dev_dbg(&spi->dev, "set: illegal packet format %u", packet_format);
dev_dbg(&spi->dev, "set: illegal packet format %u\n", packet_format);
return -EINVAL;
}
}
@@ -765,7 +696,7 @@ int rf69_set_address_filtering(struct spi_device *spi,
};
if (unlikely(address_filtering >= ARRAY_SIZE(af_map))) {
dev_dbg(&spi->dev, "set: illegal address filtering %u", address_filtering);
dev_dbg(&spi->dev, "set: illegal address filtering %u\n", address_filtering);
return -EINVAL;
}
@@ -800,7 +731,7 @@ int rf69_set_tx_start_condition(struct spi_device *spi,
return rf69_set_bit(spi, REG_FIFO_THRESH,
MASK_FIFO_THRESH_TXSTART);
default:
dev_dbg(&spi->dev, "set: illegal tx start condition %u", tx_start_condition);
dev_dbg(&spi->dev, "set: illegal tx start condition %u\n", tx_start_condition);
return -EINVAL;
}
}
@@ -810,8 +741,8 @@ int rf69_set_fifo_threshold(struct spi_device *spi, u8 threshold)
int retval;
/* check input value */
if (threshold & 0x80) {
dev_dbg(&spi->dev, "set: illegal fifo threshold %u", threshold);
if (threshold & ~MASK_FIFO_THRESH_VALUE) {
dev_dbg(&spi->dev, "set: illegal fifo threshold %u\n", threshold);
return -EINVAL;
}
@@ -838,7 +769,7 @@ int rf69_set_dagc(struct spi_device *spi, enum dagc dagc)
};
if (unlikely(dagc >= ARRAY_SIZE(dagc_map))) {
dev_dbg(&spi->dev, "set: illegal dagc %u", dagc);
dev_dbg(&spi->dev, "set: illegal dagc %u\n", dagc);
return -EINVAL;
}
@@ -849,11 +780,9 @@ int rf69_set_dagc(struct spi_device *spi, enum dagc dagc)
int rf69_read_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
{
#ifdef DEBUG_FIFO_ACCESS
int i;
#endif
struct spi_transfer transfer;
u8 local_buffer[FIFO_SIZE + 1];
u8 local_buffer[FIFO_SIZE + 1] = {};
int retval;
if (size > FIFO_SIZE) {
@@ -871,10 +800,9 @@ int rf69_read_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
retval = spi_sync_transfer(spi, &transfer, 1);
#ifdef DEBUG_FIFO_ACCESS
/* print content read from fifo for debugging purposes */
for (i = 0; i < size; i++)
dev_dbg(&spi->dev, "%d - 0x%x\n", i, local_buffer[i + 1]);
#endif
memcpy(buffer, &local_buffer[1], size);
@@ -883,9 +811,7 @@ int rf69_read_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
int rf69_write_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
{
#ifdef DEBUG_FIFO_ACCESS
int i;
#endif
u8 local_buffer[FIFO_SIZE + 1];
if (size > FIFO_SIZE) {
@@ -897,10 +823,9 @@ int rf69_write_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
local_buffer[0] = REG_FIFO | WRITE_BIT;
memcpy(&local_buffer[1], buffer, size);
#ifdef DEBUG_FIFO_ACCESS
/* print content written from fifo for debugging purposes */
for (i = 0; i < size; i++)
dev_dbg(&spi->dev, "0x%x\n", buffer[i]);
#endif
dev_dbg(&spi->dev, "%d - 0x%x\n", i, buffer[i]);
return spi_write(spi, local_buffer, size + 1);
}

3
drivers/staging/pi433/rf69.h
View File

@@ -17,6 +17,8 @@
#define FIFO_SIZE 66 /* bytes */
#define FIFO_THRESHOLD 15 /* bytes */
u8 rf69_read_reg(struct spi_device *spi, u8 addr);
int rf69_get_version(struct spi_device *spi);
int rf69_set_mode(struct spi_device *spi, enum mode mode);
int rf69_set_data_mode(struct spi_device *spi, u8 data_mode);
int rf69_set_modulation(struct spi_device *spi, enum modulation modulation);
@@ -40,7 +42,6 @@ int rf69_set_bandwidth_during_afc(struct spi_device *spi,
int rf69_set_ook_threshold_dec(struct spi_device *spi,
enum threshold_decrement threshold_decrement);
int rf69_set_dio_mapping(struct spi_device *spi, u8 dio_number, u8 value);
bool rf69_get_flag(struct spi_device *spi, enum flag flag);
int rf69_set_rssi_threshold(struct spi_device *spi, u8 threshold);
int rf69_set_preamble_length(struct spi_device *spi, u16 preamble_length);
int rf69_enable_sync(struct spi_device *spi);

20
drivers/staging/pi433/rf69_enum.h
View File

@@ -84,26 +84,6 @@ enum threshold_decrement {
dec_16times
};
enum flag {
mode_switch_completed,
ready_to_receive,
ready_to_send,
pll_locked,
rssi_exceeded_threshold,
timeout,
automode,
sync_address_match,
fifo_full,
// fifo_not_empty, collision with next enum; replaced by following enum...
fifo_empty,
fifo_level_below_threshold,
fifo_overrun,
packet_sent,
payload_ready,
crc_ok,
battery_low
};
enum fifo_fill_condition {
after_sync_interrupt,
always

2
drivers/staging/pi433/rf69_registers.h
View File

@@ -89,9 +89,11 @@
#define REG_AESKEY16 0x4D
#define REG_TEMP1 0x4E
#define REG_TEMP2 0x4F
#define REG_TESTLNA 0x58
#define REG_TESTPA1 0x5A /* only present on RFM69HW */
#define REG_TESTPA2 0x5C /* only present on RFM69HW */
#define REG_TESTDAGC 0x6F
#define REG_TESTAFC 0x71
/******************************************************/
/* RF69/SX1231 bit definition */

11
drivers/staging/qlge/qlge_main.c
View File

@@ -4605,14 +4605,12 @@ static int qlge_probe(struct pci_dev *pdev,
err = register_netdev(ndev);
if (err) {
dev_err(&pdev->dev, "net device registration failed.\n");
qlge_release_all(pdev);
pci_disable_device(pdev);
goto netdev_free;
goto cleanup_pdev;
}
err = qlge_health_create_reporters(qdev);
if (err)
goto netdev_free;
goto unregister_netdev;
/* Start up the timer to trigger EEH if
* the bus goes dead
@@ -4626,6 +4624,11 @@ static int qlge_probe(struct pci_dev *pdev,
devlink_register(devlink);
return 0;
unregister_netdev:
unregister_netdev(ndev);
cleanup_pdev:
qlge_release_all(pdev);
pci_disable_device(pdev);
netdev_free:
free_netdev(ndev);
devlink_free:

2
drivers/staging/r8188eu/Makefile
View File

@@ -10,7 +10,6 @@ r8188eu-y = \
hal/hal_intf.o \
hal/hal_com.o \
hal/odm.o \
hal/odm_debug.o \
hal/odm_HWConfig.o \
hal/odm_RegConfig8188E.o \
hal/odm_RTL8188E.o \
@@ -37,6 +36,7 @@ r8188eu-y = \
core/rtw_br_ext.o \
core/rtw_cmd.o \
core/rtw_efuse.o \
core/rtw_fw.o \
core/rtw_ieee80211.o \
core/rtw_ioctl_set.o \
core/rtw_iol.o \

254
drivers/staging/r8188eu/core/rtw_ap.c
View File

@@ -55,86 +55,86 @@ static void update_BCNTIM(struct adapter *padapter)
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *pnetwork_mlmeext = &pmlmeinfo->network;
unsigned char *pie = pnetwork_mlmeext->IEs;
u8 *p, *dst_ie, *premainder_ie = NULL;
u8 *pbackup_remainder_ie = NULL;
__le16 tim_bitmap_le;
uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen;
/* update TIM IE */
if (true) {
u8 *p, *dst_ie, *premainder_ie = NULL;
u8 *pbackup_remainder_ie = NULL;
__le16 tim_bitmap_le;
uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen;
tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap);
p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen,
pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_);
if (p && tim_ielen > 0) {
tim_ielen += 2;
premainder_ie = p + tim_ielen;
tim_ie_offset = (int)(p - pie);
remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen;
/* append TIM IE from dst_ie offset */
dst_ie = p;
} else {
tim_ielen = 0;
p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_);
if (p && tim_ielen > 0) {
tim_ielen += 2;
premainder_ie = p + tim_ielen;
tim_ie_offset = (int)(p - pie);
remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen;
/* append TIM IE from dst_ie offset */
dst_ie = p;
} else {
tim_ielen = 0;
/* calculate head_len */
offset = _FIXED_IE_LENGTH_;
offset += pnetwork_mlmeext->Ssid.SsidLength + 2;
/* calculate head_len */
offset = _FIXED_IE_LENGTH_;
offset += pnetwork_mlmeext->Ssid.SsidLength + 2;
/* get supported rates len */
p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_,
&tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_));
if (p)
offset += tmp_len + 2;
/* get supported rates len */
p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_));
if (p)
offset += tmp_len + 2;
/* DS Parameter Set IE, len = 3 */
offset += 3;
/* DS Parameter Set IE, len = 3 */
offset += 3;
premainder_ie = pie + offset;
premainder_ie = pie + offset;
remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen;
remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen;
/* append TIM IE from offset */
dst_ie = pie + offset;
}
if (remainder_ielen > 0) {
pbackup_remainder_ie = kmalloc(remainder_ielen, GFP_ATOMIC);
if (pbackup_remainder_ie && premainder_ie)
memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen);
}
*dst_ie++ = _TIM_IE_;
if ((pstapriv->tim_bitmap & 0xff00) && (pstapriv->tim_bitmap & 0x00fc))
tim_ielen = 5;
else
tim_ielen = 4;
*dst_ie++ = tim_ielen;
*dst_ie++ = 0;/* DTIM count */
*dst_ie++ = 1;/* DTIM period */
if (pstapriv->tim_bitmap & BIT(0))/* for bc/mc frames */
*dst_ie++ = BIT(0);/* bitmap ctrl */
else
*dst_ie++ = 0;
if (tim_ielen == 4) {
*dst_ie++ = *(u8 *)&tim_bitmap_le;
} else if (tim_ielen == 5) {
memcpy(dst_ie, &tim_bitmap_le, 2);
dst_ie += 2;
}
/* copy remainder IE */
if (pbackup_remainder_ie) {
memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen);
kfree(pbackup_remainder_ie);
}
offset = (uint)(dst_ie - pie);
pnetwork_mlmeext->IELength = offset + remainder_ielen;
/* append TIM IE from offset */
dst_ie = pie + offset;
}
if (remainder_ielen > 0) {
pbackup_remainder_ie = kmalloc(remainder_ielen, GFP_ATOMIC);
if (pbackup_remainder_ie && premainder_ie)
memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen);
}
*dst_ie++ = _TIM_IE_;
if ((pstapriv->tim_bitmap & 0xff00) && (pstapriv->tim_bitmap & 0x00fc))
tim_ielen = 5;
else
tim_ielen = 4;
*dst_ie++ = tim_ielen;
*dst_ie++ = 0;/* DTIM count */
*dst_ie++ = 1;/* DTIM period */
if (pstapriv->tim_bitmap & BIT(0))/* for bc/mc frames */
*dst_ie++ = BIT(0);/* bitmap ctrl */
else
*dst_ie++ = 0;
tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap);
if (tim_ielen == 4) {
*dst_ie++ = *(u8 *)&tim_bitmap_le;
} else if (tim_ielen == 5) {
memcpy(dst_ie, &tim_bitmap_le, 2);
dst_ie += 2;
}
/* copy remainder IE */
if (pbackup_remainder_ie) {
memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen);
kfree(pbackup_remainder_ie);
}
offset = (uint)(dst_ie - pie);
pnetwork_mlmeext->IELength = offset + remainder_ielen;
set_tx_beacon_cmd(padapter);
}
@@ -179,9 +179,6 @@ void expire_timeout_chk(struct adapter *padapter)
list_del_init(&psta->auth_list);
pstapriv->auth_list_cnt--;
DBG_88E("auth expire %6ph\n",
psta->hwaddr);
spin_unlock_bh(&pstapriv->auth_list_lock);
spin_lock_bh(&pstapriv->sta_hash_lock);
@@ -249,16 +246,11 @@ void expire_timeout_chk(struct adapter *padapter)
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
DBG_88E("asoc expire %pM, state = 0x%x\n", (psta->hwaddr), psta->state);
updated = ap_free_sta(padapter, psta, true, WLAN_REASON_DEAUTH_LEAVING);
} else {
/* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */
if (psta->sleepq_len > (NR_XMITFRAME / pstapriv->asoc_list_cnt) &&
padapter->xmitpriv.free_xmitframe_cnt < (NR_XMITFRAME / pstapriv->asoc_list_cnt / 2)) {
DBG_88E("%s sta:%pM, sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__,
(psta->hwaddr), psta->sleepq_len,
padapter->xmitpriv.free_xmitframe_cnt,
pstapriv->asoc_list_cnt);
wakeup_sta_to_xmit(padapter, psta);
}
}
@@ -288,19 +280,16 @@ void expire_timeout_chk(struct adapter *padapter)
psta->keep_alive_trycnt++;
if (ret == _SUCCESS) {
DBG_88E("asoc check, sta(%pM) is alive\n", (psta->hwaddr));
psta->expire_to = pstapriv->expire_to;
psta->keep_alive_trycnt = 0;
continue;
} else if (psta->keep_alive_trycnt <= 3) {
DBG_88E("ack check for asoc expire, keep_alive_trycnt =%d\n", psta->keep_alive_trycnt);
psta->expire_to = 1;
continue;
}
psta->keep_alive_trycnt = 0;
DBG_88E("asoc expire %pM, state = 0x%x\n", (psta->hwaddr), psta->state);
spin_lock_bh(&pstapriv->asoc_list_lock);
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
@@ -380,9 +369,6 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level)
tx_ra_bitmap |= ((raid << 28) & 0xf0000000);
DBG_88E("%s => mac_id:%d , raid:%d , bitmap = 0x%x, arg = 0x%x\n",
__func__, psta->mac_id, raid, tx_ra_bitmap, arg);
/* bitmap[0:27] = tx_rate_bitmap */
/* bitmap[28:31]= Rate Adaptive id */
/* arg[0:4] = macid */
@@ -396,8 +382,6 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level)
psta->raid = raid;
psta->init_rate = init_rate;
} else {
DBG_88E("station aid %d exceed the max number\n", psta->aid);
}
}
@@ -455,7 +439,6 @@ void update_bmc_sta(struct adapter *padapter)
arg = psta->mac_id & 0x1f;
arg |= BIT(7);
tx_ra_bitmap |= ((raid << 28) & 0xf0000000);
DBG_88E("update_bmc_sta, mask = 0x%x, arg = 0x%x\n", tx_ra_bitmap, arg);
/* bitmap[0:27] = tx_rate_bitmap */
/* bitmap[28:31]= Rate Adaptive id */
@@ -473,8 +456,6 @@ void update_bmc_sta(struct adapter *padapter)
psta->state = _FW_LINKED;
spin_unlock_bh(&psta->lock);
} else {
DBG_88E("add_RATid_bmc_sta error!\n");
}
}
@@ -496,7 +477,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta)
u16 ap_cap_info;
psta->mac_id = psta->aid + 1;
DBG_88E("%s\n", __func__);
/* ap mode */
rtl8188e_SetHalODMVar(padapter, psta, true);
@@ -552,11 +532,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta)
spin_unlock_bh(&psta->lock);
}
static void update_bcn_fixed_ie(struct adapter *padapter)
{
DBG_88E("%s\n", __func__);
}
static void update_bcn_erpinfo_ie(struct adapter *padapter)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
@@ -566,8 +541,6 @@ static void update_bcn_erpinfo_ie(struct adapter *padapter)
unsigned char *p, *ie = pnetwork->IEs;
u32 len = 0;
DBG_88E("%s, ERP_enable =%d\n", __func__, pmlmeinfo->ERP_enable);
if (!pmlmeinfo->ERP_enable)
return;
@@ -591,31 +564,6 @@ static void update_bcn_erpinfo_ie(struct adapter *padapter)
}
}
static void update_bcn_htcap_ie(struct adapter *padapter)
{
DBG_88E("%s\n", __func__);
}
static void update_bcn_htinfo_ie(struct adapter *padapter)
{
DBG_88E("%s\n", __func__);
}
static void update_bcn_rsn_ie(struct adapter *padapter)
{
DBG_88E("%s\n", __func__);
}
static void update_bcn_wpa_ie(struct adapter *padapter)
{
DBG_88E("%s\n", __func__);
}
static void update_bcn_wmm_ie(struct adapter *padapter)
{
DBG_88E("%s\n", __func__);
}
static void update_bcn_wps_ie(struct adapter *padapter)
{
u8 *pwps_ie = NULL, *pwps_ie_src;
@@ -628,8 +576,6 @@ static void update_bcn_wps_ie(struct adapter *padapter)
unsigned char *ie = pnetwork->IEs;
u32 ielen = pnetwork->IELength;
DBG_88E("%s\n", __func__);
pwps_ie = rtw_get_wps_ie(ie + _FIXED_IE_LENGTH_, ielen - _FIXED_IE_LENGTH_, NULL, &wps_ielen);
if (!pwps_ie || wps_ielen == 0)
@@ -667,24 +613,10 @@ exit:
kfree(pbackup_remainder_ie);
}
static void update_bcn_p2p_ie(struct adapter *padapter)
{
}
static void update_bcn_vendor_spec_ie(struct adapter *padapter, u8 *oui)
{
DBG_88E("%s\n", __func__);
if (!memcmp(RTW_WPA_OUI, oui, 4))
update_bcn_wpa_ie(padapter);
else if (!memcmp(WMM_OUI, oui, 4))
update_bcn_wmm_ie(padapter);
else if (!memcmp(WPS_OUI, oui, 4))
if (!memcmp(WPS_OUI, oui, 4))
update_bcn_wps_ie(padapter);
else if (!memcmp(P2P_OUI, oui, 4))
update_bcn_p2p_ie(padapter);
else
DBG_88E("unknown OUI type!\n");
}
void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
@@ -704,24 +636,12 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
spin_lock_bh(&pmlmepriv->bcn_update_lock);
switch (ie_id) {
case 0xFF:
update_bcn_fixed_ie(padapter);/* 8: TimeStamp, 2: Beacon Interval 2:Capability */
break;
case _TIM_IE_:
update_BCNTIM(padapter);
break;
case _ERPINFO_IE_:
update_bcn_erpinfo_ie(padapter);
break;
case _HT_CAPABILITY_IE_:
update_bcn_htcap_ie(padapter);
break;
case _RSN_IE_2_:
update_bcn_rsn_ie(padapter);
break;
case _HT_ADD_INFO_IE_:
update_bcn_htinfo_ie(padapter);
break;
case _VENDOR_SPECIFIC_IE_:
update_bcn_vendor_spec_ie(padapter, oui);
break;
@@ -759,9 +679,6 @@ static int rtw_ht_operation_update(struct adapter *padapter)
if (pmlmepriv->htpriv.ht_option)
return 0;
DBG_88E("%s current operation mode = 0x%X\n",
__func__, pmlmepriv->ht_op_mode);
if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) &&
pmlmepriv->num_sta_ht_no_gf) {
pmlmepriv->ht_op_mode |=
@@ -811,15 +728,12 @@ static int rtw_ht_operation_update(struct adapter *padapter)
op_mode_changes++;
}
DBG_88E("%s new operation mode = 0x%X changes =%d\n",
__func__, pmlmepriv->ht_op_mode, op_mode_changes);
return op_mode_changes;
}
void associated_clients_update(struct adapter *padapter, u8 updated)
{
/* update associcated stations cap. */
/* update associated stations cap. */
if (updated) {
struct list_head *phead, *plist;
struct sta_info *psta = NULL;
@@ -928,9 +842,6 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta)
if (psta->flags & WLAN_STA_HT) {
u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info);
DBG_88E("HT: STA %pM HT Capabilities Info: 0x%04x\n",
(psta->hwaddr), ht_capab);
if (psta->no_ht_set) {
psta->no_ht_set = 0;
pmlmepriv->num_sta_no_ht--;
@@ -941,9 +852,6 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta)
psta->no_ht_gf_set = 1;
pmlmepriv->num_sta_ht_no_gf++;
}
DBG_88E("%s STA %pM - no greenfield, num of non-gf stations %d\n",
__func__, (psta->hwaddr),
pmlmepriv->num_sta_ht_no_gf);
}
if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH_20_40) == 0) {
@@ -951,20 +859,12 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta)
psta->ht_20mhz_set = 1;
pmlmepriv->num_sta_ht_20mhz++;
}
DBG_88E("%s STA %pM - 20 MHz HT, num of 20MHz HT STAs %d\n",
__func__, (psta->hwaddr),
pmlmepriv->num_sta_ht_20mhz);
}
} else {
if (!psta->no_ht_set) {
psta->no_ht_set = 1;
pmlmepriv->num_sta_no_ht++;
}
if (pmlmepriv->htpriv.ht_option) {
DBG_88E("%s STA %pM - no HT, num of non-HT stations %d\n",
__func__, (psta->hwaddr),
pmlmepriv->num_sta_no_ht);
}
}
if (rtw_ht_operation_update(padapter) > 0) {
@@ -972,10 +872,8 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta)
update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, true);
}
/* update associcated stations cap. */
/* update associated stations cap. */
associated_clients_update(padapter, beacon_updated);
DBG_88E("%s, updated =%d\n", __func__, beacon_updated);
}
u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta)
@@ -1036,9 +934,7 @@ u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta)
update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, true);
}
/* update associcated stations cap. */
DBG_88E("%s, updated =%d\n", __func__, beacon_updated);
/* update associated stations cap. */
return beacon_updated;
}
@@ -1093,8 +989,6 @@ int rtw_sta_flush(struct adapter *padapter)
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
DBG_88E(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev));
if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE)
return ret;
@@ -1236,8 +1130,6 @@ void stop_ap_mode(struct adapter *padapter)
}
spin_unlock_bh(&pacl_node_q->lock);
DBG_88E("%s, free acl_node_queue, num =%d\n", __func__, pacl_list->num);
rtw_sta_flush(padapter);
/* free_assoc_sta_resources */

82
drivers/staging/r8188eu/core/rtw_br_ext.c
View File

@@ -71,10 +71,8 @@ static int __nat25_add_pppoe_tag(struct sk_buff *skb, struct pppoe_tag *tag)
int data_len;
data_len = tag->tag_len + TAG_HDR_LEN;
if (skb_tailroom(skb) < data_len) {
_DEBUG_ERR("skb_tailroom() failed in add SID tag!\n");
if (skb_tailroom(skb) < data_len)
return -1;
}
skb_put(skb, data_len);
/* have a room for new tag */
@@ -105,8 +103,7 @@ static int skb_pull_and_merge(struct sk_buff *skb, unsigned char *src, int len)
return 0;
}
static int __nat25_has_expired(struct adapter *priv,
struct nat25_network_db_entry *fdb)
static int __nat25_has_expired(struct nat25_network_db_entry *fdb)
{
if (time_before_eq(fdb->ageing_timer, jiffies - NAT25_AGEING_TIME * HZ))
return 1;
@@ -163,9 +160,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 8) {
mac = scan_tlv(&data[8], len-8, 1, 1);
if (mac) {
_DEBUG_INFO("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@@ -174,9 +168,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 16) {
mac = scan_tlv(&data[16], len-16, 1, 1);
if (mac) {
_DEBUG_INFO("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@@ -185,9 +176,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 24) {
mac = scan_tlv(&data[24], len-24, 1, 1);
if (mac) {
_DEBUG_INFO("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@@ -196,9 +184,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 24) {
mac = scan_tlv(&data[24], len-24, 2, 1);
if (mac) {
_DEBUG_INFO("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@@ -207,9 +192,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 40) {
mac = scan_tlv(&data[40], len-40, 2, 1);
if (mac) {
_DEBUG_INFO("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@@ -319,10 +301,6 @@ static void __nat25_db_network_insert(struct adapter *priv,
spin_unlock_bh(&priv->br_ext_lock);
}
static void __nat25_db_print(struct adapter *priv)
{
}
/*
* NAT2.5 interface
*/
@@ -367,7 +345,7 @@ void nat25_db_expire(struct adapter *priv)
struct nat25_network_db_entry *g;
g = f->next_hash;
if (__nat25_has_expired(priv, f)) {
if (__nat25_has_expired(f)) {
if (atomic_dec_and_test(&f->use_count)) {
if (priv->scdb_entry == f) {
memset(priv->scdb_mac, 0, ETH_ALEN);
@@ -404,10 +382,8 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
if (protocol == ETH_P_IP) {
struct iphdr *iph = (struct iphdr *)(skb->data + ETH_HLEN);
if (((unsigned char *)(iph) + (iph->ihl<<2)) >= (skb->data + ETH_HLEN + skb->len)) {
DEBUG_WARN("NAT25: malformed IP packet !\n");
if (((unsigned char *)(iph) + (iph->ihl << 2)) >= (skb->data + ETH_HLEN + skb->len))
return -1;
}
switch (method) {
case NAT25_CHECK:
@@ -418,12 +394,9 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
if (iph->saddr == 0)
return 0;
tmp = be32_to_cpu(iph->saddr);
DEBUG_INFO("NAT25: Insert IP, SA =%08x, DA =%08x\n", tmp, iph->daddr);
__nat25_generate_ipv4_network_addr(networkAddr, &tmp);
/* record source IP address and , source mac address into db */
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
return 0;
default:
return -1;
@@ -436,25 +409,19 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
unsigned char *arp_ptr = (unsigned char *)(arp + 1);
unsigned int *sender;
if (arp->ar_pro != __constant_htons(ETH_P_IP)) {
DEBUG_WARN("NAT25: arp protocol unknown (%4x)!\n", be16_to_cpu(arp->ar_pro));
if (arp->ar_pro != htons(ETH_P_IP))
return -1;
}
switch (method) {
case NAT25_CHECK:
return 0; /* skb_copy for all ARP frame */
case NAT25_INSERT:
DEBUG_INFO("NAT25: Insert ARP, MAC =%02x%02x%02x%02x%02x%02x\n", arp_ptr[0],
arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]);
/* change to ARP sender mac address to wlan STA address */
memcpy(arp_ptr, GET_MY_HWADDR(priv), ETH_ALEN);
arp_ptr += arp->ar_hln;
sender = (unsigned int *)arp_ptr;
__nat25_generate_ipv4_network_addr(networkAddr, sender);
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
return 0;
default:
return -1;
@@ -484,18 +451,19 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
pOldTag = (struct pppoe_tag *)__nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID));
if (pOldTag) { /* if SID existed, copy old value and delete it */
old_tag_len = ntohs(pOldTag->tag_len);
if (old_tag_len+TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN > sizeof(tag_buf)) {
DEBUG_ERR("SID tag length too long!\n");
if (old_tag_len +
TAG_HDR_LEN +
MAGIC_CODE_LEN +
RTL_RELAY_TAG_LEN >
sizeof(tag_buf))
return -1;
}
memcpy(tag->tag_data+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN,
pOldTag->tag_data, old_tag_len);
if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN+old_tag_len) < 0) {
DEBUG_ERR("call skb_pull_and_merge() failed in PADI/R packet!\n");
if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN+old_tag_len) < 0)
return -1;
}
ph->length = htons(ntohs(ph->length)-TAG_HDR_LEN-old_tag_len);
}
@@ -510,15 +478,12 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
/* Add relay tag */
if (__nat25_add_pppoe_tag(skb, tag) < 0)
return -1;
DEBUG_INFO("NAT25: Insert PPPoE, forward %s packet\n",
(ph->code == PADI_CODE ? "PADI" : "PADR"));
} else { /* not add relay tag */
if (priv->pppoe_connection_in_progress &&
memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) {
DEBUG_ERR("Discard PPPoE packet due to another PPPoE connection is in progress!\n");
memcmp(skb->data + ETH_ALEN,
priv->pppoe_addr,
ETH_ALEN))
return -2;
}
if (priv->pppoe_connection_in_progress == 0)
memcpy(priv->pppoe_addr, skb->data+ETH_ALEN, ETH_ALEN);
@@ -529,14 +494,10 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
return -1;
}
} else { /* session phase */
DEBUG_INFO("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name);
__nat25_generate_pppoe_network_addr(networkAddr, skb->data, &ph->sid);
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
if (!priv->ethBrExtInfo.addPPPoETag &&
priv->pppoe_connection_in_progress &&
!memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN))
@@ -576,10 +537,8 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
/*------------------------------------------------*/
struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN);
if (sizeof(*iph) >= (skb->len - ETH_HLEN)) {
DEBUG_WARN("NAT25: malformed IPv6 packet !\n");
if (sizeof(*iph) >= (skb->len - ETH_HLEN))
return -1;
}
switch (method) {
case NAT25_CHECK:
@@ -587,17 +546,9 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
return 0;
return -1;
case NAT25_INSERT:
DEBUG_INFO("NAT25: Insert IP, SA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
" DA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n",
iph->saddr.s6_addr16[0], iph->saddr.s6_addr16[1], iph->saddr.s6_addr16[2], iph->saddr.s6_addr16[3],
iph->saddr.s6_addr16[4], iph->saddr.s6_addr16[5], iph->saddr.s6_addr16[6], iph->saddr.s6_addr16[7],
iph->daddr.s6_addr16[0], iph->daddr.s6_addr16[1], iph->daddr.s6_addr16[2], iph->daddr.s6_addr16[3],
iph->daddr.s6_addr16[4], iph->daddr.s6_addr16[5], iph->daddr.s6_addr16[6], iph->daddr.s6_addr16[7]);
if (memcmp(&iph->saddr, "\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0", 16)) {
__nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->saddr);
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
if (iph->nexthdr == IPPROTO_ICMPV6 &&
skb->len > (ETH_HLEN + sizeof(*iph) + 4)) {
@@ -669,7 +620,6 @@ void dhcp_flag_bcast(struct adapter *priv, struct sk_buff *skb)
/* if not broadcast */
register int sum = 0;
DEBUG_INFO("DHCP: change flag of DHCP request to broadcast.\n");
/* or BROADCAST flag */
dhcph->flags |= htons(BROADCAST_FLAG);
/* recalculate checksum */

49
drivers/staging/r8188eu/core/rtw_cmd.c
View File

@@ -65,7 +65,6 @@ static int _rtw_init_evt_priv(struct evt_priv *pevtpriv)
/* allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf */
atomic_set(&pevtpriv->event_seq, 0);
pevtpriv->evt_done_cnt = 0;
INIT_WORK(&pevtpriv->c2h_wk, c2h_wk_callback);
pevtpriv->c2h_wk_alive = false;
@@ -133,7 +132,7 @@ static struct cmd_obj *_rtw_dequeue_cmd(struct __queue *queue)
obj = NULL;
} else {
obj = container_of((&queue->queue)->next, struct cmd_obj, list);
rtw_list_delete(&obj->list);
list_del_init(&obj->list);
}
spin_unlock_irqrestore(&queue->lock, flags);
@@ -252,12 +251,8 @@ int rtw_cmd_thread(void *context)
_next:
if (padapter->bDriverStopped ||
padapter->bSurpriseRemoved) {
netdev_dbg(padapter->pnetdev,
"DriverStopped(%d) SurpriseRemoved(%d) break\n",
padapter->bDriverStopped, padapter->bSurpriseRemoved);
padapter->bSurpriseRemoved)
break;
}
pcmd = rtw_dequeue_cmd(pcmdpriv);
if (!pcmd)
@@ -574,8 +569,6 @@ u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork)
else
padapter->pwrctrlpriv.smart_ps = padapter->registrypriv.smart_ps;
netdev_dbg(padapter->pnetdev, "smart_ps = %d\n", padapter->pwrctrlpriv.smart_ps);
pcmd->cmdsz = get_wlan_bssid_ex_sz(psecnetwork);/* get cmdsz before endian conversion */
INIT_LIST_HEAD(&pcmd->list);
@@ -836,7 +829,7 @@ exit:
return res;
}
u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue)
u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan)
{
struct cmd_obj *pcmdobj;
struct SetChannelPlan_param *setChannelPlan_param;
@@ -859,25 +852,17 @@ u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue)
}
setChannelPlan_param->channel_plan = chplan;
if (enqueue) {
/* need enqueue, prepare cmd_obj and enqueue */
pcmdobj = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL);
if (!pcmdobj) {
kfree(setChannelPlan_param);
res = _FAIL;
goto exit;
}
init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelPlan_param, GEN_CMD_CODE(_SetChannelPlan));
res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
} else {
/* no need to enqueue, do the cmd hdl directly and free cmd parameter */
if (H2C_SUCCESS != set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param))
res = _FAIL;
/* need enqueue, prepare cmd_obj and enqueue */
pcmdobj = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL);
if (!pcmdobj) {
kfree(setChannelPlan_param);
res = _FAIL;
goto exit;
}
init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelPlan_param, GEN_CMD_CODE(_SetChannelPlan));
res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
/* do something based on res... */
if (res == _SUCCESS)
padapter->mlmepriv.ChannelPlan = chplan;
@@ -951,10 +936,8 @@ static void rtl8188e_sreset_xmit_status_check(struct adapter *padapter)
u32 txdma_status;
txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
if (txdma_status != 0x00) {
DBG_88E("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
if (txdma_status != 0x00)
rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status);
}
/* total xmit irp = 4 */
}
@@ -1335,9 +1318,10 @@ static void c2h_wk_callback(struct work_struct *work)
evtpriv->c2h_wk_alive = true;
while (!rtw_cbuf_empty(evtpriv->c2h_queue)) {
if ((c2h_evt = (struct c2h_evt_hdr *)rtw_cbuf_pop(evtpriv->c2h_queue)) != NULL) {
c2h_evt = (struct c2h_evt_hdr *)rtw_cbuf_pop(evtpriv->c2h_queue);
if (c2h_evt) {
/* This C2H event is read, clear it */
c2h_evt_clear(adapter);
rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
} else {
c2h_evt = kmalloc(16, GFP_KERNEL);
if (c2h_evt) {
@@ -1466,7 +1450,6 @@ void rtw_joinbss_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd)
void rtw_createbss_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd)
{
u8 timer_cancelled;
struct sta_info *psta = NULL;
struct wlan_network *pwlan = NULL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
@@ -1476,7 +1459,7 @@ void rtw_createbss_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd)
if (pcmd->res != H2C_SUCCESS)
_set_timer(&pmlmepriv->assoc_timer, 1);
_cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled);
del_timer_sync(&pmlmepriv->assoc_timer);
spin_lock_bh(&pmlmepriv->lock);

314
drivers/staging/r8188eu/core/rtw_fw.c Normal file
View File

@@ -0,0 +1,314 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include <linux/firmware.h>
#include "../include/rtw_fw.h"
#define MAX_REG_BOLCK_SIZE 196
#define FW_8188E_START_ADDRESS 0x1000
#define MAX_PAGE_SIZE 4096
#define IS_FW_HEADER_EXIST(_fwhdr) \
((le16_to_cpu(_fwhdr->Signature) & 0xFFF0) == 0x92C0 || \
(le16_to_cpu(_fwhdr->Signature) & 0xFFF0) == 0x88C0 || \
(le16_to_cpu(_fwhdr->Signature) & 0xFFF0) == 0x2300 || \
(le16_to_cpu(_fwhdr->Signature) & 0xFFF0) == 0x88E0)
/* This structure must be careful with byte-ordering */
struct rt_firmware_hdr {
/* 8-byte alinment required */
/* LONG WORD 0 ---- */
__le16 Signature; /* 92C0: test chip; 92C,
* 88C0: test chip; 88C1: MP A-cut;
* 92C1: MP A-cut */
u8 Category; /* AP/NIC and USB/PCI */
u8 Function; /* Reserved for different FW function
* indcation, for further use when
* driver needs to download different
* FW for different conditions */
__le16 Version; /* FW Version */
u8 Subversion; /* FW Subversion, default 0x00 */
u16 Rsvd1;
/* LONG WORD 1 ---- */
u8 Month; /* Release time Month field */
u8 Date; /* Release time Date field */
u8 Hour; /* Release time Hour field */
u8 Minute; /* Release time Minute field */
__le16 RamCodeSize; /* The size of RAM code */
u8 Foundry;
u8 Rsvd2;
/* LONG WORD 2 ---- */
__le32 SvnIdx; /* The SVN entry index */
u32 Rsvd3;
/* LONG WORD 3 ---- */
u32 Rsvd4;
u32 Rsvd5;
};
static void fw_download_enable(struct adapter *padapter, bool enable)
{
u8 tmp;
if (enable) {
/* MCU firmware download enable. */
tmp = rtw_read8(padapter, REG_MCUFWDL);
rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01);
/* 8051 reset */
tmp = rtw_read8(padapter, REG_MCUFWDL + 2);
rtw_write8(padapter, REG_MCUFWDL + 2, tmp & 0xf7);
} else {
/* MCU firmware download disable. */
tmp = rtw_read8(padapter, REG_MCUFWDL);
rtw_write8(padapter, REG_MCUFWDL, tmp & 0xfe);
/* Reserved for fw extension. */
rtw_write8(padapter, REG_MCUFWDL + 1, 0x00);
}
}
static int block_write(struct adapter *padapter, void *buffer, u32 buffSize)
{
int ret = _SUCCESS;
u32 blockSize_p1 = 4; /* (Default) Phase #1 : PCI muse use 4-byte write to download FW */
u32 blockSize_p2 = 8; /* Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. */
u32 blockSize_p3 = 1; /* Phase #3 : Use 1-byte, the remnant of FW image. */
u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0;
u32 remainSize_p1 = 0, remainSize_p2 = 0;
u8 *bufferPtr = (u8 *)buffer;
u32 i = 0, offset = 0;
blockSize_p1 = MAX_REG_BOLCK_SIZE;
/* 3 Phase #1 */
blockCount_p1 = buffSize / blockSize_p1;
remainSize_p1 = buffSize % blockSize_p1;
for (i = 0; i < blockCount_p1; i++) {
ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1));
if (ret == _FAIL)
goto exit;
}
/* 3 Phase #2 */
if (remainSize_p1) {
offset = blockCount_p1 * blockSize_p1;
blockCount_p2 = remainSize_p1 / blockSize_p2;
remainSize_p2 = remainSize_p1 % blockSize_p2;
for (i = 0; i < blockCount_p2; i++) {
ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i * blockSize_p2), blockSize_p2, (bufferPtr + offset + i * blockSize_p2));
if (ret == _FAIL)
goto exit;
}
}
/* 3 Phase #3 */
if (remainSize_p2) {
offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2);
blockCount_p3 = remainSize_p2 / blockSize_p3;
for (i = 0; i < blockCount_p3; i++) {
ret = rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i));
if (ret == _FAIL)
goto exit;
}
}
exit:
return ret;
}
static int page_write(struct adapter *padapter, u32 page, void *buffer, u32 size)
{
u8 value8;
u8 u8Page = (u8)(page & 0x07);
value8 = (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page;
rtw_write8(padapter, REG_MCUFWDL + 2, value8);
return block_write(padapter, buffer, size);
}
static int write_fw(struct adapter *padapter, void *buffer, u32 size)
{
/* Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */
/* We can remove _ReadChipVersion from ReadpadapterInfo8192C later. */
int ret = _SUCCESS;
u32 pageNums, remainSize;
u32 page, offset;
u8 *bufferPtr = (u8 *)buffer;
pageNums = size / MAX_PAGE_SIZE;
remainSize = size % MAX_PAGE_SIZE;
for (page = 0; page < pageNums; page++) {
offset = page * MAX_PAGE_SIZE;
ret = page_write(padapter, page, bufferPtr + offset, MAX_PAGE_SIZE);
if (ret == _FAIL)
goto exit;
}
if (remainSize) {
offset = pageNums * MAX_PAGE_SIZE;
page = pageNums;
ret = page_write(padapter, page, bufferPtr + offset, remainSize);
if (ret == _FAIL)
goto exit;
}
exit:
return ret;
}
void rtw_reset_8051(struct adapter *padapter)
{
u8 val8;
val8 = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val8 & (~BIT(2)));
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val8 | (BIT(2)));
}
static int fw_free_to_go(struct adapter *padapter)
{
u32 counter = 0;
u32 value32;
/* polling CheckSum report */
do {
value32 = rtw_read32(padapter, REG_MCUFWDL);
if (value32 & FWDL_CHKSUM_RPT)
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
if (counter >= POLLING_READY_TIMEOUT_COUNT)
return _FAIL;
value32 = rtw_read32(padapter, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
value32 &= ~WINTINI_RDY;
rtw_write32(padapter, REG_MCUFWDL, value32);
rtw_reset_8051(padapter);
/* polling for FW ready */
counter = 0;
do {
value32 = rtw_read32(padapter, REG_MCUFWDL);
if (value32 & WINTINI_RDY)
return _SUCCESS;
udelay(5);
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
return _FAIL;
}
static int load_firmware(struct rt_firmware *rtfw, struct device *device)
{
int ret = _SUCCESS;
const struct firmware *fw;
const char *fw_name = "rtlwifi/rtl8188eufw.bin";
int err = request_firmware(&fw, fw_name, device);
if (err) {
pr_err("Request firmware failed with error 0x%x\n", err);
ret = _FAIL;
goto exit;
}
if (!fw) {
pr_err("Firmware %s not available\n", fw_name);
ret = _FAIL;
goto exit;
}
rtfw->data = kmemdup(fw->data, fw->size, GFP_KERNEL);
if (!rtfw->data) {
pr_err("Failed to allocate rtfw->data\n");
ret = _FAIL;
goto exit;
}
rtfw->size = fw->size;
exit:
release_firmware(fw);
return ret;
}
int rtl8188e_firmware_download(struct adapter *padapter)
{
int ret = _SUCCESS;
u8 write_fw_retry = 0;
u32 fwdl_start_time;
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
struct device *device = dvobj_to_dev(dvobj);
struct rt_firmware_hdr *fwhdr = NULL;
u16 fw_version, fw_subversion, fw_signature;
u8 *fw_data;
u32 fw_size;
static int log_version;
if (!dvobj->firmware.data)
ret = load_firmware(&dvobj->firmware, device);
if (ret == _FAIL) {
dvobj->firmware.data = NULL;
goto exit;
}
fw_data = dvobj->firmware.data;
fw_size = dvobj->firmware.size;
/* To Check Fw header. Added by tynli. 2009.12.04. */
fwhdr = (struct rt_firmware_hdr *)dvobj->firmware.data;
fw_version = le16_to_cpu(fwhdr->Version);
fw_subversion = fwhdr->Subversion;
fw_signature = le16_to_cpu(fwhdr->Signature);
if (!log_version++)
pr_info("%sFirmware Version %d, SubVersion %d, Signature 0x%x\n",
DRIVER_PREFIX, fw_version, fw_subversion, fw_signature);
if (IS_FW_HEADER_EXIST(fwhdr)) {
/* Shift 32 bytes for FW header */
fw_data = fw_data + 32;
fw_size = fw_size - 32;
}
/* Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */
/* or it will cause download Fw fail. 2010.02.01. by tynli. */
if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */
rtw_write8(padapter, REG_MCUFWDL, 0x00);
rtw_reset_8051(padapter);
}
fw_download_enable(padapter, true);
fwdl_start_time = jiffies;
while (1) {
/* reset the FWDL chksum */
rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_CHKSUM_RPT);
ret = write_fw(padapter, fw_data, fw_size);
if (ret == _SUCCESS ||
(rtw_get_passing_time_ms(fwdl_start_time) > 500 && write_fw_retry++ >= 3))
break;
}
fw_download_enable(padapter, false);
if (ret != _SUCCESS)
goto exit;
ret = fw_free_to_go(padapter);
if (ret != _SUCCESS)
goto exit;
exit:
return ret;
}

41
drivers/staging/r8188eu/core/rtw_ieee80211.c
View File

@@ -68,7 +68,7 @@ int rtw_get_bit_value_from_ieee_value(u8 val)
return 0;
}
uint rtw_is_cckrates_included(u8 *rate)
bool rtw_is_cckrates_included(u8 *rate)
{
u32 i = 0;
@@ -81,7 +81,7 @@ uint rtw_is_cckrates_included(u8 *rate)
return false;
}
uint rtw_is_cckratesonly_included(u8 *rate)
bool rtw_is_cckratesonly_included(u8 *rate)
{
u32 i = 0;
@@ -653,13 +653,8 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
/* first 3 bytes in vendor specific information element are the IEEE
* OUI of the vendor. The following byte is used a vendor specific
* sub-type. */
if (elen < 4) {
if (show_errors) {
DBG_88E("short vendor specific information element ignored (len=%lu)\n",
(unsigned long)elen);
}
if (elen < 4)
return -1;
}
oui = RTW_GET_BE24(pos);
switch (oui) {
@@ -674,11 +669,8 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->wpa_ie_len = elen;
break;
case WME_OUI_TYPE: /* this is a Wi-Fi WME info. element */
if (elen < 5) {
DBG_88E("short WME information element ignored (len=%lu)\n",
(unsigned long)elen);
if (elen < 5)
return -1;
}
switch (pos[4]) {
case WME_OUI_SUBTYPE_INFORMATION_ELEMENT:
case WME_OUI_SUBTYPE_PARAMETER_ELEMENT:
@@ -690,8 +682,6 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->wme_tspec_len = elen;
break;
default:
DBG_88E("unknown WME information element ignored (subtype=%d len=%lu)\n",
pos[4], (unsigned long)elen);
return -1;
}
break;
@@ -701,8 +691,6 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->wps_ie_len = elen;
break;
default:
DBG_88E("Unknown Microsoft information element ignored (type=%d len=%lu)\n",
pos[3], (unsigned long)elen);
return -1;
}
break;
@@ -714,14 +702,10 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->vendor_ht_cap_len = elen;
break;
default:
DBG_88E("Unknown Broadcom information element ignored (type=%d len=%lu)\n",
pos[3], (unsigned long)elen);
return -1;
}
break;
default:
DBG_88E("unknown vendor specific information element ignored (vendor OUI %02x:%02x:%02x len=%lu)\n",
pos[0], pos[1], pos[2], (unsigned long)elen);
return -1;
}
return 0;
@@ -752,13 +736,8 @@ enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
elen = *pos++;
left -= 2;
if (elen > left) {
if (show_errors) {
DBG_88E("IEEE 802.11 element parse failed (id=%d elen=%d left=%lu)\n",
id, elen, (unsigned long)left);
}
if (elen > left)
return ParseFailed;
}
switch (id) {
case WLAN_EID_SSID:
@@ -839,10 +818,6 @@ enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
break;
default:
unknown++;
if (!show_errors)
break;
DBG_88E("IEEE 802.11 element parse ignored unknown element (id=%d elen=%d)\n",
id, elen);
break;
}
left -= elen;
@@ -890,12 +865,8 @@ void rtw_macaddr_cfg(u8 *mac_addr)
ether_addr_copy(mac, mac_addr);
}
if (is_broadcast_ether_addr(mac) || is_zero_ether_addr(mac)) {
if (is_broadcast_ether_addr(mac) || is_zero_ether_addr(mac))
eth_random_addr(mac_addr);
DBG_88E("MAC Address from efuse error, assign random one !!!\n");
}
DBG_88E("rtw_macaddr_cfg MAC Address = %pM\n", mac_addr);
}
/**

10
drivers/staging/r8188eu/core/rtw_ioctl_set.c
View File

@@ -110,8 +110,6 @@ u8 rtw_set_802_11_bssid(struct adapter *padapter, u8 *bssid)
u32 cur_time = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
netdev_dbg(padapter->pnetdev, "set bssid:%pM\n", bssid);
if ((bssid[0] == 0x00 && bssid[1] == 0x00 && bssid[2] == 0x00 &&
bssid[3] == 0x00 && bssid[4] == 0x00 && bssid[5] == 0x00) ||
(bssid[0] == 0xFF && bssid[1] == 0xFF && bssid[2] == 0xFF &&
@@ -122,7 +120,6 @@ u8 rtw_set_802_11_bssid(struct adapter *padapter, u8 *bssid)
spin_lock_bh(&pmlmepriv->lock);
DBG_88E("Set BSSID under fw_state = 0x%08x\n", get_fwstate(pmlmepriv));
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
goto handle_tkip_countermeasure;
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING))
@@ -185,9 +182,6 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid)
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *pnetwork = &pmlmepriv->cur_network;
netdev_dbg(padapter->pnetdev, "set ssid [%s] fw_state=0x%08x\n",
ssid->Ssid, get_fwstate(pmlmepriv));
if (!padapter->hw_init_completed) {
status = _FAIL;
goto exit;
@@ -195,7 +189,6 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid)
spin_lock_bh(&pmlmepriv->lock);
DBG_88E("Set SSID under fw_state = 0x%08x\n", get_fwstate(pmlmepriv));
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) {
goto handle_tkip_countermeasure;
} else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) {
@@ -280,8 +273,6 @@ u8 rtw_set_802_11_infrastructure_mode(struct adapter *padapter,
if (*pold_state != networktype) {
spin_lock_bh(&pmlmepriv->lock);
/* DBG_88E("change mode, old_mode =%d, new_mode =%d, fw_state = 0x%x\n", *pold_state, networktype, get_fwstate(pmlmepriv)); */
if (*pold_state == Ndis802_11APMode) {
/* change to other mode from Ndis802_11APMode */
cur_network->join_res = -1;
@@ -364,7 +355,6 @@ u8 rtw_set_802_11_bssid_list_scan(struct adapter *padapter, struct ndis_802_11_s
res = true;
} else {
if (rtw_is_scan_deny(padapter)) {
DBG_88E(FUNC_ADPT_FMT": scan deny\n", FUNC_ADPT_ARG(padapter));
indicate_wx_scan_complete_event(padapter);
return _SUCCESS;
}

14
drivers/staging/r8188eu/core/rtw_iol.c
View File

@@ -11,14 +11,11 @@ struct xmit_frame *rtw_IOL_accquire_xmit_frame(struct adapter *adapter)
struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
xmit_frame = rtw_alloc_xmitframe(pxmitpriv);
if (!xmit_frame) {
DBG_88E("%s rtw_alloc_xmitframe return null\n", __func__);
if (!xmit_frame)
return NULL;
}
xmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (!xmitbuf) {
DBG_88E("%s rtw_alloc_xmitbuf return null\n", __func__);
rtw_free_xmitframe(pxmitpriv, xmit_frame);
return NULL;
}
@@ -48,11 +45,8 @@ int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len
ori_len = buf_offset + pattrib->pktlen;
/* check if the io_buf can accommodate new cmds */
if (ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) {
DBG_88E("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n",
__func__, ori_len + cmd_len + 8, MAX_XMITBUF_SZ);
if (ori_len + cmd_len + 8 > MAX_XMITBUF_SZ)
return _FAIL;
}
memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len);
pattrib->pktlen += cmd_len;
@@ -66,8 +60,10 @@ bool rtw_IOL_applied(struct adapter *adapter)
if (1 == adapter->registrypriv.fw_iol)
return true;
if ((2 == adapter->registrypriv.fw_iol) && (!adapter_to_dvobj(adapter)->ishighspeed))
if ((2 == adapter->registrypriv.fw_iol) &&
(adapter_to_dvobj(adapter)->pusbdev->speed != USB_SPEED_HIGH))
return true;
return false;
}

106
drivers/staging/r8188eu/core/rtw_mlme.c
View File

@@ -85,10 +85,6 @@ exit:
return res;
}
static void rtw_mfree_mlme_priv_lock(struct mlme_priv *pmlmepriv)
{
}
static void rtw_free_mlme_ie_data(u8 **ppie, u32 *plen)
{
kfree(*ppie);
@@ -118,8 +114,6 @@ void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv)
rtw_free_mlme_priv_ie_data(pmlmepriv);
if (pmlmepriv) {
rtw_mfree_mlme_priv_lock(pmlmepriv);
vfree(pmlmepriv->free_bss_buf);
}
@@ -577,7 +571,7 @@ static void rtw_add_network(struct adapter *adapter,
/* (3) WMM */
/* (4) HT */
/* (5) others */
static int rtw_is_desired_network(struct adapter *adapter, struct wlan_network *pnetwork)
static bool rtw_is_desired_network(struct adapter *adapter, struct wlan_network *pnetwork)
{
struct security_priv *psecuritypriv = &adapter->securitypriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
@@ -616,10 +610,8 @@ static int rtw_is_desired_network(struct adapter *adapter, struct wlan_network *
}
}
if ((desired_encmode != Ndis802_11EncryptionDisabled) && (privacy == 0)) {
DBG_88E("desired_encmode: %d, privacy: %d\n", desired_encmode, privacy);
if ((desired_encmode != Ndis802_11EncryptionDisabled) && (privacy == 0))
bselected = false;
}
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
if (pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode)
@@ -674,7 +666,6 @@ exit:
void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf)
{
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
u8 timer_cancelled = 0;
spin_lock_bh(&pmlmepriv->lock);
@@ -684,16 +675,12 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf)
pmlmepriv->wps_probe_req_ie = NULL;
}
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) {
timer_cancelled = 1;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
}
spin_unlock_bh(&pmlmepriv->lock);
if (timer_cancelled)
_cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled);
del_timer_sync(&pmlmepriv->scan_to_timer);
spin_lock_bh(&pmlmepriv->lock);
rtw_set_signal_stat_timer(&adapter->recvpriv);
@@ -734,8 +721,6 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf)
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
rtw_indicate_connect(adapter);
} else {
DBG_88E("try_to_join, but select scanning queue fail, to_roaming:%d\n",
pmlmepriv->to_roaming);
if (rtw_to_roaming(adapter) != 0) {
if (--pmlmepriv->to_roaming == 0 ||
_SUCCESS != rtw_sitesurvey_cmd(adapter, &pmlmepriv->assoc_ssid, 1, NULL, 0)) {
@@ -909,7 +894,6 @@ static struct sta_info *rtw_joinbss_update_stainfo(struct adapter *padapter, str
psta = rtw_alloc_stainfo(pstapriv, pnetwork->network.MacAddress);
if (psta) { /* update ptarget_sta */
DBG_88E("%s\n", __func__);
psta->aid = pnetwork->join_res;
psta->mac_id = 0;
/* sta mode */
@@ -969,8 +953,6 @@ static void rtw_joinbss_update_network(struct adapter *padapter, struct wlan_net
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network;
DBG_88E("%s\n", __func__);
/* why not use ptarget_wlan?? */
memcpy(&cur_network->network, &pnetwork->network, pnetwork->network.Length);
/* some IEs in pnetwork is wrong, so we should use ptarget_wlan IEs */
@@ -1017,7 +999,6 @@ static void rtw_joinbss_update_network(struct adapter *padapter, struct wlan_net
void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf)
{
u8 timer_cancelled;
struct sta_info *ptarget_sta = NULL, *pcur_sta = NULL;
struct sta_priv *pstapriv = &adapter->stapriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
@@ -1026,8 +1007,6 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf)
struct wlan_network *pcur_wlan = NULL, *ptarget_wlan = NULL;
unsigned int the_same_macaddr = false;
rtw_get_encrypt_decrypt_from_registrypriv(adapter);
the_same_macaddr = !memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN);
pnetwork->network.Length = get_wlan_bssid_ex_sz(&pnetwork->network);
@@ -1092,8 +1071,8 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf)
rtw_indicate_connect(adapter);
}
/* s5. Cancle assoc_timer */
_cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled);
/* s5. Cancel assoc_timer */
del_timer_sync(&pmlmepriv->assoc_timer);
} else {
spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
goto ignore_joinbss_callback;
@@ -1196,7 +1175,7 @@ void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf)
/* to do: init sta_info variable */
psta->qos_option = 0;
psta->mac_id = (uint)pstassoc->cam_id;
DBG_88E("%s\n", __func__);
/* for ad-hoc mode */
rtl8188e_SetHalODMVar(adapter, psta, true);
rtw_sta_media_status_rpt(adapter, psta, 1);
@@ -1239,8 +1218,6 @@ void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf)
else
mac_id = pstadel->mac_id;
DBG_88E("%s(mac_id=%d)=%pM\n", __func__, mac_id, pstadel->macaddr);
if (mac_id >= 0) {
u16 media_status;
media_status = (mac_id << 8) | 0; /* MACID|OPMODE:0 means disconnect */
@@ -1330,8 +1307,6 @@ void _rtw_join_timeout_handler (struct adapter *adapter)
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
int do_join_r;
DBG_88E("%s, fw_state=%x\n", __func__, get_fwstate(pmlmepriv));
if (adapter->bDriverStopped || adapter->bSurpriseRemoved)
return;
@@ -1341,15 +1316,11 @@ void _rtw_join_timeout_handler (struct adapter *adapter)
while (1) {
pmlmepriv->to_roaming--;
if (rtw_to_roaming(adapter) != 0) { /* try another */
DBG_88E("%s try another roaming\n", __func__);
do_join_r = rtw_do_join(adapter);
if (_SUCCESS != do_join_r) {
DBG_88E("%s roaming do_join return %d\n", __func__, do_join_r);
if (do_join_r != _SUCCESS)
continue;
}
break;
} else {
DBG_88E("%s We've try roaming but fail\n", __func__);
rtw_indicate_disconnect(adapter);
break;
}
@@ -1370,7 +1341,6 @@ void rtw_scan_timeout_handler (struct adapter *adapter)
{
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
DBG_88E(FUNC_ADPT_FMT" fw_state=%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv));
spin_lock_bh(&pmlmepriv->lock);
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
spin_unlock_bh(&pmlmepriv->lock);
@@ -1385,7 +1355,6 @@ static void rtw_auto_scan_handler(struct adapter *padapter)
if (pmlmepriv->scan_interval > 0) {
pmlmepriv->scan_interval--;
if (pmlmepriv->scan_interval == 0) {
DBG_88E("%s\n", __func__);
rtw_set_802_11_bssid_list_scan(padapter, NULL, 0);
pmlmepriv->scan_interval = SCAN_INTERVAL;/* 30*2 sec = 60sec */
}
@@ -1409,8 +1378,7 @@ void rtw_dynamic_check_timer_handlder(struct adapter *adapter)
if (pregistrypriv->wifi_spec == 1) {
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
{
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
/* auto site survey */
rtw_auto_scan_handler(adapter);
}
@@ -1423,14 +1391,12 @@ void rtw_dynamic_check_timer_handlder(struct adapter *adapter)
/* expire NAT2.5 entry */
nat25_db_expire(adapter);
if (adapter->pppoe_connection_in_progress > 0) {
if (adapter->pppoe_connection_in_progress > 0)
adapter->pppoe_connection_in_progress--;
}
/* due to rtw_dynamic_check_timer_handlder() is called every 2 seconds */
if (adapter->pppoe_connection_in_progress > 0) {
if (adapter->pppoe_connection_in_progress > 0)
adapter->pppoe_connection_in_progress--;
}
}
rcu_read_unlock();
@@ -1475,15 +1441,6 @@ static int rtw_check_join_candidate(struct mlme_priv *pmlmepriv
*candidate = competitor;
updated = true;
}
if (updated) {
DBG_88E("[by_bssid:%u][assoc_ssid:%s]new candidate: %s(%pM rssi:%d\n",
pmlmepriv->assoc_by_bssid,
pmlmepriv->assoc_ssid.Ssid,
(*candidate)->network.Ssid.Ssid,
(*candidate)->network.MacAddress,
(int)(*candidate)->network.Rssi);
DBG_88E("[to_roaming:%u]\n", rtw_to_roaming(adapter));
}
exit:
return updated;
@@ -1520,19 +1477,12 @@ int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv)
rtw_check_join_candidate(pmlmepriv, &candidate, pnetwork);
}
if (!candidate) {
DBG_88E("%s: return _FAIL(candidate==NULL)\n", __func__);
ret = _FAIL;
goto exit;
} else {
DBG_88E("%s: candidate: %s(%pM ch:%u)\n", __func__,
candidate->network.Ssid.Ssid, candidate->network.MacAddress,
candidate->network.Configuration.DSConfig);
}
/* check for situation of _FW_LINKED */
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
DBG_88E("%s: _FW_LINKED while ask_for_joinbss!!!\n", __func__);
rtw_disassoc_cmd(adapter, 0, true);
rtw_indicate_disconnect(adapter);
rtw_free_assoc_resources(adapter, 0);
@@ -1542,10 +1492,6 @@ int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv)
if (supp_ant_div) {
u8 cur_ant;
GetHalDefVar8188EUsb(adapter, HAL_DEF_CURRENT_ANTENNA, &cur_ant);
DBG_88E("#### Opt_Ant_(%s), cur_Ant(%s)\n",
(2 == candidate->network.PhyInfo.Optimum_antenna) ? "A" : "B",
(2 == cur_ant) ? "A" : "B"
);
}
ret = rtw_joinbss_cmd(adapter, candidate);
@@ -1575,7 +1521,6 @@ int rtw_set_auth(struct adapter *adapter, struct security_priv *psecuritypriv)
res = _FAIL;
goto exit;
}
memset(psetauthparm, 0, sizeof(struct setauth_parm));
psetauthparm->mode = (unsigned char)psecuritypriv->dot11AuthAlgrthm;
pcmd->cmdcode = _SetAuth_CMD_;
pcmd->parmbuf = (unsigned char *)psetauthparm;
@@ -1598,12 +1543,12 @@ int rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv, in
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
int res = _SUCCESS;
pcmd = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL);
pcmd = kzalloc(sizeof(*pcmd), GFP_KERNEL);
if (!pcmd) {
res = _FAIL; /* try again */
goto exit;
}
psetkeyparm = kzalloc(sizeof(struct setkey_parm), GFP_KERNEL);
psetkeyparm = kzalloc(sizeof(*psetkeyparm), GFP_KERNEL);
if (!psetkeyparm) {
kfree(pcmd);
res = _FAIL;
@@ -1617,8 +1562,6 @@ int rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv, in
psetkeyparm->keyid = (u8)keyid;/* 0~3 */
psetkeyparm->set_tx = set_tx;
pmlmepriv->key_mask |= BIT(psetkeyparm->keyid);
DBG_88E("==> rtw_set_key algorithm(%x), keyid(%x), key_mask(%x)\n",
psetkeyparm->algorithm, psetkeyparm->keyid, pmlmepriv->key_mask);
switch (psetkeyparm->algorithm) {
case _WEP40_:
@@ -1853,11 +1796,6 @@ void rtw_update_registrypriv_dev_network(struct adapter *adapter)
}
void rtw_get_encrypt_decrypt_from_registrypriv(struct adapter *adapter)
{
}
/* the function is at passive_level */
void rtw_joinbss_reset(struct adapter *padapter)
{
@@ -1890,14 +1828,12 @@ void rtw_joinbss_reset(struct adapter *padapter)
unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len)
{
u32 ielen, out_len;
enum ht_cap_ampdu_factor max_rx_ampdu_factor;
unsigned char *p;
struct ieee80211_ht_cap ht_capie;
unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00};
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct qos_priv *pqospriv = &pmlmepriv->qospriv;
struct ht_priv *phtpriv = &pmlmepriv->htpriv;
u32 rx_packet_offset, max_recvbuf_sz;
phtpriv->ht_option = false;
@@ -1922,16 +1858,12 @@ unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie, u8 *out_
IEEE80211_HT_CAP_TX_STBC |
IEEE80211_HT_CAP_DSSSCCK40);
GetHalDefVar8188EUsb(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
GetHalDefVar8188EUsb(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
/*
AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k
AMPDU_para [4:2]:Min MPDU Start Spacing
*/
GetHalDefVar8188EUsb(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
ht_capie.ampdu_params_info = (max_rx_ampdu_factor & 0x03);
ht_capie.ampdu_params_info = (MAX_AMPDU_FACTOR_64K & 0x03);
if (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)
ht_capie.ampdu_params_info |= (IEEE80211_HT_AMPDU_PARM_DENSITY & (0x07 << 2));
@@ -1970,8 +1902,6 @@ void rtw_update_ht_cap(struct adapter *padapter, u8 *pie, uint ie_len)
if ((!pmlmeinfo->HT_info_enable) || (!pmlmeinfo->HT_caps_enable))
return;
DBG_88E("+rtw_update_ht_cap()\n");
/* maybe needs check if ap supports rx ampdu. */
if ((!phtpriv->ampdu_enable) && (pregistrypriv->ampdu_enable == 1)) {
if (pregistrypriv->wifi_spec == 1)
@@ -2021,8 +1951,6 @@ void rtw_update_ht_cap(struct adapter *padapter, u8 *pie, uint ie_len)
/* Config SM Power Save setting */
pmlmeinfo->SM_PS = (le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info) & 0x0C) >> 2;
if (pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC)
DBG_88E("%s(): WLAN_HT_CAP_SM_PS_STATIC\n", __func__);
/* Config current HT Protection mode. */
pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3;
@@ -2057,7 +1985,6 @@ void rtw_issue_addbareq_cmd(struct adapter *padapter, struct xmit_frame *pxmitfr
issued |= (phtpriv->candidate_tid_bitmap >> priority) & 0x1;
if (0 == issued) {
DBG_88E("rtw_issue_addbareq_cmd, p=%d\n", priority);
psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority);
rtw_addbareq_cmd(padapter, (u8)priority, pattrib->ra);
}
@@ -2085,9 +2012,6 @@ void _rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network)
pnetwork = &pmlmepriv->cur_network;
if (0 < rtw_to_roaming(padapter)) {
DBG_88E("roaming from %s(%pM length:%d\n",
pnetwork->network.Ssid.Ssid, pnetwork->network.MacAddress,
pnetwork->network.Ssid.SsidLength);
memcpy(&pmlmepriv->assoc_ssid, &pnetwork->network.Ssid, sizeof(struct ndis_802_11_ssid));
pmlmepriv->assoc_by_bssid = false;
@@ -2097,13 +2021,11 @@ void _rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network)
if (_SUCCESS == do_join_r) {
break;
} else {
DBG_88E("roaming do_join return %d\n", do_join_r);
pmlmepriv->to_roaming--;
if (0 < pmlmepriv->to_roaming) {
continue;
} else {
DBG_88E("%s(%d) -to roaming fail, indicate_disconnect\n", __func__, __LINE__);
rtw_indicate_disconnect(padapter);
break;
}

439
drivers/staging/r8188eu/core/rtw_mlme_ext.c
View File

File diff suppressed because it is too large Load Diff

73
drivers/staging/r8188eu/core/rtw_p2p.c
View File

@@ -30,8 +30,6 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
struct adapter *padapter = pwdinfo->padapter;
struct sta_priv *pstapriv = &padapter->stapriv;
DBG_88E("%s\n", __func__);
pdata_attr = kzalloc(MAX_P2P_IE_LEN, GFP_KERNEL);
pstart = pdata_attr;
@@ -123,8 +121,6 @@ static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da)
u8 oui_subtype = P2P_GO_DISC_REQUEST;
u8 dialogToken = 0;
DBG_88E("[%s]\n", __func__);
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (!pmgntframe)
return;
@@ -182,8 +178,6 @@ static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 s
u8 p2pie[8] = { 0x00 };
u32 p2pielen = 0;
DBG_88E("[%s]\n", __func__);
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (!pmgntframe)
return;
@@ -329,8 +323,6 @@ static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8
u8 noa_attr_content[32] = { 0x00 };
u32 p2pielen = 0;
DBG_88E("[%s]\n", __func__);
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (!pmgntframe)
return;
@@ -826,17 +818,12 @@ u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen);
if (!p2p_ie) {
DBG_88E("[%s] P2P IE not Found!!\n", __func__);
if (!p2p_ie)
status_code = P2P_STATUS_FAIL_INVALID_PARAM;
} else {
DBG_88E("[%s] P2P IE Found!!\n", __func__);
}
while (p2p_ie) {
/* Check P2P Capability ATTR */
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8 *)&le_tmp, (uint *)&attr_contentlen)) {
DBG_88E("[%s] Got P2P Capability Attr!!\n", __func__);
cap_attr = le16_to_cpu(le_tmp);
psta->dev_cap = cap_attr & 0xff;
}
@@ -845,7 +832,6 @@ u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
/* Check P2P Device Info ATTR */
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, NULL, (uint *)&attr_contentlen)) {
DBG_88E("[%s] Got P2P DEVICE INFO Attr!!\n", __func__);
pattr_content = kzalloc(attr_contentlen, GFP_KERNEL);
pbuf = pattr_content;
if (pattr_content) {
@@ -1004,7 +990,6 @@ u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
issue_p2p_provision_resp(pwdinfo, GetAddr2Ptr(pframe), frame_body, uconfig_method);
}
}
DBG_88E("[%s] config method = %s\n", __func__, pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req);
return true;
}
@@ -1083,7 +1068,6 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3);
}
} else {
DBG_88E("[%s] WPS IE not Found!!\n", __func__);
result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
return result;
@@ -1101,7 +1085,6 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen);
if (!p2p_ie) {
DBG_88E("[%s] P2P IE not Found!!\n", __func__);
result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
}
@@ -1119,7 +1102,6 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING);
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, &attr_content, &attr_contentlen)) {
DBG_88E("[%s] GO Intent = %d, tie = %d\n", __func__, attr_content >> 1, attr_content & 0x01);
pwdinfo->peer_intent = attr_content; /* include both intent and tie breaker values. */
if (pwdinfo->intent == (pwdinfo->peer_intent >> 1)) {
@@ -1157,7 +1139,6 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned);
if (ch_num_inclusioned == 0) {
DBG_88E("[%s] No common channel in channel list!\n", __func__);
result = P2P_STATUS_FAIL_NO_COMMON_CH;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
break;
@@ -1173,17 +1154,15 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
peer_operating_ch = operatingch_info[4];
if (rtw_p2p_is_channel_list_ok(peer_operating_ch,
ch_list_inclusioned, ch_num_inclusioned)) {
ch_list_inclusioned,
ch_num_inclusioned))
/**
* Change our operating channel as peer's for compatibility.
*/
pwdinfo->operating_channel = peer_operating_ch;
DBG_88E("[%s] Change op ch to %02x as peer's\n", __func__, pwdinfo->operating_channel);
} else {
else
/* Take first channel of ch_list_inclusioned as operating channel */
pwdinfo->operating_channel = ch_list_inclusioned[0];
DBG_88E("[%s] Change op ch to %02x\n", __func__, pwdinfo->operating_channel);
}
}
}
}
@@ -1208,9 +1187,7 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
/* Be able to know which one is the P2P GO and which one is P2P client. */
if (rtw_get_wps_ie(ies, ies_len, NULL, &wps_ielen)) {
} else {
DBG_88E("[%s] WPS IE not Found!!\n", __func__);
if (!rtw_get_wps_ie(ies, ies_len, NULL, &wps_ielen)) {
result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
}
@@ -1233,7 +1210,6 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
while (p2p_ie) { /* Found the P2P IE. */
rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen);
if (attr_contentlen == 1) {
DBG_88E("[%s] Status = %d\n", __func__, attr_content);
if (attr_content == P2P_STATUS_SUCCESS) {
/* Do nothing. */
} else {
@@ -1259,7 +1235,6 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
attr_content = 0x00;
attr_contentlen = 0;
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, &attr_content, &attr_contentlen)) {
DBG_88E("[%s] GO Intent = %d, tie = %d\n", __func__, attr_content >> 1, attr_content & 0x01);
pwdinfo->peer_intent = attr_content; /* include both intent and tie breaker values. */
if (pwdinfo->intent == (pwdinfo->peer_intent >> 1)) {
@@ -1296,20 +1271,20 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
/* Try to get the operation channel information */
attr_contentlen = 0;
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) {
DBG_88E("[%s] Peer's operating channel = %d\n", __func__, operatingch_info[4]);
if (rtw_get_p2p_attr_content(p2p_ie,
p2p_ielen,
P2P_ATTR_OPERATING_CH,
operatingch_info,
&attr_contentlen))
pwdinfo->peer_operating_ch = operatingch_info[4];
}
/* Try to get the channel list information */
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, pwdinfo->channel_list_attr, &pwdinfo->channel_list_attr_len)) {
DBG_88E("[%s] channel list attribute found, len = %d\n", __func__, pwdinfo->channel_list_attr_len);
peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, pwdinfo->channel_list_attr, pwdinfo->channel_list_attr_len, peer_ch_list);
ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned);
if (ch_num_inclusioned == 0) {
DBG_88E("[%s] No common channel in channel list!\n", __func__);
result = P2P_STATUS_FAIL_NO_COMMON_CH;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
break;
@@ -1325,21 +1300,16 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
peer_operating_ch = operatingch_info[4];
if (rtw_p2p_is_channel_list_ok(peer_operating_ch,
ch_list_inclusioned, ch_num_inclusioned)) {
ch_list_inclusioned, ch_num_inclusioned))
/**
* Change our operating channel as peer's for compatibility.
*/
pwdinfo->operating_channel = peer_operating_ch;
DBG_88E("[%s] Change op ch to %02x as peer's\n", __func__, pwdinfo->operating_channel);
} else {
else
/* Take first channel of ch_list_inclusioned as operating channel */
pwdinfo->operating_channel = ch_list_inclusioned[0];
DBG_88E("[%s] Change op ch to %02x\n", __func__, pwdinfo->operating_channel);
}
}
}
} else {
DBG_88E("[%s] channel list attribute not found!\n", __func__);
}
/* Try to get the group id information if peer is GO */
@@ -1376,13 +1346,10 @@ u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pfr
pwdinfo->negotiation_dialog_token = 1;
rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen);
if (attr_contentlen == 1) {
DBG_88E("[%s] Status = %d\n", __func__, attr_content);
result = attr_content;
if (attr_content == P2P_STATUS_SUCCESS) {
u8 bcancelled = 0;
_cancel_timer(&pwdinfo->restore_p2p_state_timer, &bcancelled);
del_timer_sync(&pwdinfo->restore_p2p_state_timer);
/* Commented by Albert 20100911 */
/* Todo: Need to handle the case which both Intents are the same. */
@@ -1410,16 +1377,17 @@ u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pfr
attr_contentlen = 0;
memset(groupid, 0x00, 38);
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) {
DBG_88E("[%s] Ssid = %s, ssidlen = %zu\n", __func__, &groupid[ETH_ALEN], strlen(&groupid[ETH_ALEN]));
memcpy(pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN);
memcpy(pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN);
}
attr_contentlen = 0;
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) {
DBG_88E("[%s] Peer's operating channel = %d\n", __func__, operatingch_info[4]);
if (rtw_get_p2p_attr_content(p2p_ie,
p2p_ielen,
P2P_ATTR_OPERATING_CH,
operatingch_info,
&attr_contentlen))
pwdinfo->peer_operating_ch = operatingch_info[4];
}
/* Get the next P2P IE */
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
@@ -1655,7 +1623,6 @@ void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state)
if (pwdinfo->ctwindow > 0) {
if (pwrpriv->smart_ps != 0) {
pwrpriv->smart_ps = 0;
DBG_88E("%s(): Enter CTW, change SmartPS\n", __func__);
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&padapter->pwrctrlpriv.pwr_mode));
}
}
@@ -1725,7 +1692,6 @@ static void reset_ch_sitesurvey_timer_process(struct timer_list *t)
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
return;
DBG_88E("[%s] In\n", __func__);
/* Reset the operation channel information */
pwdinfo->rx_invitereq_info.operation_ch[0] = 0;
pwdinfo->rx_invitereq_info.scan_op_ch_only = 0;
@@ -1739,7 +1705,6 @@ static void reset_ch_sitesurvey_timer_process2(struct timer_list *t)
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
return;
DBG_88E("[%s] In\n", __func__);
/* Reset the operation channel information */
pwdinfo->p2p_info.operation_ch[0] = 0;
pwdinfo->p2p_info.scan_op_ch_only = 0;
@@ -1779,8 +1744,6 @@ static void pre_tx_scan_timer_process(struct timer_list *t)
} else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ)) {
if (pwdinfo->invitereq_info.benable)
p2p_protocol_wk_cmd(adapter, P2P_PRE_TX_INVITEREQ_PROCESS_WK);
} else {
DBG_88E("[%s] p2p_state is %d, ignore!!\n", __func__, rtw_p2p_state(pwdinfo));
}
spin_unlock_bh(&pmlmepriv->lock);

47
drivers/staging/r8188eu/core/rtw_pwrctrl.c
View File

@@ -14,15 +14,8 @@ void ips_enter(struct adapter *padapter)
struct xmit_priv *pxmit_priv = &padapter->xmitpriv;
if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF ||
pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF) {
netdev_dbg(padapter->pnetdev,
"There are some pkts to transmit\n");
netdev_dbg(padapter->pnetdev,
"free_xmitbuf_cnt: %d, free_xmit_extbuf_cnt: %d\n",
pxmit_priv->free_xmitbuf_cnt,
pxmit_priv->free_xmit_extbuf_cnt);
pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF)
return;
}
mutex_lock(&pwrpriv->lock);
@@ -32,10 +25,8 @@ void ips_enter(struct adapter *padapter)
pwrpriv->ips_mode = pwrpriv->ips_mode_req;
pwrpriv->ips_enter_cnts++;
DBG_88E("==>ips_enter cnts:%d\n", pwrpriv->ips_enter_cnts);
if (rf_off == pwrpriv->change_rfpwrstate) {
pwrpriv->bpower_saving = true;
netdev_dbg(padapter->pnetdev, "nolinked power save enter\n");
if (pwrpriv->ips_mode == IPS_LEVEL_2)
pwrpriv->bkeepfwalive = true;
@@ -62,16 +53,13 @@ int ips_leave(struct adapter *padapter)
pwrpriv->bips_processing = true;
pwrpriv->change_rfpwrstate = rf_on;
pwrpriv->ips_leave_cnts++;
DBG_88E("==>ips_leave cnts:%d\n", pwrpriv->ips_leave_cnts);
result = rtw_ips_pwr_up(padapter);
if (result == _SUCCESS) {
pwrpriv->rf_pwrstate = rf_on;
}
netdev_dbg(padapter->pnetdev, "nolinked power save leave\n");
if ((_WEP40_ == psecuritypriv->dot11PrivacyAlgrthm) || (_WEP104_ == psecuritypriv->dot11PrivacyAlgrthm)) {
DBG_88E("==>%s, channel(%d), processing(%x)\n", __func__, padapter->mlmeextpriv.cur_channel, pwrpriv->bips_processing);
set_channel_bwmode(padapter, padapter->mlmeextpriv.cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
for (keyid = 0; keyid < 4; keyid++) {
if (pmlmepriv->key_mask & BIT(keyid)) {
@@ -83,7 +71,6 @@ int ips_leave(struct adapter *padapter)
}
}
DBG_88E("==> ips_leave.....LED(0x%08x)...\n", rtw_read32(padapter, 0x4c));
pwrpriv->bips_processing = false;
pwrpriv->bkeepfwalive = false;
@@ -134,7 +121,6 @@ exit:
void rtw_ps_processor(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
pwrpriv->ps_processing = true;
@@ -148,7 +134,6 @@ void rtw_ps_processor(struct adapter *padapter)
goto exit;
if ((pwrpriv->rf_pwrstate == rf_on) && ((pwrpriv->pwr_state_check_cnts % 4) == 0)) {
DBG_88E("==>%s .fw_state(%x)\n", __func__, get_fwstate(pmlmepriv));
pwrpriv->change_rfpwrstate = rf_off;
ips_enter(padapter);
@@ -166,7 +151,7 @@ static void pwr_state_check_handler(struct timer_list *t)
rtw_ps_cmd(padapter);
}
static u8 PS_RDY_CHECK(struct adapter *padapter)
static bool PS_RDY_CHECK(struct adapter *padapter)
{
u32 curr_time, delta_time;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
@@ -186,10 +171,9 @@ static u8 PS_RDY_CHECK(struct adapter *padapter)
return false;
if (pwrpriv->bInSuspend)
return false;
if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && !padapter->securitypriv.binstallGrpkey) {
DBG_88E("Group handshake still in progress !!!\n");
if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X &&
!padapter->securitypriv.binstallGrpkey)
return false;
}
return true;
}
@@ -213,14 +197,12 @@ void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_a
/* if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) */
if (ps_mode == PS_MODE_ACTIVE) {
if (pwdinfo->opp_ps == 0) {
DBG_88E("rtw_set_ps_mode: Leave 802.11 power save\n");
pwrpriv->pwr_mode = ps_mode;
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
pwrpriv->bFwCurrentInPSMode = false;
}
} else {
if (PS_RDY_CHECK(padapter)) {
DBG_88E("%s: Enter 802.11 power save\n", __func__);
pwrpriv->bFwCurrentInPSMode = true;
pwrpriv->pwr_mode = ps_mode;
pwrpriv->smart_ps = smart_ps;
@@ -255,13 +237,11 @@ s32 LPS_RF_ON_check(struct adapter *padapter, u32 delay_ms)
if (padapter->bSurpriseRemoved) {
err = -2;
DBG_88E("%s: device surprise removed!!\n", __func__);
break;
}
if (rtw_get_passing_time_ms(start_time) > delay_ms) {
err = -1;
DBG_88E("%s: Wait for FW LPS leave more than %u ms!!!\n", __func__, delay_ms);
break;
}
rtw_usleep_os(100);
@@ -286,7 +266,6 @@ void LPS_Enter(struct adapter *padapter)
if (pwrpriv->LpsIdleCount >= 2) { /* 4 Sec */
if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) {
pwrpriv->bpower_saving = true;
DBG_88E("%s smart_ps:%d\n", __func__, pwrpriv->smart_ps);
/* For Tenda W311R IOT issue */
rtw_set_ps_mode(padapter, pwrpriv->power_mgnt,
pwrpriv->smart_ps, 0x40);
@@ -385,13 +364,8 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal
pwrpriv->ips_deny_time = jiffies + rtw_ms_to_systime(ips_deffer_ms);
if (pwrpriv->ps_processing) {
DBG_88E("%s wait ps_processing...\n", __func__);
while (pwrpriv->ps_processing && rtw_get_passing_time_ms(start) <= 3000)
msleep(10);
if (pwrpriv->ps_processing)
DBG_88E("%s wait ps_processing timeout\n", __func__);
else
DBG_88E("%s wait ps_processing done\n", __func__);
}
/* System suspend is not allowed to wakeup */
@@ -400,10 +374,6 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal
(rtw_get_passing_time_ms(start) <= 3000 ||
(rtw_get_passing_time_ms(start) <= 500)))
msleep(10);
if (pwrpriv->bInSuspend)
DBG_88E("%s wait bInSuspend timeout\n", __func__);
else
DBG_88E("%s wait bInSuspend done\n", __func__);
}
/* I think this should be check in IPS, LPS, autosuspend functions... */
@@ -412,9 +382,7 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal
goto exit;
}
if (rf_off == pwrpriv->rf_pwrstate) {
DBG_88E("%s call ips_leave....\n", __func__);
if (_FAIL == ips_leave(padapter)) {
DBG_88E("======> ips_leave fail.............\n");
ret = _FAIL;
goto exit;
}
@@ -423,11 +391,6 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal
/* TODO: the following checking need to be merged... */
if (padapter->bDriverStopped || !padapter->bup ||
!padapter->hw_init_completed) {
DBG_88E("%s: bDriverStopped=%d, bup=%d, hw_init_completed =%u\n"
, caller
, padapter->bDriverStopped
, padapter->bup
, padapter->hw_init_completed);
ret = false;
goto exit;
}
@@ -465,11 +428,9 @@ int rtw_pm_set_ips(struct adapter *padapter, u8 mode)
if (mode == IPS_NORMAL || mode == IPS_LEVEL_2) {
rtw_ips_mode_req(pwrctrlpriv, mode);
DBG_88E("%s %s\n", __func__, mode == IPS_NORMAL ? "IPS_NORMAL" : "IPS_LEVEL_2");
return 0;
} else if (mode == IPS_NONE) {
rtw_ips_mode_req(pwrctrlpriv, mode);
DBG_88E("%s %s\n", __func__, "IPS_NONE");
if ((padapter->bSurpriseRemoved == 0) && (_FAIL == rtw_pwr_wakeup(padapter)))
return -EFAULT;
} else {

144
drivers/staging/r8188eu/core/rtw_recv.c
View File

@@ -3,6 +3,7 @@
#define _RTW_RECV_C_
#include <linux/ieee80211.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/recv_osdep.h"
@@ -54,8 +55,6 @@ int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter)
precvpriv->free_recvframe_cnt = NR_RECVFRAME;
rtw_os_recv_resource_init(precvpriv, padapter);
precvpriv->pallocated_frame_buf = vzalloc(NR_RECVFRAME * sizeof(struct recv_frame) + RXFRAME_ALIGN_SZ);
if (!precvpriv->pallocated_frame_buf) {
@@ -72,7 +71,8 @@ int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter)
list_add_tail(&precvframe->list, &precvpriv->free_recv_queue.queue);
res = rtw_os_recv_resource_alloc(padapter, precvframe);
precvframe->pkt_newalloc = NULL;
precvframe->pkt = NULL;
precvframe->len = 0;
@@ -100,11 +100,10 @@ void _rtw_free_recv_priv(struct recv_priv *precvpriv)
rtw_free_uc_swdec_pending_queue(padapter);
rtw_os_recv_resource_free(precvpriv);
vfree(precvpriv->pallocated_frame_buf);
rtl8188eu_free_recv_priv(padapter);
_cancel_timer_ex(&precvpriv->signal_stat_timer);
}
struct recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue)
@@ -243,7 +242,6 @@ u32 rtw_free_uc_swdec_pending_queue(struct adapter *adapter)
struct recv_frame *pending_frame;
while ((pending_frame = rtw_alloc_recvframe(&adapter->recvpriv.uc_swdec_pending_queue))) {
rtw_free_recvframe(pending_frame, &adapter->recvpriv.free_recv_queue);
DBG_88E("%s: dequeue uc_swdec_pending_queue\n", __func__);
cnt++;
}
@@ -275,7 +273,6 @@ static int recvframe_chkmic(struct adapter *adapter, struct recv_frame *precvfr
if (!psecuritypriv) {
res = _FAIL;
DBG_88E("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n");
goto exit;
}
} else {
@@ -304,12 +301,9 @@ static int recvframe_chkmic(struct adapter *adapter, struct recv_frame *precvfr
if (is_multicast_ether_addr(prxattrib->ra) && prxattrib->key_index != pmlmeinfo->key_index)
brpt_micerror = false;
if ((prxattrib->bdecrypted) && (brpt_micerror)) {
if ((prxattrib->bdecrypted) && (brpt_micerror))
rtw_handle_tkip_mic_err(adapter, (u8)is_multicast_ether_addr(prxattrib->ra));
DBG_88E(" mic error :prxattrib->bdecrypted=%d\n", prxattrib->bdecrypted);
} else {
DBG_88E(" mic error :prxattrib->bdecrypted=%d\n", prxattrib->bdecrypted);
}
res = _FAIL;
} else {
/* mic checked ok */
@@ -339,8 +333,6 @@ static struct recv_frame *decryptor(struct adapter *padapter, struct recv_frame
prxattrib->key_index = (((iv[3]) >> 6) & 0x3);
if (prxattrib->key_index > WEP_KEYS) {
DBG_88E("prxattrib->key_index(%d)>WEP_KEYS\n", prxattrib->key_index);
switch (prxattrib->encrypt) {
case _WEP40_:
case _WEP104_:
@@ -688,10 +680,8 @@ static int ap2sta_data_frame(
if (!memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) ||
!memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) ||
(memcmp(pattrib->bssid, mybssid, ETH_ALEN))) {
if (!bmcast) {
DBG_88E("issue_deauth to the nonassociated ap=%pM for the reason(7)\n", (pattrib->bssid));
if (!bmcast)
issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
}
ret = _FAIL;
goto exit;
@@ -739,11 +729,8 @@ static int ap2sta_data_frame(
} else {
if (!memcmp(myhwaddr, pattrib->dst, ETH_ALEN) && (!bmcast)) {
*psta = rtw_get_stainfo(pstapriv, pattrib->bssid); /* get sta_info */
if (!*psta) {
DBG_88E("issue_deauth to the ap =%pM for the reason(7)\n", (pattrib->bssid));
if (!*psta)
issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
}
}
ret = _FAIL;
@@ -774,8 +761,6 @@ static int sta2ap_data_frame(struct adapter *adapter,
*psta = rtw_get_stainfo(pstapriv, pattrib->src);
if (!*psta) {
DBG_88E("issue_deauth to sta=%pM for the reason(7)\n", (pattrib->src));
issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
ret = RTW_RX_HANDLED;
@@ -800,7 +785,6 @@ static int sta2ap_data_frame(struct adapter *adapter,
ret = RTW_RX_HANDLED;
goto exit;
}
DBG_88E("issue_deauth to sta=%pM for the reason(7)\n", (pattrib->src));
issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
ret = RTW_RX_HANDLED;
goto exit;
@@ -865,7 +849,6 @@ static int validate_recv_ctrl_frame(struct adapter *padapter,
return _FAIL;
if (psta->state & WIFI_STA_ALIVE_CHK_STATE) {
DBG_88E("%s alive check-rx ps-poll\n", __func__);
psta->expire_to = pstapriv->expire_to;
psta->state ^= WIFI_STA_ALIVE_CHK_STATE;
}
@@ -905,15 +888,11 @@ static int validate_recv_ctrl_frame(struct adapter *padapter,
}
} else {
if (pstapriv->tim_bitmap & BIT(psta->aid)) {
if (psta->sleepq_len == 0) {
DBG_88E("no buffered packets to xmit\n");
if (psta->sleepq_len == 0)
/* issue nulldata with More data bit = 0 to indicate we have no buffered packets */
issue_nulldata(padapter, psta->hwaddr, 0, 0, 0);
} else {
DBG_88E("error!psta->sleepq_len=%d\n", psta->sleepq_len);
else
psta->sleepq_len = 0;
}
pstapriv->tim_bitmap &= ~BIT(psta->aid);
@@ -1034,7 +1013,7 @@ static int validate_recv_data_frame(struct adapter *adapter,
pattrib->amsdu = 0;
pattrib->ack_policy = 0;
/* parsing QC field */
if (pattrib->qos == 1) {
if (pattrib->qos) {
pattrib->priority = GetPriority((ptr + 24));
pattrib->ack_policy = GetAckpolicy((ptr + 24));
pattrib->amsdu = GetAMsdu((ptr + 24));
@@ -1079,12 +1058,11 @@ static int validate_recv_frame(struct adapter *adapter, struct recv_frame *precv
/* then call check if rx seq/frag. duplicated. */
u8 type;
u8 subtype;
int retval = _SUCCESS;
int retval = _FAIL;
u8 bDumpRxPkt;
struct rx_pkt_attrib *pattrib = &precv_frame->attrib;
u8 *ptr = precv_frame->rx_data;
__le16 fc = *(__le16 *)ptr;
u8 ver = (unsigned char)(*ptr) & 0x3;
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
@@ -1095,13 +1073,8 @@ static int validate_recv_frame(struct adapter *adapter, struct recv_frame *precv
}
/* add version chk */
if (ver != 0) {
retval = _FAIL;
goto exit;
}
type = GetFrameType(ptr);
subtype = GetFrameSubType(ptr); /* bit(7)~bit(2) */
if (ver != 0)
return _FAIL;
pattrib->to_fr_ds = get_tofr_ds(ptr);
@@ -1109,67 +1082,29 @@ static int validate_recv_frame(struct adapter *adapter, struct recv_frame *precv
pattrib->seq_num = GetSequence(ptr);
pattrib->pw_save = GetPwrMgt(ptr);
pattrib->mfrag = GetMFrag(ptr);
pattrib->mdata = GetMData(ptr);
pattrib->privacy = GetPrivacy(ptr);
pattrib->order = GetOrder(ptr);
pattrib->mfrag = ieee80211_has_morefrags(fc);
pattrib->mdata = ieee80211_has_moredata(fc);
pattrib->privacy = ieee80211_has_protected(fc);
pattrib->order = ieee80211_has_order(fc);
/* Dump rx packets */
GetHalDefVar8188EUsb(adapter, HAL_DEF_DBG_DUMP_RXPKT, &bDumpRxPkt);
if (bDumpRxPkt == 1) {/* dump all rx packets */
int i;
DBG_88E("#############################\n");
for (i = 0; i < 64; i = i + 8)
DBG_88E("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr + i),
*(ptr + i + 1), *(ptr + i + 2), *(ptr + i + 3), *(ptr + i + 4), *(ptr + i + 5), *(ptr + i + 6), *(ptr + i + 7));
DBG_88E("#############################\n");
} else if (bDumpRxPkt == 2) {
if (type == WIFI_MGT_TYPE) {
int i;
DBG_88E("#############################\n");
for (i = 0; i < 64; i = i + 8)
DBG_88E("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr + i),
*(ptr + i + 1), *(ptr + i + 2), *(ptr + i + 3), *(ptr + i + 4), *(ptr + i + 5), *(ptr + i + 6), *(ptr + i + 7));
DBG_88E("#############################\n");
}
} else if (bDumpRxPkt == 3) {
if (type == WIFI_DATA_TYPE) {
int i;
DBG_88E("#############################\n");
for (i = 0; i < 64; i = i + 8)
DBG_88E("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr + i),
*(ptr + i + 1), *(ptr + i + 2), *(ptr + i + 3), *(ptr + i + 4), *(ptr + i + 5), *(ptr + i + 6), *(ptr + i + 7));
DBG_88E("#############################\n");
}
}
switch (type) {
case WIFI_MGT_TYPE: /* mgnt */
/* We return _SUCCESS only for data frames. */
if (ieee80211_is_mgmt(fc))
validate_recv_mgnt_frame(adapter, precv_frame);
retval = _FAIL; /* only data frame return _SUCCESS */
break;
case WIFI_CTRL_TYPE: /* ctrl */
else if (ieee80211_is_ctl(fc))
validate_recv_ctrl_frame(adapter, precv_frame);
retval = _FAIL; /* only data frame return _SUCCESS */
break;
case WIFI_DATA_TYPE: /* data */
else if (ieee80211_is_data(fc)) {
rtw_led_control(adapter, LED_CTL_RX);
pattrib->qos = (subtype & BIT(7)) ? 1 : 0;
pattrib->qos = ieee80211_is_data_qos(fc);
retval = validate_recv_data_frame(adapter, precv_frame);
if (retval == _FAIL) {
struct recv_priv *precvpriv = &adapter->recvpriv;
precvpriv->rx_drop++;
}
break;
default:
retval = _FAIL;
break;
}
exit:
return retval;
}
@@ -1188,7 +1123,7 @@ static int wlanhdr_to_ethhdr(struct recv_frame *precvframe)
struct adapter *adapter = precvframe->adapter;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
u8 *ptr = get_recvframe_data(precvframe); /* point to frame_ctrl field */
u8 *ptr = precvframe->rx_data; /* point to frame_ctrl field */
struct rx_pkt_attrib *pattrib = &precvframe->attrib;
if (pattrib->encrypt)
@@ -1223,10 +1158,14 @@ static int wlanhdr_to_ethhdr(struct recv_frame *precvframe)
eth_type = 0x8712;
/* append rx status for mp test packets */
ptr = recvframe_pull(precvframe, (rmv_len - sizeof(struct ethhdr) + 2) - 24);
if (!ptr)
return _FAIL;
memcpy(ptr, get_rxmem(precvframe), 24);
ptr += 24;
} else {
ptr = recvframe_pull(precvframe, (rmv_len - sizeof(struct ethhdr) + (bsnaphdr ? 2 : 0)));
if (!ptr)
return _FAIL;
}
memcpy(ptr, pattrib->dst, ETH_ALEN);
@@ -1444,10 +1383,8 @@ static int amsdu_to_msdu(struct adapter *padapter, struct recv_frame *prframe)
/* Offset 12 denote 2 mac address */
nSubframe_Length = RTW_GET_BE16(pdata + 12);
if (a_len < ETH_HLEN + nSubframe_Length) {
DBG_88E("nRemain_Length is %d and nSubframe_Length is : %d\n", a_len, nSubframe_Length);
if (a_len < ETH_HLEN + nSubframe_Length)
goto exit;
}
/* move the data point to data content */
pdata += ETH_HLEN;
@@ -1466,17 +1403,14 @@ static int amsdu_to_msdu(struct adapter *padapter, struct recv_frame *prframe)
sub_skb->len = nSubframe_Length;
skb_set_tail_pointer(sub_skb, nSubframe_Length);
} else {
DBG_88E("skb_clone() Fail!!! , nr_subframes=%d\n", nr_subframes);
break;
}
}
subframes[nr_subframes++] = sub_skb;
if (nr_subframes >= MAX_SUBFRAME_COUNT) {
DBG_88E("ParseSubframe(): Too many Subframes! Packets dropped!\n");
if (nr_subframes >= MAX_SUBFRAME_COUNT)
break;
}
pdata += nSubframe_Length;
a_len -= nSubframe_Length;
@@ -1533,7 +1467,7 @@ exit:
return ret;
}
static int check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_num)
static bool check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_num)
{
u8 wsize = preorder_ctrl->wsize_b;
u16 wend = (preorder_ctrl->indicate_seq + wsize - 1) & 0xFFF;/* 4096; */
@@ -1563,8 +1497,7 @@ static int check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_n
return true;
}
int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, struct recv_frame *prframe);
int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, struct recv_frame *prframe)
static bool enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, struct recv_frame *prframe)
{
struct rx_pkt_attrib *pattrib = &prframe->attrib;
struct __queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
@@ -1593,7 +1526,7 @@ int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, struct re
return true;
}
static int recv_indicatepkts_in_order(struct adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced)
static bool recv_indicatepkts_in_order(struct adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced)
{
struct list_head *phead, *plist;
struct recv_frame *prframe;
@@ -1663,7 +1596,7 @@ static int recv_indicatepkt_reorder(struct adapter *padapter, struct recv_frame
/* s1. */
wlanhdr_to_ethhdr(prframe);
if (pattrib->qos != 1) {
if (!pattrib->qos) {
if (!padapter->bDriverStopped &&
!padapter->bSurpriseRemoved) {
rtw_recv_indicatepkt(padapter, prframe);
@@ -1851,13 +1784,9 @@ static int recv_func(struct adapter *padapter, struct recv_frame *rframe)
if (check_fwstate(mlmepriv, WIFI_STATION_STATE) &&
psecuritypriv->busetkipkey) {
struct recv_frame *pending_frame;
int cnt = 0;
pending_frame = rtw_alloc_recvframe(&padapter->recvpriv.uc_swdec_pending_queue);
while (pending_frame) {
cnt++;
while ((pending_frame = rtw_alloc_recvframe(&padapter->recvpriv.uc_swdec_pending_queue)))
recv_func_posthandle(padapter, pending_frame);
}
}
ret = recv_func_prehandle(padapter, rframe);
@@ -1870,7 +1799,6 @@ static int recv_func(struct adapter *padapter, struct recv_frame *rframe)
psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK &&
!psecuritypriv->busetkipkey) {
rtw_enqueue_recvframe(rframe, &padapter->recvpriv.uc_swdec_pending_queue);
DBG_88E("%s: no key, enqueue uc_swdec_pending_queue\n", __func__);
if (recvpriv->free_recvframe_cnt < NR_RECVFRAME / 4) {
/* to prevent from recvframe starvation,
* get recvframe from uc_swdec_pending_queue to

62
drivers/staging/r8188eu/core/rtw_rf.c
View File

@@ -1,55 +1,29 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTW_RF_C_
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/recv_osdep.h"
#include "../include/xmit_osdep.h"
struct ch_freq {
u32 channel;
u32 frequency;
static const u32 ch_freq_map[] = {
2412,
2417,
2422,
2427,
2432,
2437,
2442,
2447,
2452,
2457,
2462,
2467,
2472,
2484
};
static struct ch_freq ch_freq_map[] = {
{1, 2412}, {2, 2417}, {3, 2422}, {4, 2427}, {5, 2432},
{6, 2437}, {7, 2442}, {8, 2447}, {9, 2452}, {10, 2457},
{11, 2462}, {12, 2467}, {13, 2472}, {14, 2484},
/* UNII */
{36, 5180}, {40, 5200}, {44, 5220}, {48, 5240}, {52, 5260},
{56, 5280}, {60, 5300}, {64, 5320}, {149, 5745}, {153, 5765},
{157, 5785}, {161, 5805}, {165, 5825}, {167, 5835}, {169, 5845},
{171, 5855}, {173, 5865},
/* HiperLAN2 */
{100, 5500}, {104, 5520}, {108, 5540}, {112, 5560}, {116, 5580},
{120, 5600}, {124, 5620}, {128, 5640}, {132, 5660}, {136, 5680},
{140, 5700},
/* Japan MMAC */
{34, 5170}, {38, 5190}, {42, 5210}, {46, 5230},
/* Japan */
{184, 4920}, {188, 4940}, {192, 4960}, {196, 4980},
{208, 5040},/* Japan, means J08 */
{212, 5060},/* Japan, means J12 */
{216, 5080},/* Japan, means J16 */
};
static int ch_freq_map_num = ARRAY_SIZE(ch_freq_map);
u32 rtw_ch2freq(u32 channel)
{
u8 i;
u32 freq = 0;
if (channel == 0 || channel > ARRAY_SIZE(ch_freq_map))
return 2412;
for (i = 0; i < ch_freq_map_num; i++) {
if (channel == ch_freq_map[i].channel) {
freq = ch_freq_map[i].frequency;
break;
}
}
if (i == ch_freq_map_num)
freq = 2412;
return freq;
return ch_freq_map[channel - 1];
}

193
drivers/staging/r8188eu/core/rtw_security.c
View File

@@ -545,8 +545,6 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
if (is_multicast_ether_addr(prxattrib->ra)) {
if (!psecuritypriv->binstallGrpkey) {
res = _FAIL;
netdev_dbg(padapter->pnetdev,
"rx bc/mc packets, but didn't install group key!\n");
goto exit;
}
prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
@@ -1146,7 +1144,7 @@ u32 rtw_aes_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe)
return res;
}
static int aes_decipher(struct adapter *padapter, u8 *key, uint hdrlen,
static int aes_decipher(u8 *key, uint hdrlen,
u8 *pframe, uint plen)
{
static u8 message[MAX_MSG_SIZE];
@@ -1329,13 +1327,8 @@ static int aes_decipher(struct adapter *padapter, u8 *key, uint hdrlen,
/* compare the mic */
for (i = 0; i < 8; i++) {
if (pframe[hdrlen + 8 + plen - 8 + i] != message[hdrlen + 8 + plen - 8 + i]) {
netdev_dbg(padapter->pnetdev,
"mic check error mic[%d]: pframe(%x)!=message(%x)\n",
i, pframe[hdrlen + 8 + plen - 8 + i],
message[hdrlen + 8 + plen - 8 + i]);
if (pframe[hdrlen + 8 + plen - 8 + i] != message[hdrlen + 8 + plen - 8 + i])
res = _FAIL;
}
}
return res;
@@ -1361,16 +1354,10 @@ u32 rtw_aes_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
/* in concurrent we should use sw descrypt in group key, so we remove this message */
if (!psecuritypriv->binstallGrpkey) {
res = _FAIL;
netdev_dbg(padapter->pnetdev,
"rx bc/mc packets, but didn't install group key!\n");
goto exit;
}
prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
if (psecuritypriv->dot118021XGrpKeyid != prxattrib->key_index) {
netdev_dbg(padapter->pnetdev,
"not match packet_index=%d, install_index=%d\n",
prxattrib->key_index,
psecuritypriv->dot118021XGrpKeyid);
res = _FAIL;
goto exit;
}
@@ -1378,7 +1365,7 @@ u32 rtw_aes_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
prwskey = &stainfo->dot118021x_UncstKey.skey[0];
}
length = precvframe->len - prxattrib->hdrlen - prxattrib->iv_len;
res = aes_decipher(padapter, prwskey, prxattrib->hdrlen, pframe, length);
res = aes_decipher(prwskey, prxattrib->hdrlen, pframe, length);
} else {
res = _FAIL;
}
@@ -1387,177 +1374,3 @@ u32 rtw_aes_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
exit:
return res;
}
/* AES tables*/
const u32 Te0[256] = {
0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU,
0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U,
0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU,
0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU,
0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U,
0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU,
0x41adadecU, 0xb3d4d467U, 0x5fa2a2fdU, 0x45afafeaU,
0x239c9cbfU, 0x53a4a4f7U, 0xe4727296U, 0x9bc0c05bU,
0x75b7b7c2U, 0xe1fdfd1cU, 0x3d9393aeU, 0x4c26266aU,
0x6c36365aU, 0x7e3f3f41U, 0xf5f7f702U, 0x83cccc4fU,
0x6834345cU, 0x51a5a5f4U, 0xd1e5e534U, 0xf9f1f108U,
0xe2717193U, 0xabd8d873U, 0x62313153U, 0x2a15153fU,
0x0804040cU, 0x95c7c752U, 0x46232365U, 0x9dc3c35eU,
0x30181828U, 0x379696a1U, 0x0a05050fU, 0x2f9a9ab5U,
0x0e070709U, 0x24121236U, 0x1b80809bU, 0xdfe2e23dU,
0xcdebeb26U, 0x4e272769U, 0x7fb2b2cdU, 0xea75759fU,
0x1209091bU, 0x1d83839eU, 0x582c2c74U, 0x341a1a2eU,
0x361b1b2dU, 0xdc6e6eb2U, 0xb45a5aeeU, 0x5ba0a0fbU,
0xa45252f6U, 0x763b3b4dU, 0xb7d6d661U, 0x7db3b3ceU,
0x5229297bU, 0xdde3e33eU, 0x5e2f2f71U, 0x13848497U,
0xa65353f5U, 0xb9d1d168U, 0x00000000U, 0xc1eded2cU,
0x40202060U, 0xe3fcfc1fU, 0x79b1b1c8U, 0xb65b5bedU,
0xd46a6abeU, 0x8dcbcb46U, 0x67bebed9U, 0x7239394bU,
0x944a4adeU, 0x984c4cd4U, 0xb05858e8U, 0x85cfcf4aU,
0xbbd0d06bU, 0xc5efef2aU, 0x4faaaae5U, 0xedfbfb16U,
0x864343c5U, 0x9a4d4dd7U, 0x66333355U, 0x11858594U,
0x8a4545cfU, 0xe9f9f910U, 0x04020206U, 0xfe7f7f81U,
0xa05050f0U, 0x783c3c44U, 0x259f9fbaU, 0x4ba8a8e3U,
0xa25151f3U, 0x5da3a3feU, 0x804040c0U, 0x058f8f8aU,
0x3f9292adU, 0x219d9dbcU, 0x70383848U, 0xf1f5f504U,
0x63bcbcdfU, 0x77b6b6c1U, 0xafdada75U, 0x42212163U,
0x20101030U, 0xe5ffff1aU, 0xfdf3f30eU, 0xbfd2d26dU,
0x81cdcd4cU, 0x180c0c14U, 0x26131335U, 0xc3ecec2fU,
0xbe5f5fe1U, 0x359797a2U, 0x884444ccU, 0x2e171739U,
0x93c4c457U, 0x55a7a7f2U, 0xfc7e7e82U, 0x7a3d3d47U,
0xc86464acU, 0xba5d5de7U, 0x3219192bU, 0xe6737395U,
0xc06060a0U, 0x19818198U, 0x9e4f4fd1U, 0xa3dcdc7fU,
0x44222266U, 0x542a2a7eU, 0x3b9090abU, 0x0b888883U,
0x8c4646caU, 0xc7eeee29U, 0x6bb8b8d3U, 0x2814143cU,
0xa7dede79U, 0xbc5e5ee2U, 0x160b0b1dU, 0xaddbdb76U,
0xdbe0e03bU, 0x64323256U, 0x743a3a4eU, 0x140a0a1eU,
0x924949dbU, 0x0c06060aU, 0x4824246cU, 0xb85c5ce4U,
0x9fc2c25dU, 0xbdd3d36eU, 0x43acacefU, 0xc46262a6U,
0x399191a8U, 0x319595a4U, 0xd3e4e437U, 0xf279798bU,
0xd5e7e732U, 0x8bc8c843U, 0x6e373759U, 0xda6d6db7U,
0x018d8d8cU, 0xb1d5d564U, 0x9c4e4ed2U, 0x49a9a9e0U,
0xd86c6cb4U, 0xac5656faU, 0xf3f4f407U, 0xcfeaea25U,
0xca6565afU, 0xf47a7a8eU, 0x47aeaee9U, 0x10080818U,
0x6fbabad5U, 0xf0787888U, 0x4a25256fU, 0x5c2e2e72U,
0x381c1c24U, 0x57a6a6f1U, 0x73b4b4c7U, 0x97c6c651U,
0xcbe8e823U, 0xa1dddd7cU, 0xe874749cU, 0x3e1f1f21U,
0x964b4bddU, 0x61bdbddcU, 0x0d8b8b86U, 0x0f8a8a85U,
0xe0707090U, 0x7c3e3e42U, 0x71b5b5c4U, 0xcc6666aaU,
0x904848d8U, 0x06030305U, 0xf7f6f601U, 0x1c0e0e12U,
0xc26161a3U, 0x6a35355fU, 0xae5757f9U, 0x69b9b9d0U,
0x17868691U, 0x99c1c158U, 0x3a1d1d27U, 0x279e9eb9U,
0xd9e1e138U, 0xebf8f813U, 0x2b9898b3U, 0x22111133U,
0xd26969bbU, 0xa9d9d970U, 0x078e8e89U, 0x339494a7U,
0x2d9b9bb6U, 0x3c1e1e22U, 0x15878792U, 0xc9e9e920U,
0x87cece49U, 0xaa5555ffU, 0x50282878U, 0xa5dfdf7aU,
0x038c8c8fU, 0x59a1a1f8U, 0x09898980U, 0x1a0d0d17U,
0x65bfbfdaU, 0xd7e6e631U, 0x844242c6U, 0xd06868b8U,
0x824141c3U, 0x299999b0U, 0x5a2d2d77U, 0x1e0f0f11U,
0x7bb0b0cbU, 0xa85454fcU, 0x6dbbbbd6U, 0x2c16163aU,
};
const u32 Td0[256] = {
0x51f4a750U, 0x7e416553U, 0x1a17a4c3U, 0x3a275e96U,
0x3bab6bcbU, 0x1f9d45f1U, 0xacfa58abU, 0x4be30393U,
0x2030fa55U, 0xad766df6U, 0x88cc7691U, 0xf5024c25U,
0x4fe5d7fcU, 0xc52acbd7U, 0x26354480U, 0xb562a38fU,
0xdeb15a49U, 0x25ba1b67U, 0x45ea0e98U, 0x5dfec0e1U,
0xc32f7502U, 0x814cf012U, 0x8d4697a3U, 0x6bd3f9c6U,
0x038f5fe7U, 0x15929c95U, 0xbf6d7aebU, 0x955259daU,
0xd4be832dU, 0x587421d3U, 0x49e06929U, 0x8ec9c844U,
0x75c2896aU, 0xf48e7978U, 0x99583e6bU, 0x27b971ddU,
0xbee14fb6U, 0xf088ad17U, 0xc920ac66U, 0x7dce3ab4U,
0x63df4a18U, 0xe51a3182U, 0x97513360U, 0x62537f45U,
0xb16477e0U, 0xbb6bae84U, 0xfe81a01cU, 0xf9082b94U,
0x70486858U, 0x8f45fd19U, 0x94de6c87U, 0x527bf8b7U,
0xab73d323U, 0x724b02e2U, 0xe31f8f57U, 0x6655ab2aU,
0xb2eb2807U, 0x2fb5c203U, 0x86c57b9aU, 0xd33708a5U,
0x302887f2U, 0x23bfa5b2U, 0x02036abaU, 0xed16825cU,
0x8acf1c2bU, 0xa779b492U, 0xf307f2f0U, 0x4e69e2a1U,
0x65daf4cdU, 0x0605bed5U, 0xd134621fU, 0xc4a6fe8aU,
0x342e539dU, 0xa2f355a0U, 0x058ae132U, 0xa4f6eb75U,
0x0b83ec39U, 0x4060efaaU, 0x5e719f06U, 0xbd6e1051U,
0x3e218af9U, 0x96dd063dU, 0xdd3e05aeU, 0x4de6bd46U,
0x91548db5U, 0x71c45d05U, 0x0406d46fU, 0x605015ffU,
0x1998fb24U, 0xd6bde997U, 0x894043ccU, 0x67d99e77U,
0xb0e842bdU, 0x07898b88U, 0xe7195b38U, 0x79c8eedbU,
0xa17c0a47U, 0x7c420fe9U, 0xf8841ec9U, 0x00000000U,
0x09808683U, 0x322bed48U, 0x1e1170acU, 0x6c5a724eU,
0xfd0efffbU, 0x0f853856U, 0x3daed51eU, 0x362d3927U,
0x0a0fd964U, 0x685ca621U, 0x9b5b54d1U, 0x24362e3aU,
0x0c0a67b1U, 0x9357e70fU, 0xb4ee96d2U, 0x1b9b919eU,
0x80c0c54fU, 0x61dc20a2U, 0x5a774b69U, 0x1c121a16U,
0xe293ba0aU, 0xc0a02ae5U, 0x3c22e043U, 0x121b171dU,
0x0e090d0bU, 0xf28bc7adU, 0x2db6a8b9U, 0x141ea9c8U,
0x57f11985U, 0xaf75074cU, 0xee99ddbbU, 0xa37f60fdU,
0xf701269fU, 0x5c72f5bcU, 0x44663bc5U, 0x5bfb7e34U,
0x8b432976U, 0xcb23c6dcU, 0xb6edfc68U, 0xb8e4f163U,
0xd731dccaU, 0x42638510U, 0x13972240U, 0x84c61120U,
0x854a247dU, 0xd2bb3df8U, 0xaef93211U, 0xc729a16dU,
0x1d9e2f4bU, 0xdcb230f3U, 0x0d8652ecU, 0x77c1e3d0U,
0x2bb3166cU, 0xa970b999U, 0x119448faU, 0x47e96422U,
0xa8fc8cc4U, 0xa0f03f1aU, 0x567d2cd8U, 0x223390efU,
0x87494ec7U, 0xd938d1c1U, 0x8ccaa2feU, 0x98d40b36U,
0xa6f581cfU, 0xa57ade28U, 0xdab78e26U, 0x3fadbfa4U,
0x2c3a9de4U, 0x5078920dU, 0x6a5fcc9bU, 0x547e4662U,
0xf68d13c2U, 0x90d8b8e8U, 0x2e39f75eU, 0x82c3aff5U,
0x9f5d80beU, 0x69d0937cU, 0x6fd52da9U, 0xcf2512b3U,
0xc8ac993bU, 0x10187da7U, 0xe89c636eU, 0xdb3bbb7bU,
0xcd267809U, 0x6e5918f4U, 0xec9ab701U, 0x834f9aa8U,
0xe6956e65U, 0xaaffe67eU, 0x21bccf08U, 0xef15e8e6U,
0xbae79bd9U, 0x4a6f36ceU, 0xea9f09d4U, 0x29b07cd6U,
0x31a4b2afU, 0x2a3f2331U, 0xc6a59430U, 0x35a266c0U,
0x744ebc37U, 0xfc82caa6U, 0xe090d0b0U, 0x33a7d815U,
0xf104984aU, 0x41ecdaf7U, 0x7fcd500eU, 0x1791f62fU,
0x764dd68dU, 0x43efb04dU, 0xccaa4d54U, 0xe49604dfU,
0x9ed1b5e3U, 0x4c6a881bU, 0xc12c1fb8U, 0x4665517fU,
0x9d5eea04U, 0x018c355dU, 0xfa877473U, 0xfb0b412eU,
0xb3671d5aU, 0x92dbd252U, 0xe9105633U, 0x6dd64713U,
0x9ad7618cU, 0x37a10c7aU, 0x59f8148eU, 0xeb133c89U,
0xcea927eeU, 0xb761c935U, 0xe11ce5edU, 0x7a47b13cU,
0x9cd2df59U, 0x55f2733fU, 0x1814ce79U, 0x73c737bfU,
0x53f7cdeaU, 0x5ffdaa5bU, 0xdf3d6f14U, 0x7844db86U,
0xcaaff381U, 0xb968c43eU, 0x3824342cU, 0xc2a3405fU,
0x161dc372U, 0xbce2250cU, 0x283c498bU, 0xff0d9541U,
0x39a80171U, 0x080cb3deU, 0xd8b4e49cU, 0x6456c190U,
0x7bcb8461U, 0xd532b670U, 0x486c5c74U, 0xd0b85742U,
};
const u8 Td4s[256] = {
0x52U, 0x09U, 0x6aU, 0xd5U, 0x30U, 0x36U, 0xa5U, 0x38U,
0xbfU, 0x40U, 0xa3U, 0x9eU, 0x81U, 0xf3U, 0xd7U, 0xfbU,
0x7cU, 0xe3U, 0x39U, 0x82U, 0x9bU, 0x2fU, 0xffU, 0x87U,
0x34U, 0x8eU, 0x43U, 0x44U, 0xc4U, 0xdeU, 0xe9U, 0xcbU,
0x54U, 0x7bU, 0x94U, 0x32U, 0xa6U, 0xc2U, 0x23U, 0x3dU,
0xeeU, 0x4cU, 0x95U, 0x0bU, 0x42U, 0xfaU, 0xc3U, 0x4eU,
0x08U, 0x2eU, 0xa1U, 0x66U, 0x28U, 0xd9U, 0x24U, 0xb2U,
0x76U, 0x5bU, 0xa2U, 0x49U, 0x6dU, 0x8bU, 0xd1U, 0x25U,
0x72U, 0xf8U, 0xf6U, 0x64U, 0x86U, 0x68U, 0x98U, 0x16U,
0xd4U, 0xa4U, 0x5cU, 0xccU, 0x5dU, 0x65U, 0xb6U, 0x92U,
0x6cU, 0x70U, 0x48U, 0x50U, 0xfdU, 0xedU, 0xb9U, 0xdaU,
0x5eU, 0x15U, 0x46U, 0x57U, 0xa7U, 0x8dU, 0x9dU, 0x84U,
0x90U, 0xd8U, 0xabU, 0x00U, 0x8cU, 0xbcU, 0xd3U, 0x0aU,
0xf7U, 0xe4U, 0x58U, 0x05U, 0xb8U, 0xb3U, 0x45U, 0x06U,
0xd0U, 0x2cU, 0x1eU, 0x8fU, 0xcaU, 0x3fU, 0x0fU, 0x02U,
0xc1U, 0xafU, 0xbdU, 0x03U, 0x01U, 0x13U, 0x8aU, 0x6bU,
0x3aU, 0x91U, 0x11U, 0x41U, 0x4fU, 0x67U, 0xdcU, 0xeaU,
0x97U, 0xf2U, 0xcfU, 0xceU, 0xf0U, 0xb4U, 0xe6U, 0x73U,
0x96U, 0xacU, 0x74U, 0x22U, 0xe7U, 0xadU, 0x35U, 0x85U,
0xe2U, 0xf9U, 0x37U, 0xe8U, 0x1cU, 0x75U, 0xdfU, 0x6eU,
0x47U, 0xf1U, 0x1aU, 0x71U, 0x1dU, 0x29U, 0xc5U, 0x89U,
0x6fU, 0xb7U, 0x62U, 0x0eU, 0xaaU, 0x18U, 0xbeU, 0x1bU,
0xfcU, 0x56U, 0x3eU, 0x4bU, 0xc6U, 0xd2U, 0x79U, 0x20U,
0x9aU, 0xdbU, 0xc0U, 0xfeU, 0x78U, 0xcdU, 0x5aU, 0xf4U,
0x1fU, 0xddU, 0xa8U, 0x33U, 0x88U, 0x07U, 0xc7U, 0x31U,
0xb1U, 0x12U, 0x10U, 0x59U, 0x27U, 0x80U, 0xecU, 0x5fU,
0x60U, 0x51U, 0x7fU, 0xa9U, 0x19U, 0xb5U, 0x4aU, 0x0dU,
0x2dU, 0xe5U, 0x7aU, 0x9fU, 0x93U, 0xc9U, 0x9cU, 0xefU,
0xa0U, 0xe0U, 0x3bU, 0x4dU, 0xaeU, 0x2aU, 0xf5U, 0xb0U,
0xc8U, 0xebU, 0xbbU, 0x3cU, 0x83U, 0x53U, 0x99U, 0x61U,
0x17U, 0x2bU, 0x04U, 0x7eU, 0xbaU, 0x77U, 0xd6U, 0x26U,
0xe1U, 0x69U, 0x14U, 0x63U, 0x55U, 0x21U, 0x0cU, 0x7dU,
};
const u8 rcons[] = {
0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1B, 0x36
/* for 128-bit blocks, Rijndael never uses more than 10 rcon values */
};

14
drivers/staging/r8188eu/core/rtw_sta_mgt.c
View File

@@ -101,23 +101,15 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
inline int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta)
{
int offset = (((u8 *)sta) - stapriv->pstainfo_buf) / sizeof(struct sta_info);
if (!stainfo_offset_valid(offset))
DBG_88E("%s invalid offset(%d), out of range!!!", __func__, offset);
return offset;
return (((u8 *)sta) - stapriv->pstainfo_buf) / sizeof(struct sta_info);
}
inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset)
{
if (!stainfo_offset_valid(offset))
DBG_88E("%s invalid offset(%d), out of range!!!", __func__, offset);
return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info));
}
u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
void _rtw_free_sta_priv(struct sta_priv *pstapriv)
{
struct list_head *phead, *plist;
struct sta_info *psta = NULL;
@@ -147,8 +139,6 @@ u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
vfree(pstapriv->pallocated_stainfo_buf);
}
return _SUCCESS;
}
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)

129
drivers/staging/r8188eu/core/rtw_wlan_util.c
View File

@@ -45,7 +45,7 @@ static u8 rtw_basic_rate_mix[7] = {
IEEE80211_OFDM_RATE_24MB | IEEE80211_BASIC_RATE_MASK
};
int cckrates_included(unsigned char *rate, int ratelen)
bool cckrates_included(unsigned char *rate, int ratelen)
{
int i;
@@ -57,7 +57,7 @@ int cckrates_included(unsigned char *rate, int ratelen)
return false;
}
int cckratesonly_included(unsigned char *rate, int ratelen)
bool cckratesonly_included(unsigned char *rate, int ratelen)
{
int i;
@@ -167,7 +167,7 @@ static unsigned char ratetbl_val_2wifirate(unsigned char rate)
return val;
}
static int is_basicrate(struct adapter *padapter, unsigned char rate)
static bool is_basicrate(struct adapter *padapter, unsigned char rate)
{
int i;
unsigned char val;
@@ -284,14 +284,13 @@ void Switch_DM_Func(struct adapter *padapter, u32 mode, u8 enable)
SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_CLR, (u8 *)(&mode));
}
static void Set_NETYPE0_MSR(struct adapter *padapter, u8 type)
{
SetHwReg8188EU(padapter, HW_VAR_MEDIA_STATUS, (u8 *)(&type));
}
void Set_MSR(struct adapter *padapter, u8 type)
{
Set_NETYPE0_MSR(padapter, type);
u8 val8;
val8 = rtw_read8(padapter, MSR) & 0x0c;
val8 |= type;
rtw_write8(padapter, MSR, val8);
}
inline u8 rtw_get_oper_ch(struct adapter *adapter)
@@ -335,9 +334,6 @@ void set_channel_bwmode(struct adapter *padapter, unsigned char channel, unsigne
{
u8 center_ch;
if (padapter->bNotifyChannelChange)
DBG_88E("[%s] ch = %d, offset = %d, bwmode = %d\n", __func__, channel, channel_offset, bwmode);
if ((bwmode == HT_CHANNEL_WIDTH_20) ||
(channel_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)) {
/* SelectChannel(padapter, channel); */
@@ -429,7 +425,7 @@ unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval)
void invalidate_cam_all(struct adapter *padapter)
{
SetHwReg8188EU(padapter, HW_VAR_CAM_INVALID_ALL, NULL);
rtw_write32(padapter, RWCAM, BIT(31) | BIT(30));
}
void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key)
@@ -457,7 +453,8 @@ void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key)
cam_val[0] = val;
cam_val[1] = addr + (unsigned int)j;
SetHwReg8188EU(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val);
rtw_write32(padapter, WCAMI, cam_val[0]);
rtw_write32(padapter, RWCAM, CAM_POLLINIG | CAM_WRITE | cam_val[1]);
}
}
@@ -492,7 +489,7 @@ void flush_all_cam_entry(struct adapter *padapter)
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
SetHwReg8188EU(padapter, HW_VAR_CAM_INVALID_ALL, NULL);
rtw_write32(padapter, RWCAM, BIT(31) | BIT(30));
memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info));
}
@@ -558,22 +555,20 @@ void WMMOnAssocRsp(struct adapter *padapter)
edca[XMIT_BE_QUEUE] = acParm;
break;
case 0x1:
SetHwReg8188EU(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm));
rtw_write32(padapter, REG_EDCA_BK_PARAM, acParm);
edca[XMIT_BK_QUEUE] = acParm;
break;
case 0x2:
SetHwReg8188EU(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm));
rtw_write32(padapter, REG_EDCA_VI_PARAM, acParm);
acm_mask |= (ACM ? BIT(2) : 0);
edca[XMIT_VI_QUEUE] = acParm;
break;
case 0x3:
SetHwReg8188EU(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm));
rtw_write32(padapter, REG_EDCA_VO_PARAM, acParm);
acm_mask |= (ACM ? BIT(3) : 0);
edca[XMIT_VO_QUEUE] = acParm;
break;
}
DBG_88E("WMM(%x): %x, %x\n", ACI, ACM, acParm);
}
if (padapter->registrypriv.acm_method == 1)
@@ -608,10 +603,8 @@ void WMMOnAssocRsp(struct adapter *padapter)
}
}
for (i = 0; i < 4; i++) {
for (i = 0; i < 4; i++)
pxmitpriv->wmm_para_seq[i] = inx[i];
DBG_88E("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]);
}
}
static void bwmode_update_check(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
@@ -758,8 +751,6 @@ void HTOnAssocRsp(struct adapter *padapter)
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
DBG_88E("%s\n", __func__);
if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) {
pmlmeinfo->HT_enable = 1;
} else {
@@ -857,16 +848,11 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
len = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr);
if (len > MAX_IE_SZ) {
DBG_88E("%s IE too long for survey event\n", __func__);
if (len > MAX_IE_SZ)
return _FAIL;
}
if (memcmp(cur_network->network.MacAddress, pbssid, 6)) {
DBG_88E("Oops: rtw_check_network_encrypt linked but recv other bssid bcn\n%pM %pM\n",
(pbssid), (cur_network->network.MacAddress));
if (memcmp(cur_network->network.MacAddress, pbssid, 6))
return true;
}
bssid = kzalloc(sizeof(struct wlan_bssid_ex), GFP_ATOMIC);
if (!bssid)
@@ -902,11 +888,6 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
}
if (ht_cap_info != cur_network->BcnInfo.ht_cap_info ||
((ht_info_infos_0 & 0x03) != (cur_network->BcnInfo.ht_info_infos_0 & 0x03))) {
DBG_88E("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n", __func__,
ht_cap_info, ht_info_infos_0);
DBG_88E("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__,
cur_network->BcnInfo.ht_cap_info, cur_network->BcnInfo.ht_info_infos_0);
DBG_88E("%s bw mode change, disconnect\n", __func__);
/* bcn_info_update */
cur_network->BcnInfo.ht_cap_info = ht_cap_info;
cur_network->BcnInfo.ht_info_infos_0 = ht_info_infos_0;
@@ -920,27 +901,20 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
bcn_channel = *(p + 2);
} else {/* In 5G, some ap do not have DSSET IE checking HT info for channel */
p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
if (pht_info) {
bcn_channel = pht_info->primary_channel;
} else { /* we don't find channel IE, so don't check it */
DBG_88E("Oops: %s we don't find channel IE, so don't check it\n", __func__);
bcn_channel = Adapter->mlmeextpriv.cur_channel;
}
}
if (bcn_channel != Adapter->mlmeextpriv.cur_channel) {
DBG_88E("%s beacon channel:%d cur channel:%d disconnect\n", __func__,
bcn_channel, Adapter->mlmeextpriv.cur_channel);
goto _mismatch;
if (pht_info)
bcn_channel = pht_info->primary_channel;
else /* we don't find channel IE, so don't check it */
bcn_channel = Adapter->mlmeextpriv.cur_channel;
}
if (bcn_channel != Adapter->mlmeextpriv.cur_channel)
goto _mismatch;
/* checking SSID */
p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SSID_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
if (!p) {
DBG_88E("%s marc: cannot find SSID for survey event\n", __func__);
if (!p)
hidden_ssid = true;
} else {
else
hidden_ssid = false;
}
if ((NULL != p) && (false == hidden_ssid && (*(p + 1)))) {
memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1));
@@ -952,10 +926,9 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
if (memcmp(bssid->Ssid.Ssid, cur_network->network.Ssid.Ssid, 32) ||
bssid->Ssid.SsidLength != cur_network->network.Ssid.SsidLength) {
if (bssid->Ssid.Ssid[0] != '\0' && bssid->Ssid.SsidLength != 0) { /* not hidden ssid */
DBG_88E("%s(), SSID is not match return FAIL\n", __func__);
/* not hidden ssid */
if (bssid->Ssid.Ssid[0] != '\0' && bssid->Ssid.SsidLength != 0)
goto _mismatch;
}
}
/* check encryption info */
@@ -966,10 +939,8 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
else
bssid->Privacy = 0;
if (cur_network->network.Privacy != bssid->Privacy) {
DBG_88E("%s(), privacy is not match return FAIL\n", __func__);
if (cur_network->network.Privacy != bssid->Privacy)
goto _mismatch;
}
rtw_get_sec_ie(bssid->IEs, bssid->IELength, NULL, &rsn_len, NULL, &wpa_len);
@@ -982,10 +953,8 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
encryp_protocol = ENCRYP_PROTOCOL_WEP;
}
if (cur_network->BcnInfo.encryp_protocol != encryp_protocol) {
DBG_88E("%s(): enctyp is not match , return FAIL\n", __func__);
if (cur_network->BcnInfo.encryp_protocol != encryp_protocol)
goto _mismatch;
}
if (encryp_protocol == ENCRYP_PROTOCOL_WPA || encryp_protocol == ENCRYP_PROTOCOL_WPA2) {
pbuf = rtw_get_wpa_ie(&bssid->IEs[12], &wpa_ielen, bssid->IELength - 12);
@@ -998,17 +967,12 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
rtw_parse_wpa2_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is_8021x);
}
if (pairwise_cipher != cur_network->BcnInfo.pairwise_cipher || group_cipher != cur_network->BcnInfo.group_cipher) {
DBG_88E("%s pairwise_cipher(%x:%x) or group_cipher(%x:%x) is not match , return FAIL\n", __func__,
pairwise_cipher, cur_network->BcnInfo.pairwise_cipher,
group_cipher, cur_network->BcnInfo.group_cipher);
if (pairwise_cipher != cur_network->BcnInfo.pairwise_cipher ||
group_cipher != cur_network->BcnInfo.group_cipher)
goto _mismatch;
}
if (is_8021x != cur_network->BcnInfo.is_8021x) {
DBG_88E("%s authentication is not match , return FAIL\n", __func__);
if (is_8021x != cur_network->BcnInfo.is_8021x)
goto _mismatch;
}
}
kfree(bssid);
@@ -1049,7 +1013,7 @@ void update_beacon_info(struct adapter *padapter, u8 *pframe, uint pkt_len, stru
}
}
unsigned int is_ap_in_tkip(struct adapter *padapter)
bool is_ap_in_tkip(struct adapter *padapter)
{
u32 i;
struct ndis_802_11_var_ie *pIE;
@@ -1257,39 +1221,28 @@ unsigned char check_assoc_AP(u8 *pframe, uint len)
case _VENDOR_SPECIFIC_IE_:
if ((!memcmp(pIE->data, ARTHEROS_OUI1, 3)) ||
(!memcmp(pIE->data, ARTHEROS_OUI2, 3))) {
DBG_88E("link to Artheros AP\n");
return HT_IOT_PEER_ATHEROS;
} else if ((!memcmp(pIE->data, BROADCOM_OUI1, 3)) ||
(!memcmp(pIE->data, BROADCOM_OUI2, 3))) {
DBG_88E("link to Broadcom AP\n");
return HT_IOT_PEER_BROADCOM;
} else if (!memcmp(pIE->data, MARVELL_OUI, 3)) {
DBG_88E("link to Marvell AP\n");
return HT_IOT_PEER_MARVELL;
} else if (!memcmp(pIE->data, RALINK_OUI, 3)) {
if (!ralink_vendor_flag) {
ralink_vendor_flag = 1;
} else {
DBG_88E("link to Ralink AP\n");
return HT_IOT_PEER_RALINK;
}
} else if (!memcmp(pIE->data, CISCO_OUI, 3)) {
DBG_88E("link to Cisco AP\n");
return HT_IOT_PEER_CISCO;
} else if (!memcmp(pIE->data, REALTEK_OUI, 3)) {
DBG_88E("link to Realtek 96B\n");
return HT_IOT_PEER_REALTEK;
} else if (!memcmp(pIE->data, AIRGOCAP_OUI, 3)) {
DBG_88E("link to Airgo Cap\n");
return HT_IOT_PEER_AIRGO;
} else if (!memcmp(pIE->data, EPIGRAM_OUI, 3)) {
epigram_vendor_flag = 1;
if (ralink_vendor_flag) {
DBG_88E("link to Tenda W311R AP\n");
if (ralink_vendor_flag)
return HT_IOT_PEER_TENDA;
} else {
DBG_88E("Capture EPIGRAM_OUI\n");
}
} else {
break;
}
@@ -1301,16 +1254,12 @@ unsigned char check_assoc_AP(u8 *pframe, uint len)
i += (pIE->Length + 2);
}
if (ralink_vendor_flag && !epigram_vendor_flag) {
DBG_88E("link to Ralink AP\n");
if (ralink_vendor_flag && !epigram_vendor_flag)
return HT_IOT_PEER_RALINK;
} else if (ralink_vendor_flag && epigram_vendor_flag) {
DBG_88E("link to Tenda W311R AP\n");
else if (ralink_vendor_flag && epigram_vendor_flag)
return HT_IOT_PEER_TENDA;
} else {
DBG_88E("link to new AP\n");
else
return HT_IOT_PEER_UNKNOWN;
}
}
void update_IOT_info(struct adapter *padapter)
@@ -1518,13 +1467,11 @@ int rtw_handle_dualmac(struct adapter *adapter, bool init)
if (init) {
if (!pbuddy_padapter) {
pbuddy_padapter = adapter;
DBG_88E("%s(): pbuddy_padapter == NULL, Set pbuddy_padapter\n", __func__);
} else {
adapter->pbuddy_adapter = pbuddy_padapter;
pbuddy_padapter->pbuddy_adapter = adapter;
/* clear global value */
pbuddy_padapter = NULL;
DBG_88E("%s(): pbuddy_padapter exist, Exchange Information\n", __func__);
}
} else {
pbuddy_padapter = NULL;

99
drivers/staging/r8188eu/core/rtw_xmit.c
View File

@@ -133,9 +133,8 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
if (res == _FAIL) {
msleep(10);
res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, (MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ));
if (res == _FAIL) {
if (res == _FAIL)
goto exit;
}
}
pxmitbuf->flags = XMIT_VO_QUEUE;
@@ -372,7 +371,6 @@ u8 qos_acm(u8 acm_mask, u8 priority)
change_priority = 5;
break;
default:
DBG_88E("qos_acm(): invalid pattrib->priority: %d!!!\n", priority);
break;
}
@@ -460,8 +458,6 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p
}
}
}
} else if (0x888e == pattrib->ether_type) {
netdev_dbg(padapter->pnetdev, "send eapol packet\n");
}
if ((pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1))
@@ -489,7 +485,6 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p
if (psta) {
pattrib->mac_id = psta->mac_id;
/* DBG_88E("%s ==> mac_id(%d)\n", __func__, pattrib->mac_id); */
pattrib->psta = psta;
} else {
/* if we cannot get psta => drop the pkt */
@@ -711,15 +706,12 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr
struct sta_info *psta;
if (pattrib->psta) {
if (pattrib->psta)
psta = pattrib->psta;
} else {
if (is_multicast_ether_addr(pattrib->ra)) {
psta = rtw_get_bcmc_stainfo(padapter);
} else {
psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra);
}
}
else if (is_multicast_ether_addr(pattrib->ra))
psta = rtw_get_bcmc_stainfo(padapter);
else
psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra);
memset(hdr, 0, WLANHDR_OFFSET);
@@ -894,10 +886,8 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct
if (!psta)
return _FAIL;
if (!pxmitframe->buf_addr) {
DBG_88E("==> %s buf_addr == NULL\n", __func__);
if (!pxmitframe->buf_addr)
return _FAIL;
}
pbuf_start = pxmitframe->buf_addr;
@@ -906,7 +896,6 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct
mem_start = pbuf_start + hw_hdr_offset;
if (rtw_make_wlanhdr(padapter, mem_start, pattrib) == _FAIL) {
DBG_88E("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n");
res = _FAIL;
goto exit;
}
@@ -1003,7 +992,6 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct
}
if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) {
DBG_88E("xmitframe_addmic(padapter, pxmitframe) == _FAIL\n");
res = _FAIL;
goto exit;
}
@@ -1133,10 +1121,8 @@ struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv)
pxmitbuf->priv_data = NULL;
/* pxmitbuf->ext_tag = true; */
if (pxmitbuf->sctx) {
DBG_88E("%s pxmitbuf->sctx is not NULL\n", __func__);
if (pxmitbuf->sctx)
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC);
}
}
spin_unlock_irqrestore(&pfree_queue->lock, flags);
@@ -1171,8 +1157,6 @@ struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv)
struct __queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue;
unsigned long flags;
/* DBG_88E("+rtw_alloc_xmitbuf\n"); */
spin_lock_irqsave(&pfree_xmitbuf_queue->lock, flags);
if (list_empty(&pfree_xmitbuf_queue->queue)) {
@@ -1190,10 +1174,8 @@ struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv)
if (pxmitbuf) {
pxmitpriv->free_xmitbuf_cnt--;
pxmitbuf->priv_data = NULL;
if (pxmitbuf->sctx) {
DBG_88E("%s pxmitbuf->sctx is not NULL\n", __func__);
if (pxmitbuf->sctx)
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC);
}
}
spin_unlock_irqrestore(&pfree_xmitbuf_queue->lock, flags);
@@ -1208,10 +1190,8 @@ s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
if (!pxmitbuf)
return _FAIL;
if (pxmitbuf->sctx) {
DBG_88E("%s pxmitbuf->sctx is not NULL\n", __func__);
if (pxmitbuf->sctx)
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_FREE);
}
if (pxmitbuf->ext_tag) {
rtw_free_xmitbuf_ext(pxmitpriv, pxmitbuf);
@@ -1471,15 +1451,13 @@ s32 rtw_xmit_classifier(struct adapter *padapter, struct xmit_frame *pxmitframe)
struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits;
int res = _SUCCESS;
if (pattrib->psta) {
if (pattrib->psta)
psta = pattrib->psta;
} else {
else
psta = rtw_get_stainfo(pstapriv, pattrib->ra);
}
if (!psta) {
res = _FAIL;
DBG_88E("rtw_xmit_classifier: psta == NULL\n");
goto exit;
}
@@ -1605,10 +1583,8 @@ static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
}
newskb = skb_copy(skb, GFP_ATOMIC);
if (!newskb) {
DEBUG_ERR("TX DROP: skb_copy fail!\n");
if (!newskb)
return -1;
}
dev_kfree_skb_any(skb);
*pskb = skb = newskb;
@@ -1620,21 +1596,15 @@ static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
}
}
if (skb_is_nonlinear(skb))
DEBUG_ERR("%s(): skb_is_nonlinear!!\n", __func__);
res = skb_linearize(skb);
if (res < 0) {
DEBUG_ERR("TX DROP: skb_linearize fail!\n");
return -1;
}
if (res < 0)
return -1;
res = nat25_db_handle(padapter, skb, NAT25_INSERT);
if (res < 0) {
if (res == -2) {
DEBUG_ERR("TX DROP: nat25_db_handle fail!\n");
if (res == -2)
return -1;
}
return 0;
}
}
@@ -1653,11 +1623,9 @@ static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
}
/* check if SA is equal to our MAC */
if (memcmp(skb->data + ETH_ALEN, GET_MY_HWADDR(padapter), ETH_ALEN)) {
DEBUG_ERR("TX DROP: untransformed frame SA:%02X%02X%02X%02X%02X%02X!\n",
skb->data[6], skb->data[7], skb->data[8], skb->data[9], skb->data[10], skb->data[11]);
if (memcmp(skb->data + ETH_ALEN, GET_MY_HWADDR(padapter), ETH_ALEN))
return -1;
}
return 0;
}
@@ -1724,10 +1692,8 @@ s32 rtw_xmit(struct adapter *padapter, struct sk_buff **ppkt)
s32 res;
pxmitframe = rtw_alloc_xmitframe(pxmitpriv);
if (!pxmitframe) {
DBG_88E("DBG_TX_DROP_FRAME %s no more pxmitframe\n", __func__);
if (!pxmitframe)
return -1;
}
rcu_read_lock();
br_port = rcu_dereference(padapter->pnetdev->rx_handler_data);
@@ -2147,13 +2113,11 @@ int rtw_sctx_wait(struct submit_ctx *sctx)
int status = 0;
expire = sctx->timeout_ms ? msecs_to_jiffies(sctx->timeout_ms) : MAX_SCHEDULE_TIMEOUT;
if (!wait_for_completion_timeout(&sctx->done, expire)) {
if (!wait_for_completion_timeout(&sctx->done, expire))
/* timeout, do something?? */
status = RTW_SCTX_DONE_TIMEOUT;
DBG_88E("%s timeout\n", __func__);
} else {
else
status = sctx->status;
}
if (status == RTW_SCTX_DONE_SUCCESS)
ret = _SUCCESS;
@@ -2161,26 +2125,9 @@ int rtw_sctx_wait(struct submit_ctx *sctx)
return ret;
}
static bool rtw_sctx_chk_waring_status(int status)
{
switch (status) {
case RTW_SCTX_DONE_UNKNOWN:
case RTW_SCTX_DONE_BUF_ALLOC:
case RTW_SCTX_DONE_BUF_FREE:
case RTW_SCTX_DONE_DRV_STOP:
case RTW_SCTX_DONE_DEV_REMOVE:
return true;
default:
return false;
}
}
void rtw_sctx_done_err(struct submit_ctx **sctx, int status)
{
if (*sctx) {
if (rtw_sctx_chk_waring_status(status))
DBG_88E("%s status:%d\n", __func__, status);
(*sctx)->status = status;
complete(&((*sctx)->done));
*sctx = NULL;
@@ -2204,6 +2151,4 @@ void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status)
if (pxmitpriv->ack_tx)
rtw_sctx_done_err(&pack_tx_ops, status);
else
DBG_88E("%s ack_tx not set\n", __func__);
}

185
drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
View File

@@ -102,14 +102,12 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, offset;
u8 ThermalValue_AVG_count = 0;
u32 ThermalValue_AVG = 0;
s32 ele_A = 0, ele_D, TempCCk, X, value32;
s32 Y, ele_C = 0;
s8 OFDM_index[2], CCK_index = 0;
s8 OFDM_index_old[2] = {0, 0}, CCK_index_old = 0;
s32 ele_D, TempCCk;
s8 OFDM_index, CCK_index = 0;
s8 OFDM_index_old = 0, CCK_index_old = 0;
u32 i = 0, j = 0;
bool is2t = false;
u8 OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
u8 OFDM_min_index = 6; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
s8 OFDM_index_mapping[2][index_mapping_NUM_88E] = {
{0, 0, 2, 3, 4, 4, /* 2.4G, decrease power */
5, 6, 7, 7, 8, 9,
@@ -131,57 +129,30 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
odm_TxPwrTrackSetPwr88E(dm_odm);
dm_odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; /* cosa add for debug */
dm_odm->RFCalibrateInfo.bTXPowerTrackingInit = true;
/* <Kordan> RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */
dm_odm->RFCalibrateInfo.RegA24 = 0x090e1317;
ThermalValue = (u8)rtl8188e_PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
if (is2t)
rf = 2;
else
rf = 1;
ThermalValue = (u8)rtl8188e_PHY_QueryRFReg(Adapter, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
if (ThermalValue) {
/* Query OFDM path A default setting */
ele_D = rtl8188e_PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord) & bMaskOFDM_D;
for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */
if (ele_D == (OFDMSwingTable[i] & bMaskOFDM_D)) {
OFDM_index_old[0] = (u8)i;
OFDM_index_old = (u8)i;
dm_odm->BbSwingIdxOfdmBase = (u8)i;
break;
}
}
/* Query OFDM path B default setting */
if (is2t) {
ele_D = rtl8188e_PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord) & bMaskOFDM_D;
for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */
if (ele_D == (OFDMSwingTable[i] & bMaskOFDM_D)) {
OFDM_index_old[1] = (u8)i;
break;
}
}
}
/* Query CCK default setting From 0xa24 */
TempCCk = dm_odm->RFCalibrateInfo.RegA24;
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (dm_odm->RFCalibrateInfo.bCCKinCH14) {
if (memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4)) {
CCK_index_old = (u8)i;
dm_odm->BbSwingIdxCckBase = (u8)i;
break;
}
} else {
if (memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4)) {
CCK_index_old = (u8)i;
dm_odm->BbSwingIdxCckBase = (u8)i;
break;
}
if (memcmp((void *)&TempCCk, (void *)&cck_swing_table[i][2], 4)) {
CCK_index_old = (u8)i;
dm_odm->BbSwingIdxCckBase = (u8)i;
break;
}
}
@@ -190,8 +161,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
dm_odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue;
dm_odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue;
for (i = 0; i < rf; i++)
dm_odm->RFCalibrateInfo.OFDM_index[i] = OFDM_index_old[i];
dm_odm->RFCalibrateInfo.OFDM_index = OFDM_index_old;
dm_odm->RFCalibrateInfo.CCK_index = CCK_index_old;
}
@@ -256,16 +226,13 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
}
if (offset >= index_mapping_NUM_88E)
offset = index_mapping_NUM_88E - 1;
for (i = 0; i < rf; i++)
OFDM_index[i] = dm_odm->RFCalibrateInfo.OFDM_index[i] + OFDM_index_mapping[j][offset];
OFDM_index = dm_odm->RFCalibrateInfo.OFDM_index + OFDM_index_mapping[j][offset];
CCK_index = dm_odm->RFCalibrateInfo.CCK_index + OFDM_index_mapping[j][offset];
for (i = 0; i < rf; i++) {
if (OFDM_index[i] > OFDM_TABLE_SIZE_92D - 1)
OFDM_index[i] = OFDM_TABLE_SIZE_92D - 1;
else if (OFDM_index[i] < OFDM_min_index)
OFDM_index[i] = OFDM_min_index;
}
if (OFDM_index > OFDM_TABLE_SIZE_92D - 1)
OFDM_index = OFDM_TABLE_SIZE_92D - 1;
else if (OFDM_index < OFDM_min_index)
OFDM_index = OFDM_min_index;
if (CCK_index > CCK_TABLE_SIZE - 1)
CCK_index = CCK_TABLE_SIZE - 1;
@@ -277,13 +244,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
if (dm_odm->RFCalibrateInfo.TxPowerTrackControl) {
dm_odm->RFCalibrateInfo.bDoneTxpower = true;
/* Adujst OFDM Ant_A according to IQK result */
ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000) >> 22;
X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][0];
Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][1];
/* Revse TX power table. */
dm_odm->BbSwingIdxOfdm = (u8)OFDM_index[0];
dm_odm->BbSwingIdxOfdm = (u8)OFDM_index;
dm_odm->BbSwingIdxCck = (u8)CCK_index;
if (dm_odm->BbSwingIdxOfdmCurrent != dm_odm->BbSwingIdxOfdm) {
@@ -295,53 +257,6 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
dm_odm->BbSwingIdxCckCurrent = dm_odm->BbSwingIdxCck;
dm_odm->BbSwingFlagCck = true;
}
if (X != 0) {
if ((X & 0x00000200) != 0)
X = X | 0xFFFFFC00;
ele_A = ((X * ele_D) >> 8) & 0x000003FF;
/* new element C = element D x Y */
if ((Y & 0x00000200) != 0)
Y = Y | 0xFFFFFC00;
ele_C = ((Y * ele_D) >> 8) & 0x000003FF;
/* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */
/* to increase TX power. Otherwise, EVM will be bad. */
}
if (is2t) {
ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000) >> 22;
/* new element A = element D x X */
X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][4];
Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][5];
if (X != 0) {
if ((X & 0x00000200) != 0) /* consider minus */
X = X | 0xFFFFFC00;
ele_A = ((X * ele_D) >> 8) & 0x000003FF;
/* new element C = element D x Y */
if ((Y & 0x00000200) != 0)
Y = Y | 0xFFFFFC00;
ele_C = ((Y * ele_D) >> 8) & 0x00003FF;
/* wtite new elements A, C, D to regC88 and regC9C, element B is always 0 */
value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A;
rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
value32 = (ele_C & 0x000003C0) >> 6;
rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
value32 = ((X * ele_D) >> 7) & 0x01;
rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT(28), value32);
} else {
rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]);
rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
rtl8188e_PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT(28), 0x00);
}
}
}
}
@@ -353,7 +268,6 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
if (dm_odm->RFCalibrateInfo.TxPowerTrackControl)
dm_odm->RFCalibrateInfo.ThermalValue = ThermalValue;
}
dm_odm->RFCalibrateInfo.TXPowercount = 0;
}
/* 1 7. IQK */
@@ -405,14 +319,14 @@ phy_PathA_RxIQK(struct adapter *adapt)
/* 1 Get TXIMR setting */
/* modify RXIQK mode table */
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
rtl8188e_PHY_SetRFReg(adapt, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
rtl8188e_PHY_SetRFReg(adapt, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
/* PA,PAD off */
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000);
rtl8188e_PHY_SetRFReg(adapt, 0xdf, bRFRegOffsetMask, 0x980);
rtl8188e_PHY_SetRFReg(adapt, 0x56, bRFRegOffsetMask, 0x51000);
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
@@ -454,10 +368,10 @@ phy_PathA_RxIQK(struct adapter *adapt)
/* 1 RX IQK */
/* modify RXIQK mode table */
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
rtl8188e_PHY_SetRFReg(adapt, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
rtl8188e_PHY_SetRFReg(adapt, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
/* IQK setting */
@@ -488,7 +402,7 @@ phy_PathA_RxIQK(struct adapter *adapt)
/* reload RF 0xdf */
rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180);
rtl8188e_PHY_SetRFReg(adapt, 0xdf, bRFRegOffsetMask, 0x180);
if (!(regeac & BIT(27)) && /* if Tx is OK, check whether Rx is OK */
(((regEA4 & 0x03FF0000) >> 16) != 0x132) &&
@@ -821,10 +735,10 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t)
}
}
static void phy_LCCalibrate_8188E(struct adapter *adapt, bool is2t)
static void phy_LCCalibrate_8188E(struct adapter *adapt)
{
u8 tmpreg;
u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal;
u32 RF_Amode = 0, LC_Cal;
/* Check continuous TX and Packet TX */
tmpreg = rtw_read8(adapt, 0xd03);
@@ -837,26 +751,18 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt, bool is2t)
if ((tmpreg & 0x70) != 0) {
/* 1. Read original RF mode */
/* Path-A */
RF_Amode = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits);
/* Path-B */
if (is2t)
RF_Bmode = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits);
RF_Amode = rtl8188e_PHY_QueryRFReg(adapt, RF_AC, bMask12Bits);
/* 2. Set RF mode = standby mode */
/* Path-A */
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode & 0x8FFFF) | 0x10000);
/* Path-B */
if (is2t)
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode & 0x8FFFF) | 0x10000);
rtl8188e_PHY_SetRFReg(adapt, RF_AC, bMask12Bits, (RF_Amode & 0x8FFFF) | 0x10000);
}
/* 3. Read RF reg18 */
LC_Cal = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
LC_Cal = rtl8188e_PHY_QueryRFReg(adapt, RF_CHNLBW, bMask12Bits);
/* 4. Set LC calibration begin bit15 */
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000);
rtl8188e_PHY_SetRFReg(adapt, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000);
msleep(100);
@@ -865,11 +771,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt, bool is2t)
/* Deal with continuous TX case */
/* Path-A */
rtw_write8(adapt, 0xd03, tmpreg);
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode);
/* Path-B */
if (is2t)
rtl8188e_PHY_SetRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode);
rtl8188e_PHY_SetRFReg(adapt, RF_AC, bMask12Bits, RF_Amode);
} else {
/* Deal with Packet TX case */
rtw_write8(adapt, REG_TXPAUSE, 0x00);
@@ -885,7 +787,6 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
bool pathaok;
s32 RegE94, RegE9C, RegEA4, RegEB4, RegEBC;
bool is12simular, is13simular, is23simular;
bool singletone = false, carrier_sup = false;
u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance,
rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable,
@@ -893,13 +794,6 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
rOFDM0_XCTxAFE, rOFDM0_XDTxAFE,
rOFDM0_RxIQExtAnta};
if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION))
return;
/* 20120213<Kordan> Turn on when continuous Tx to pass lab testing. (required by Edlu) */
if (singletone || carrier_sup)
return;
if (recovery) {
reload_adda_reg(adapt, IQK_BB_REG_92C, dm_odm->RFCalibrateInfo.IQK_BB_backup_recover, 9);
return;
@@ -988,21 +882,14 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
void PHY_LCCalibrate_8188E(struct adapter *adapt)
{
bool singletone = false, carrier_sup = false;
u32 timeout = 2000, timecount = 0;
struct hal_data_8188e *pHalData = &adapt->haldata;
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION))
return;
/* 20120213<Kordan> Turn on when continuous Tx to pass lab testing. (required by Edlu) */
if (singletone || carrier_sup)
return;
while (*dm_odm->pbScanInProcess && timecount < timeout) {
mdelay(50);
timecount += 50;
}
phy_LCCalibrate_8188E(adapt, false);
phy_LCCalibrate_8188E(adapt);
}

4
drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
View File

@@ -63,10 +63,8 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg pwrseqcmd[])
else
udelay(10);
if (poll_count++ > max_poll_count) {
DBG_88E("Fail to polling Offset[%#x]\n", offset);
if (poll_count++ > max_poll_count)
return false;
}
} while (!poll_bit);
break;
case PWR_CMD_DELAY:

36
drivers/staging/r8188eu/hal/hal_com.c
View File

@@ -20,19 +20,27 @@ void dump_chip_info(struct HAL_VERSION chip_vers)
"Normal_Chip" : "Test_Chip");
cnt += sprintf((buf + cnt), "%s_", IS_CHIP_VENDOR_TSMC(chip_vers) ?
"TSMC" : "UMC");
if (IS_A_CUT(chip_vers))
switch (chip_vers.CUTVersion) {
case A_CUT_VERSION:
cnt += sprintf((buf + cnt), "A_CUT_");
else if (IS_B_CUT(chip_vers))
break;
case B_CUT_VERSION:
cnt += sprintf((buf + cnt), "B_CUT_");
else if (IS_C_CUT(chip_vers))
break;
case C_CUT_VERSION:
cnt += sprintf((buf + cnt), "C_CUT_");
else if (IS_D_CUT(chip_vers))
break;
case D_CUT_VERSION:
cnt += sprintf((buf + cnt), "D_CUT_");
else if (IS_E_CUT(chip_vers))
break;
case E_CUT_VERSION:
cnt += sprintf((buf + cnt), "E_CUT_");
else
cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_",
chip_vers.CUTVersion);
break;
default:
cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_", chip_vers.CUTVersion);
break;
}
cnt += sprintf((buf + cnt), "1T1R_");
@@ -279,22 +287,12 @@ bool Hal_MappingOutPipe(struct adapter *adapter, u8 numoutpipe)
return result;
}
void hal_init_macaddr(struct adapter *adapter)
{
SetHwReg8188EU(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
}
/*
* C2H event format:
* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
*/
void c2h_evt_clear(struct adapter *adapter)
{
rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
}
s32 c2h_evt_read(struct adapter *adapter, u8 *buf)
{
s32 ret = _FAIL;
@@ -332,7 +330,7 @@ clear_evt:
* If this field isn't clear, the FW won't update the next
* command message.
*/
c2h_evt_clear(adapter);
rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
exit:
return ret;
}

3
drivers/staging/r8188eu/hal/hal_intf.c
View File

@@ -21,7 +21,6 @@ uint rtw_hal_init(struct adapter *adapt)
hal_notch_filter_8188e(adapt, 1);
} else {
adapt->hw_init_completed = false;
DBG_88E("rtw_hal_init: hal__init fail\n");
}
return status;
@@ -35,8 +34,6 @@ uint rtw_hal_deinit(struct adapter *adapt)
if (status == _SUCCESS)
adapt->hw_init_completed = false;
else
DBG_88E("\n rtw_hal_deinit: hal_init fail\n");
return status;
}

118
drivers/staging/r8188eu/hal/odm.c
View File

@@ -65,7 +65,7 @@ u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
0x0b40002d,/* 42, -15.0dB */
};
u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
u8 cck_swing_table[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
@@ -101,42 +101,6 @@ u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
};
u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
};
#define RxDefaultAnt1 0x65a9
#define RxDefaultAnt2 0x569a
@@ -169,9 +133,6 @@ static void odm_DIG(struct odm_dm_struct *pDM_Odm)
u8 dm_dig_max, dm_dig_min;
u8 CurrentIGI = pDM_DigTable->CurIGValue;
if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
return;
if (*pDM_Odm->pbScanInProcess)
return;
@@ -305,7 +266,7 @@ static void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm)
u8 i;
struct sta_info *pEntry;
if (*pDM_Odm->pBandWidth == ODM_BW40M) {
if (*pDM_Odm->pBandWidth == HT_CHANNEL_WIDTH_40) {
if (*pDM_Odm->pSecChOffset == 1)
pDM_Odm->ControlChannel = *pDM_Odm->pChannel - 2;
else if (*pDM_Odm->pSecChOffset == 2)
@@ -367,9 +328,6 @@ static void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm)
struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt;
struct adapter *adapter = pDM_Odm->Adapter;
if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
return;
/* hold ofdm counter */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */
@@ -422,8 +380,6 @@ static void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm)
u8 CurCCK_CCAThres;
struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt;
if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD | ODM_BB_FA_CNT)))
return;
if (pDM_Odm->bLinked) {
if (pDM_Odm->RSSI_Min > 25) {
CurCCK_CCAThres = 0xcd;
@@ -502,25 +458,17 @@ static void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm)
}
}
if (tmpEntryMaxPWDB != 0) /* If associated entry is found */
pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
else
pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */
pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
else
pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
FindMinimumRSSI(Adapter);
ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
pHalData->odmpriv.RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM;
}
static void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm)
{
pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true;
pDM_Odm->RFCalibrateInfo.TXPowercount = 0;
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false;
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
}
@@ -563,9 +511,6 @@ static void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm)
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO))
return;
if (pregpriv->wifi_spec == 1)
goto dm_CheckEdcaTurbo_EXIT;
@@ -694,56 +639,6 @@ void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def Cmn
pDM_Odm->BbSwingFlagOfdm = false;
}
void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, void *pValue)
{
/* */
/* Hook call by reference pointer. */
/* */
switch (CmnInfo) {
/* Dynamic call by reference pointer. */
case ODM_CMNINFO_WM_MODE:
pDM_Odm->pWirelessMode = (u8 *)pValue;
break;
case ODM_CMNINFO_SEC_CHNL_OFFSET:
pDM_Odm->pSecChOffset = (u8 *)pValue;
break;
case ODM_CMNINFO_BW:
pDM_Odm->pBandWidth = (u8 *)pValue;
break;
case ODM_CMNINFO_CHNL:
pDM_Odm->pChannel = (u8 *)pValue;
break;
case ODM_CMNINFO_SCAN:
pDM_Odm->pbScanInProcess = (bool *)pValue;
break;
case ODM_CMNINFO_POWER_SAVING:
pDM_Odm->pbPowerSaving = (bool *)pValue;
break;
default:
/* do nothing */
break;
}
}
/* Update Band/CHannel/.. The values are dynamic but non-per-packet. */
void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value)
{
/* */
/* This init variable may be changed in run time. */
/* */
switch (CmnInfo) {
case ODM_CMNINFO_ABILITY:
pDM_Odm->SupportAbility = (u32)Value;
break;
case ODM_CMNINFO_LINK:
pDM_Odm->bLinked = (bool)Value;
break;
case ODM_CMNINFO_RSSI_MIN:
pDM_Odm->RSSI_Min = (u8)Value;
break;
}
}
void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI)
{
struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
@@ -852,7 +747,7 @@ u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u
} else if (rssi_level == DM_RATR_STA_MIDDLE) {
rate_bitmap = 0x000ff000;
} else {
if (*pDM_Odm->pBandWidth == ODM_BW40M)
if (*pDM_Odm->pBandWidth == HT_CHANNEL_WIDTH_40)
rate_bitmap = 0x000ff015;
else
rate_bitmap = 0x000ff005;
@@ -914,11 +809,8 @@ void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm)
{
struct adapter *Adapter = pDM_Odm->Adapter;
if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK))
return;
if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */
rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
rtl8188e_PHY_SetRFReg(Adapter, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
return;

44
drivers/staging/r8188eu/hal/odm_HWConfig.c
View File

@@ -3,10 +3,6 @@
#include "../include/drv_types.h"
#define READ_AND_CONFIG READ_AND_CONFIG_MP
#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
static u8 odm_QueryRxPwrPercentage(s8 AntPower)
{
if ((AntPower <= -100) || (AntPower >= 20))
@@ -71,13 +67,9 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
if (isCCKrate) {
u8 cck_agc_rpt;
dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
/* (1)Hardware does not provide RSSI for CCK */
/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
@@ -154,12 +146,8 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
SQ = ((64 - SQ_rpt) * 100) / 44;
}
pPhyInfo->SignalQuality = SQ;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
}
} else { /* is OFDM rate */
dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
/* (1)Get RSSI for HT rate */
for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
@@ -180,7 +168,6 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
/* Get Rx snr value in DB */
pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2);
dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2);
}
/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
@@ -207,7 +194,6 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
if (pPktinfo->bPacketMatchBSSID) {
if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
}
}
}
@@ -362,33 +348,7 @@ void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
}
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
enum rf_radio_path content,
enum rf_radio_path rfpath)
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm)
{
if (rfpath == RF_PATH_A)
READ_AND_CONFIG(8188E, _RadioA_1T_);
return HAL_STATUS_SUCCESS;
}
enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm,
enum odm_bb_config_type config_tp)
{
if (config_tp == CONFIG_BB_PHY_REG) {
READ_AND_CONFIG(8188E, _PHY_REG_1T_);
} else if (config_tp == CONFIG_BB_AGC_TAB) {
READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
} else if (config_tp == CONFIG_BB_PHY_REG_PG) {
READ_AND_CONFIG(8188E, _PHY_REG_PG_);
}
return HAL_STATUS_SUCCESS;
}
enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm)
{
u8 result = HAL_STATUS_SUCCESS;
result = READ_AND_CONFIG(8188E, _MAC_REG_);
return result;
return ODM_ReadAndConfig_RadioA_1T_8188E(dm_odm);
}

7
drivers/staging/r8188eu/hal/odm_RegConfig8188E.c
View File

@@ -4,8 +4,7 @@
#include "../include/drv_types.h"
static void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
u32 Data, enum rf_radio_path RF_PATH,
u32 RegAddr)
u32 Data, u32 RegAddr)
{
if (Addr == 0xffe) {
msleep(50);
@@ -20,7 +19,7 @@ static void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
} else if (Addr == 0xf9) {
udelay(1);
} else {
rtl8188e_PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
rtl8188e_PHY_SetRFReg(pDM_Odm->Adapter, RegAddr, bRFRegOffsetMask, Data);
/* Add 1us delay between BB/RF register setting. */
udelay(1);
}
@@ -31,7 +30,7 @@ void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data
u32 content = 0x1000; /* RF_Content: radioa_txt */
u32 maskforPhySet = (u32)(content & 0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_A, Addr | maskforPhySet);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, Addr | maskforPhySet);
}
void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data)

6
drivers/staging/r8188eu/hal/odm_debug.c
View File

@@ -1,6 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include "../include/rtw_debug.h"
u32 GlobalDebugLevel;

46
drivers/staging/r8188eu/hal/rtl8188e_cmd.c
View File

@@ -54,10 +54,8 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p
u32 h2c_cmd = 0;
u32 h2c_cmd_ex = 0;
if (!adapt->bFWReady) {
DBG_88E("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n");
if (!adapt->bFWReady)
return _FAIL;
}
if (!pCmdBuffer || CmdLen > RTL88E_MAX_CMD_LEN || adapt->bSurpriseRemoved)
return _FAIL;
@@ -66,10 +64,8 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p
do {
h2c_box_num = haldata->LastHMEBoxNum;
if (!_is_fw_read_cmd_down(adapt, h2c_box_num)) {
DBG_88E(" fw read cmd failed...\n");
if (!_is_fw_read_cmd_down(adapt, h2c_box_num))
return _FAIL;
}
*(u8 *)(&h2c_cmd) = ElementID;
@@ -115,7 +111,6 @@ u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask)
FillH2CCmd_88E(adapt, H2C_DM_MACID_CFG, 3, buf);
} else {
DBG_88E("==>%s fw dont support RA\n", __func__);
res = _FAIL;
}
@@ -157,9 +152,6 @@ void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode)
struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv;
u8 RLBM = 0; /* 0:Min, 1:Max, 2:User define */
DBG_88E("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __func__,
Mode, pwrpriv->smart_ps, adapt->registrypriv.uapsd_enable);
switch (Mode) {
case PS_MODE_ACTIVE:
H2CSetPwrMode.Mode = 0;
@@ -200,12 +192,8 @@ void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode)
void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt)
{
u8 opmode, macid;
u16 mst_rpt = le16_to_cpu(mstatus_rpt);
opmode = (u8)mst_rpt;
macid = (u8)(mst_rpt >> 8);
DBG_88E("### %s: MStatus=%x MACID=%d\n", __func__, opmode, macid);
FillH2CCmd_88E(adapt, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt);
}
@@ -285,10 +273,8 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
_ConstructBeacon:
if ((pktlen + TXDESC_SIZE) > 512) {
DBG_88E("beacon frame too large\n");
if ((pktlen + TXDESC_SIZE) > 512)
return;
}
*pLength = pktlen;
}
@@ -453,12 +439,9 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
u32 TotalPacketLen;
struct rsvdpage_loc RsvdPageLoc;
DBG_88E("%s\n", __func__);
ReservedPagePacket = kzalloc(1000, GFP_KERNEL);
if (!ReservedPagePacket) {
DBG_88E("%s: alloc ReservedPagePacket fail!\n", __func__);
if (!ReservedPagePacket)
return;
}
pxmitpriv = &adapt->xmitpriv;
pmlmeext = &adapt->mlmeextpriv;
@@ -535,7 +518,6 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
rtl8188eu_mgnt_xmit(adapt, pmgntframe);
DBG_88E("%s: Set RSVD page location to Fw\n", __func__);
FillH2CCmd_88E(adapt, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc);
exit:
@@ -552,8 +534,6 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
u8 DLBcnCount = 0;
u32 poll = 0;
DBG_88E("%s mstatus(%x)\n", __func__, mstatus);
if (mstatus == 1) {
/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
/* Suggested by filen. Added by tynli. */
@@ -570,10 +550,8 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) & (~BIT(3)));
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) | BIT(4));
if (haldata->RegFwHwTxQCtrl & BIT(6)) {
DBG_88E("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n");
if (haldata->RegFwHwTxQCtrl & BIT(6))
bSendBeacon = true;
}
/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
rtw_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl & (~BIT(6))));
@@ -596,12 +574,6 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
} while (!bcn_valid && (poll % 10) != 0 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
} while (!bcn_valid && DLBcnCount <= 100 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
if (adapt->bSurpriseRemoved || adapt->bDriverStopped)
;
else if (!bcn_valid)
DBG_88E("%s: 1 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __func__, DLBcnCount, poll);
else
DBG_88E("%s: 1 Download RSVD success! DLBcnCount:%u, poll:%u\n", __func__, DLBcnCount, poll);
/* */
/* We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower) */
/* because we need to free the Tx BCN Desc which is used by the first reserved page packet. */
@@ -624,10 +596,8 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
}
/* Update RSVD page location H2C to Fw. */
if (bcn_valid) {
if (bcn_valid)
SetHwReg8188EU(adapt, HW_VAR_BCN_VALID, NULL);
DBG_88E("Set RSVD page location to Fw.\n");
}
/* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
@@ -646,11 +616,9 @@ void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
switch (p2p_ps_state) {
case P2P_PS_DISABLE:
DBG_88E("P2P_PS_DISABLE\n");
memset(p2p_ps_offload, 0, 1);
break;
case P2P_PS_ENABLE:
DBG_88E("P2P_PS_ENABLE\n");
/* update CTWindow value. */
if (pwdinfo->ctwindow > 0) {
p2p_ps_offload->CTWindow_En = 1;
@@ -690,11 +658,9 @@ void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
}
break;
case P2P_PS_SCAN:
DBG_88E("P2P_PS_SCAN\n");
p2p_ps_offload->discovery = 1;
break;
case P2P_PS_SCAN_DONE:
DBG_88E("P2P_PS_SCAN_DONE\n");
p2p_ps_offload->discovery = 0;
pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
break;

52
drivers/staging/r8188eu/hal/rtl8188e_dm.c
View File

@@ -22,27 +22,6 @@ static void dm_InitGPIOSetting(struct adapter *Adapter)
/* */
/* functions */
/* */
static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = &Adapter->haldata;
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
/* Init Value */
memset(dm_odm, 0, sizeof(*dm_odm));
dm_odm->Adapter = Adapter;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(hal_data->VersionID));
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
}
static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
{
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
@@ -53,23 +32,19 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
struct dm_priv *pdmpriv = &hal_data->dmpriv;
int i;
pdmpriv->InitODMFlag = ODM_BB_FA_CNT |
ODM_BB_RSSI_MONITOR |
ODM_BB_CCK_PD |
ODM_MAC_EDCA_TURBO |
ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
pdmpriv->InitODMFlag = ODM_BB_RSSI_MONITOR;
if (hal_data->AntDivCfg)
pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
dm_odm->SupportAbility = pdmpriv->InitODMFlag;
dm_odm->pWirelessMode = &pmlmeext->cur_wireless_mode;
dm_odm->pSecChOffset = &hal_data->nCur40MhzPrimeSC;
dm_odm->pBandWidth = &hal_data->CurrentChannelBW;
dm_odm->pChannel = &hal_data->CurrentChannel;
dm_odm->pbScanInProcess = &pmlmepriv->bScanInProcess;
dm_odm->pbPowerSaving = &pwrctrlpriv->bpower_saving;
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_WM_MODE, &pmlmeext->cur_wireless_mode);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &hal_data->nCur40MhzPrimeSC);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_BW, &hal_data->CurrentChannelBW);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_CHNL, &hal_data->CurrentChannel);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SCAN, &pmlmepriv->bScanInProcess);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_POWER_SAVING, &pwrctrlpriv->bpower_saving);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
for (i = 0; i < NUM_STA; i++)
@@ -105,7 +80,7 @@ void rtl8188e_HalDmWatchDog(struct adapter *Adapter)
bLinked = true;
}
ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked);
hal_data->odmpriv.bLinked = bLinked;
ODM_DMWatchdog(&hal_data->odmpriv);
}
@@ -113,9 +88,14 @@ void rtl8188e_init_dm_priv(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = &Adapter->haldata;
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
memset(pdmpriv, 0, sizeof(struct dm_priv));
Init_ODM_ComInfo_88E(Adapter);
memset(dm_odm, 0, sizeof(*dm_odm));
dm_odm->Adapter = Adapter;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(hal_data->VersionID));
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
}
/* Add new function to reset the state of antenna diversity before link. */

403
drivers/staging/r8188eu/hal/rtl8188e_hal_init.c
View File

@@ -3,12 +3,12 @@
#define _HAL_INIT_C_
#include "../include/linux/firmware.h"
#include "../include/drv_types.h"
#include "../include/rtw_efuse.h"
#include "../include/rtl8188e_hal.h"
#include "../include/rtw_iol.h"
#include "../include/usb_ops.h"
#include "../include/rtw_fw.h"
static void iol_mode_enable(struct adapter *padapter, u8 enable)
{
@@ -19,10 +19,8 @@ static void iol_mode_enable(struct adapter *padapter, u8 enable)
reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 | SW_OFFLOAD_EN);
if (!padapter->bFWReady) {
DBG_88E("bFWReady == false call reset 8051...\n");
_8051Reset88E(padapter);
}
if (!padapter->bFWReady)
rtw_reset_8051(padapter);
} else {
/* disable initial offload */
@@ -77,16 +75,12 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
u8 u1temp = 0;
efuseTbl = kzalloc(EFUSE_MAP_LEN_88E, GFP_KERNEL);
if (!efuseTbl) {
DBG_88E("%s: alloc efuseTbl fail!\n", __func__);
if (!efuseTbl)
goto exit;
}
eFuseWord = rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
if (!eFuseWord) {
DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
if (!eFuseWord)
goto exit;
}
/* 0. Refresh efuse init map as all oxFF. */
for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
@@ -102,7 +96,6 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
efuse_utilized++;
eFuse_Addr++;
} else {
DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, rtemp8);
goto exit;
}
@@ -196,7 +189,6 @@ static void efuse_read_phymap_from_txpktbuf(
{
u16 dbg_addr = 0;
u32 start = 0, passing_time = 0;
u8 reg_0x143 = 0;
__le32 lo32 = 0, hi32 = 0;
u16 len = 0, count = 0;
int i = 0;
@@ -207,8 +199,6 @@ static void efuse_read_phymap_from_txpktbuf(
if (bcnhead < 0) /* if not valid */
bcnhead = rtw_read8(adapter, REG_TDECTRL + 1);
DBG_88E("%s bcnhead:%d\n", __func__, bcnhead);
rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
dbg_addr = bcnhead * 128 / 8; /* 8-bytes addressing */
@@ -218,11 +208,9 @@ static void efuse_read_phymap_from_txpktbuf(
rtw_write8(adapter, REG_TXPKTBUF_DBG, 0);
start = jiffies;
while (!(reg_0x143 = rtw_read8(adapter, REG_TXPKTBUF_DBG)) &&
(passing_time = rtw_get_passing_time_ms(start)) < 1000) {
DBG_88E("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __func__, reg_0x143, rtw_read8(adapter, 0x106));
while (!rtw_read8(adapter, REG_TXPKTBUF_DBG) &&
(passing_time = rtw_get_passing_time_ms(start)) < 1000)
rtw_usleep_os(100);
}
/* data from EEPROM needs to be in LE */
lo32 = cpu_to_le32(rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L));
@@ -233,14 +221,12 @@ static void efuse_read_phymap_from_txpktbuf(
* do not remove it as the rtw_read16() call consumes
* 2 bytes from the EEPROM source.
*/
u16 lenc = rtw_read16(adapter, REG_PKTBUF_DBG_DATA_L);
rtw_read16(adapter, REG_PKTBUF_DBG_DATA_L);
len = le32_to_cpu(lo32) & 0x0000ffff;
limit = (len - 2 < limit) ? len - 2 : limit;
DBG_88E("%s len:%u, lenc:%u\n", __func__, len, lenc);
memcpy(pos, ((u8 *)&lo32) + 2, (limit >= count + 2) ? 2 : limit - count);
count += (limit >= count + 2) ? 2 : limit - count;
pos = content + count;
@@ -261,7 +247,6 @@ static void efuse_read_phymap_from_txpktbuf(
i++;
}
rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS);
DBG_88E("%s read count:%u\n", __func__, count);
*size = count;
}
@@ -285,7 +270,6 @@ s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
{
s32 result = _SUCCESS;
DBG_88E("==> %s\n", __func__);
if (rtw_IOL_applied(padapter)) {
iol_mode_enable(padapter, 1);
result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
@@ -336,313 +320,6 @@ exit:
return ret;
}
static void _FWDownloadEnable(struct adapter *padapter, bool enable)
{
u8 tmp;
if (enable) {
/* MCU firmware download enable. */
tmp = rtw_read8(padapter, REG_MCUFWDL);
rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01);
/* 8051 reset */
tmp = rtw_read8(padapter, REG_MCUFWDL + 2);
rtw_write8(padapter, REG_MCUFWDL + 2, tmp & 0xf7);
} else {
/* MCU firmware download disable. */
tmp = rtw_read8(padapter, REG_MCUFWDL);
rtw_write8(padapter, REG_MCUFWDL, tmp & 0xfe);
/* Reserved for fw extension. */
rtw_write8(padapter, REG_MCUFWDL + 1, 0x00);
}
}
#define MAX_REG_BOLCK_SIZE 196
static int _BlockWrite(struct adapter *padapter, void *buffer, u32 buffSize)
{
int ret = _SUCCESS;
u32 blockSize_p1 = 4; /* (Default) Phase #1 : PCI muse use 4-byte write to download FW */
u32 blockSize_p2 = 8; /* Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. */
u32 blockSize_p3 = 1; /* Phase #3 : Use 1-byte, the remnant of FW image. */
u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0;
u32 remainSize_p1 = 0, remainSize_p2 = 0;
u8 *bufferPtr = (u8 *)buffer;
u32 i = 0, offset = 0;
blockSize_p1 = MAX_REG_BOLCK_SIZE;
/* 3 Phase #1 */
blockCount_p1 = buffSize / blockSize_p1;
remainSize_p1 = buffSize % blockSize_p1;
for (i = 0; i < blockCount_p1; i++) {
ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1));
if (ret == _FAIL)
goto exit;
}
/* 3 Phase #2 */
if (remainSize_p1) {
offset = blockCount_p1 * blockSize_p1;
blockCount_p2 = remainSize_p1 / blockSize_p2;
remainSize_p2 = remainSize_p1 % blockSize_p2;
for (i = 0; i < blockCount_p2; i++) {
ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i * blockSize_p2), blockSize_p2, (bufferPtr + offset + i * blockSize_p2));
if (ret == _FAIL)
goto exit;
}
}
/* 3 Phase #3 */
if (remainSize_p2) {
offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2);
blockCount_p3 = remainSize_p2 / blockSize_p3;
for (i = 0; i < blockCount_p3; i++) {
ret = rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i));
if (ret == _FAIL)
goto exit;
}
}
exit:
return ret;
}
static int _PageWrite(struct adapter *padapter, u32 page, void *buffer, u32 size)
{
u8 value8;
u8 u8Page = (u8)(page & 0x07);
value8 = (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page;
rtw_write8(padapter, REG_MCUFWDL + 2, value8);
return _BlockWrite(padapter, buffer, size);
}
static int _WriteFW(struct adapter *padapter, void *buffer, u32 size)
{
/* Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */
/* We can remove _ReadChipVersion from ReadpadapterInfo8192C later. */
int ret = _SUCCESS;
u32 pageNums, remainSize;
u32 page, offset;
u8 *bufferPtr = (u8 *)buffer;
pageNums = size / MAX_PAGE_SIZE;
remainSize = size % MAX_PAGE_SIZE;
for (page = 0; page < pageNums; page++) {
offset = page * MAX_PAGE_SIZE;
ret = _PageWrite(padapter, page, bufferPtr + offset, MAX_PAGE_SIZE);
if (ret == _FAIL)
goto exit;
}
if (remainSize) {
offset = pageNums * MAX_PAGE_SIZE;
page = pageNums;
ret = _PageWrite(padapter, page, bufferPtr + offset, remainSize);
if (ret == _FAIL)
goto exit;
}
exit:
return ret;
}
void _8051Reset88E(struct adapter *padapter)
{
u8 u1bTmp;
u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp & (~BIT(2)));
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp | (BIT(2)));
DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
}
static s32 _FWFreeToGo(struct adapter *padapter)
{
u32 counter = 0;
u32 value32;
/* polling CheckSum report */
do {
value32 = rtw_read32(padapter, REG_MCUFWDL);
if (value32 & FWDL_ChkSum_rpt)
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
if (counter >= POLLING_READY_TIMEOUT_COUNT) {
DBG_88E("%s: chksum report fail! REG_MCUFWDL:0x%08x\n", __func__, value32);
return _FAIL;
}
DBG_88E("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__, value32);
value32 = rtw_read32(padapter, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
value32 &= ~WINTINI_RDY;
rtw_write32(padapter, REG_MCUFWDL, value32);
_8051Reset88E(padapter);
/* polling for FW ready */
counter = 0;
do {
value32 = rtw_read32(padapter, REG_MCUFWDL);
if (value32 & WINTINI_RDY) {
DBG_88E("%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n", __func__, value32);
return _SUCCESS;
}
udelay(5);
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
DBG_88E("%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n", __func__, value32);
return _FAIL;
}
static int load_firmware(struct rt_firmware *pFirmware, struct device *device)
{
s32 rtStatus = _SUCCESS;
const struct firmware *fw;
const char *fw_name = "rtlwifi/rtl8188eufw.bin";
int err = request_firmware(&fw, fw_name, device);
if (err) {
pr_err("Request firmware failed with error 0x%x\n", err);
rtStatus = _FAIL;
goto Exit;
}
if (!fw) {
pr_err("Firmware %s not available\n", fw_name);
rtStatus = _FAIL;
goto Exit;
}
if (fw->size > FW_8188E_SIZE) {
rtStatus = _FAIL;
goto Exit;
}
pFirmware->szFwBuffer = kzalloc(FW_8188E_SIZE, GFP_KERNEL);
if (!pFirmware->szFwBuffer) {
pr_err("Failed to allocate pFirmware->szFwBuffer\n");
rtStatus = _FAIL;
goto Exit;
}
memcpy(pFirmware->szFwBuffer, fw->data, fw->size);
pFirmware->ulFwLength = fw->size;
release_firmware(fw);
dev_dbg(device, "!bUsedWoWLANFw, FmrmwareLen:%d+\n", pFirmware->ulFwLength);
Exit:
return rtStatus;
}
s32 rtl8188e_FirmwareDownload(struct adapter *padapter)
{
s32 rtStatus = _SUCCESS;
u8 writeFW_retry = 0;
u32 fwdl_start_time;
struct hal_data_8188e *pHalData = &padapter->haldata;
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
struct device *device = dvobj_to_dev(dvobj);
struct rt_firmware_hdr *pFwHdr = NULL;
u8 *pFirmwareBuf;
u32 FirmwareLen;
static int log_version;
if (!dvobj->firmware.szFwBuffer)
rtStatus = load_firmware(&dvobj->firmware, device);
if (rtStatus == _FAIL) {
dvobj->firmware.szFwBuffer = NULL;
goto Exit;
}
pFirmwareBuf = dvobj->firmware.szFwBuffer;
FirmwareLen = dvobj->firmware.ulFwLength;
/* To Check Fw header. Added by tynli. 2009.12.04. */
pFwHdr = (struct rt_firmware_hdr *)dvobj->firmware.szFwBuffer;
pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version);
pHalData->FirmwareSubVersion = pFwHdr->Subversion;
pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature);
if (!log_version++)
pr_info("%sFirmware Version %d, SubVersion %d, Signature 0x%x\n",
DRIVER_PREFIX, pHalData->FirmwareVersion,
pHalData->FirmwareSubVersion, pHalData->FirmwareSignature);
if (IS_FW_HEADER_EXIST(pFwHdr)) {
/* Shift 32 bytes for FW header */
pFirmwareBuf = pFirmwareBuf + 32;
FirmwareLen = FirmwareLen - 32;
}
/* Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */
/* or it will cause download Fw fail. 2010.02.01. by tynli. */
if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */
rtw_write8(padapter, REG_MCUFWDL, 0x00);
_8051Reset88E(padapter);
}
_FWDownloadEnable(padapter, true);
fwdl_start_time = jiffies;
while (1) {
/* reset the FWDL chksum */
rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt);
rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen);
if (rtStatus == _SUCCESS ||
(rtw_get_passing_time_ms(fwdl_start_time) > 500 && writeFW_retry++ >= 3))
break;
DBG_88E("%s writeFW_retry:%u, time after fwdl_start_time:%ums\n",
__func__, writeFW_retry, rtw_get_passing_time_ms(fwdl_start_time)
);
}
_FWDownloadEnable(padapter, false);
if (_SUCCESS != rtStatus) {
DBG_88E("DL Firmware failed!\n");
goto Exit;
}
rtStatus = _FWFreeToGo(padapter);
if (_SUCCESS != rtStatus) {
DBG_88E("DL Firmware failed!\n");
goto Exit;
}
Exit:
return rtStatus;
}
void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = &padapter->haldata;
/* Init Fw LPS related. */
padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
/* Init H2C counter. by tynli. 2009.12.09. */
pHalData->LastHMEBoxNum = 0;
}
/* */
/* Efuse related code */
/* */
enum{
VOLTAGE_V25 = 0x03,
LDOE25_SHIFT = 28,
};
void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 PwrState)
{
u16 tmpV16;
@@ -691,22 +368,16 @@ static void Hal_EfuseReadEFuse88E(struct adapter *Adapter,
/* */
/* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */
/* */
if ((_offset + _size_byte) > EFUSE_MAP_LEN_88E) {/* total E-Fuse table is 512bytes */
DBG_88E("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n", _offset, _size_byte);
if ((_offset + _size_byte) > EFUSE_MAP_LEN_88E) /* total E-Fuse table is 512bytes */
goto exit;
}
efuseTbl = kzalloc(EFUSE_MAP_LEN_88E, GFP_KERNEL);
if (!efuseTbl) {
DBG_88E("%s: alloc efuseTbl fail!\n", __func__);
if (!efuseTbl)
goto exit;
}
eFuseWord = rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
if (!eFuseWord) {
DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
if (!eFuseWord)
goto exit;
}
/* 0. Refresh efuse init map as all oxFF. */
for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
@@ -722,7 +393,6 @@ static void Hal_EfuseReadEFuse88E(struct adapter *Adapter,
efuse_utilized++;
eFuse_Addr++;
} else {
DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, *rtemp8);
goto exit;
}
@@ -797,9 +467,6 @@ static void Hal_EfuseReadEFuse88E(struct adapter *Adapter,
for (i = 0; i < _size_byte; i++)
pbuf[i] = efuseTbl[_offset + i];
/* 5. Calculate Efuse utilization. */
SetHwReg8188EU(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr);
exit:
kfree(efuseTbl);
kfree(eFuseWord);
@@ -852,39 +519,19 @@ void rtl8188e_SetHalODMVar(struct adapter *Adapter, void *pValue1, bool bSet)
struct sta_info *psta = (struct sta_info *)pValue1;
if (bSet) {
DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
podmpriv->pODM_StaInfo[psta->mac_id] = psta;
ODM_RAInfo_Init(podmpriv, psta->mac_id);
} else {
DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
podmpriv->pODM_StaInfo[psta->mac_id] = NULL;
}
}
void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
{
if (enable) {
DBG_88E("Enable notch filter\n");
if (enable)
rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1));
} else {
DBG_88E("Disable notch filter\n");
else
rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
}
}
u8 GetEEPROMSize8188E(struct adapter *padapter)
{
u8 size = 0;
u32 cr;
cr = rtw_read16(padapter, REG_9346CR);
/* 6: EEPROM used is 93C46, 4: boot from E-Fuse. */
size = (cr & BOOT_FROM_EEPROM) ? 6 : 4;
netdev_dbg(padapter->pnetdev, "EEPROM type is %s\n",
size == 4 ? "E-FUSE" : "93C46");
return size;
}
/* */
@@ -1093,20 +740,14 @@ static void hal_get_chnl_group_88e(u8 chnl, u8 *group)
void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
{
if (AutoLoadFail) {
if (AutoLoadFail)
padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
} else {
else
/* hw power down mode selection , 0:rf-off / 1:power down */
/* decide hw if support remote wakeup function */
/* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
DBG_88E("%s , bSupportRemoteWakeup(%x)\n", __func__,
padapter->pwrctrlpriv.bSupportRemoteWakeup);
DBG_88E("### PS params => power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
}
}
void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
@@ -1126,17 +767,10 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto
pHalData->Index24G_BW40_Base[ch] = pwrInfo24G.IndexBW40_Base[0][4];
else
pHalData->Index24G_BW40_Base[ch] = pwrInfo24G.IndexBW40_Base[0][group];
DBG_88E("======= Path 0, Channel %d =======\n", ch);
DBG_88E("Index24G_CCK_Base[%d] = 0x%x\n", ch, pHalData->Index24G_CCK_Base[ch]);
DBG_88E("Index24G_BW40_Base[%d] = 0x%x\n", ch, pHalData->Index24G_BW40_Base[ch]);
}
for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
pHalData->OFDM_24G_Diff[TxCount] = pwrInfo24G.OFDM_Diff[0][TxCount];
pHalData->BW20_24G_Diff[TxCount] = pwrInfo24G.BW20_Diff[0][TxCount];
DBG_88E("======= TxCount %d =======\n", TxCount);
DBG_88E("OFDM_24G_Diff[%d] = %d\n", TxCount, pHalData->OFDM_24G_Diff[TxCount]);
DBG_88E("BW20_24G_Diff[%d] = %d\n", TxCount, pHalData->BW20_24G_Diff[TxCount]);
}
/* 2010/10/19 MH Add Regulator recognize for CU. */
@@ -1147,7 +781,6 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto
} else {
pHalData->EEPROMRegulatory = 0;
}
DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
}
void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
@@ -1161,7 +794,6 @@ void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoa
} else {
pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
}
DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
}
void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
@@ -1171,8 +803,6 @@ void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool Auto
hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
padapter->registrypriv.channel_plan,
RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
}
void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
@@ -1204,7 +834,6 @@ void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool
} else {
pHalData->AntDivCfg = 0;
}
DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
}
void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
@@ -1219,6 +848,4 @@ void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool Aut
if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail)
pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
}

150
drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
View File

@@ -8,25 +8,6 @@
#include "../include/rtw_iol.h"
#include "../include/rtl8188e_hal.h"
/*---------------------------Define Local Constant---------------------------*/
/* Channel switch:The size of command tables for switch channel*/
#define MAX_PRECMD_CNT 16
#define MAX_RFDEPENDCMD_CNT 16
#define MAX_POSTCMD_CNT 16
#define MAX_DOZE_WAITING_TIMES_9x 64
/*---------------------------Define Local Constant---------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define local variable------------------------------*/
/*--------------------Define export function prototype-----------------------*/
/* Please refer to header file */
/*--------------------Define export function prototype-----------------------*/
/*----------------------------Function Body----------------------------------*/
/* */
/* 1. BB register R/W API */
/* */
@@ -123,7 +104,6 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u3
*
* Input:
* struct adapter *Adapter,
* enum rf_radio_path eRFPath, Radio path of A/B/C/D
* u32 Offset, The target address to be read
*
* Output: None
@@ -138,13 +118,12 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u3
static u32
phy_RFSerialRead(
struct adapter *Adapter,
enum rf_radio_path eRFPath,
u32 Offset
)
{
u32 retValue = 0;
struct hal_data_8188e *pHalData = &Adapter->haldata;
struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath];
struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef;
u32 NewOffset;
u32 tmplong, tmplong2;
u8 RfPiEnable = 0;
@@ -162,10 +141,7 @@ phy_RFSerialRead(
/* For RF A/B write 0x824/82c(does not work in the future) */
/* We must use 0x824 for RF A and B to execute read trigger */
tmplong = rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord);
if (eRFPath == RF_PATH_A)
tmplong2 = tmplong;
else
tmplong2 = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord);
tmplong2 = tmplong;
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */
@@ -177,10 +153,7 @@ phy_RFSerialRead(
udelay(10);/* PlatformStallExecution(10); */
if (eRFPath == RF_PATH_A)
RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8));
else if (eRFPath == RF_PATH_B)
RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT(8));
RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8));
if (RfPiEnable) { /* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */
retValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData);
@@ -236,14 +209,13 @@ phy_RFSerialRead(
static void
phy_RFSerialWrite(
struct adapter *Adapter,
enum rf_radio_path eRFPath,
u32 Offset,
u32 Data
)
{
u32 DataAndAddr = 0;
struct hal_data_8188e *pHalData = &Adapter->haldata;
struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath];
struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef;
u32 NewOffset;
/* 2009/06/17 MH We can not execute IO for power save or other accident mode. */
@@ -273,7 +245,6 @@ phy_RFSerialWrite(
*
* Input:
* struct adapter *Adapter,
* enum rf_radio_path eRFPath, Radio path of A/B/C/D
* u32 RegAddr, The target address to be read
* u32 BitMask The target bit position in the target address
* to be read
@@ -282,12 +253,11 @@ phy_RFSerialWrite(
* Return: u32 Readback value
* Note: This function is equal to "GetRFRegSetting" in PHY programming guide
*/
u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask)
u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask)
{
u32 Original_Value, Readback_Value, BitShift;
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
Original_Value = phy_RFSerialRead(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Readback_Value = (Original_Value & BitMask) >> BitShift;
@@ -301,7 +271,6 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
*
* Input:
* struct adapter *Adapter,
* enum rf_radio_path eRFPath, Radio path of A/B/C/D
* u32 RegAddr, The target address to be modified
* u32 BitMask The target bit position in the target address
* to be modified
@@ -315,7 +284,6 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
void
rtl8188e_PHY_SetRFReg(
struct adapter *Adapter,
enum rf_radio_path eRFPath,
u32 RegAddr,
u32 BitMask,
u32 Data
@@ -325,12 +293,12 @@ rtl8188e_PHY_SetRFReg(
/* RF data is 12 bits only */
if (BitMask != bRFRegOffsetMask) {
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
Original_Value = phy_RFSerialRead(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
}
phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
phy_RFSerialWrite(Adapter, RegAddr, Data);
}
/* */
@@ -361,7 +329,7 @@ s32 PHY_MACConfig8188E(struct adapter *Adapter)
/* */
/* Config MAC */
/* */
if (HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv))
if (HAL_STATUS_FAILURE == ODM_ReadAndConfig_MAC_REG_8188E(&pHalData->odmpriv))
rtStatus = _FAIL;
/* 2010.07.13 AMPDU aggregation number B */
@@ -390,76 +358,58 @@ phy_InitBBRFRegisterDefinition(
struct hal_data_8188e *pHalData = &Adapter->haldata;
/* RF Interface Sowrtware Control */
pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */
pHalData->PHYRegDef.rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
/* RF Interface Readback Value */
pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; /* 16 LSBs if read 32-bit from 0x8E0 */
pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;/* 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) */
pHalData->PHYRegDef.rfintfi = rFPGA0_XAB_RFInterfaceRB; /* 16 LSBs if read 32-bit from 0x8E0 */
/* RF Interface Output (and Enable) */
pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x864 */
pHalData->PHYRegDef.rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
/* RF Interface (Output and) Enable */
pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */
pHalData->PHYRegDef.rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
/* Addr of LSSI. Wirte RF register by driver */
pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
pHalData->PHYRegDef.rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
/* RF parameter */
pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; /* BB Band Select */
pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
pHalData->PHYRegDef.rfLSSI_Select = rFPGA0_XAB_RFParameter; /* BB Band Select */
/* Tx AGC Gain Stage (same for all path. Should we remove this?) */
pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
pHalData->PHYRegDef.rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
/* Tranceiver A~D HSSI Parameter-1 */
pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1 */
pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; /* wire control parameter1 */
pHalData->PHYRegDef.rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1 */
/* Tranceiver A~D HSSI Parameter-2 */
pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */
pHalData->PHYRegDef.rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
/* RF switch Control */
pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; /* TR/Ant switch control */
pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
pHalData->PHYRegDef.rfSwitchControl = rFPGA0_XAB_SwitchControl; /* TR/Ant switch control */
/* AGC control 1 */
pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
pHalData->PHYRegDef.rfAGCControl1 = rOFDM0_XAAGCCore1;
/* AGC control 2 */
pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
pHalData->PHYRegDef.rfAGCControl2 = rOFDM0_XAAGCCore2;
/* RX AFE control 1 */
pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
pHalData->PHYRegDef.rfRxIQImbalance = rOFDM0_XARxIQImbalance;
/* RX AFE control 1 */
pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
pHalData->PHYRegDef.rfRxAFE = rOFDM0_XARxAFE;
/* Tx AFE control 1 */
pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
pHalData->PHYRegDef.rfTxIQImbalance = rOFDM0_XATxIQImbalance;
/* Tx AFE control 2 */
pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
pHalData->PHYRegDef.rfTxAFE = rOFDM0_XATxAFE;
/* Tranceiver LSSI Readback SI mode */
pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
pHalData->PHYRegDef.rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
/* Tranceiver LSSI Readback PI mode */
pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
pHalData->PHYRegDef.rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
}
void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data)
@@ -506,38 +456,25 @@ static int phy_BB8188E_Config_ParaFile(struct adapter *Adapter)
{
struct eeprom_priv *pEEPROM = &Adapter->eeprompriv;
struct hal_data_8188e *pHalData = &Adapter->haldata;
int rtStatus = _SUCCESS;
/* */
/* 1. Read PHY_REG.TXT BB INIT!! */
/* We will separate as 88C / 92C according to chip version */
/* */
if (HAL_STATUS_FAILURE == ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG))
rtStatus = _FAIL;
if (rtStatus != _SUCCESS)
goto phy_BB8190_Config_ParaFile_Fail;
if (HAL_STATUS_FAILURE == ODM_ReadAndConfig_PHY_REG_1T_8188E(&pHalData->odmpriv))
return _FAIL;
/* 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */
if (!pEEPROM->bautoload_fail_flag) {
pHalData->pwrGroupCnt = 0;
if (HAL_STATUS_FAILURE == ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG))
rtStatus = _FAIL;
ODM_ReadAndConfig_PHY_REG_PG_8188E(&pHalData->odmpriv);
}
if (rtStatus != _SUCCESS)
goto phy_BB8190_Config_ParaFile_Fail;
/* 3. BB AGC table Initialization */
if (HAL_STATUS_FAILURE == ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB))
rtStatus = _FAIL;
if (HAL_STATUS_FAILURE == ODM_ReadAndConfig_AGC_TAB_1T_8188E(&pHalData->odmpriv))
return _FAIL;
if (rtStatus != _SUCCESS)
goto phy_BB8190_Config_ParaFile_Fail;
phy_BB8190_Config_ParaFile_Fail:
return rtStatus;
return _SUCCESS;
}
int
@@ -600,17 +537,6 @@ static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8 *cckPower
BW40PowerLevel[RF_PATH_A] = pHalData->Index24G_BW40_Base[index];
}
static void phy_PowerIndexCheck88E(struct adapter *Adapter, u8 channel, u8 *cckPowerLevel,
u8 *ofdmPowerLevel, u8 *BW20PowerLevel, u8 *BW40PowerLevel)
{
struct hal_data_8188e *pHalData = &Adapter->haldata;
pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0];
pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0];
pHalData->CurrentBW2024GTxPwrIdx = BW20PowerLevel[0];
pHalData->CurrentBW4024GTxPwrIdx = BW40PowerLevel[0];
}
/*-----------------------------------------------------------------------------
* Function: SetTxPowerLevel8190()
*
@@ -641,8 +567,6 @@ PHY_SetTxPowerLevel8188E(
getTxPowerIndex88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0]);
phy_PowerIndexCheck88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0]);
rtl8188e_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]);
rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0], channel);
}
@@ -757,21 +681,17 @@ void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width Bandwidth
static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
{
u8 eRFPath = 0;
u32 param1, param2;
struct hal_data_8188e *pHalData = &Adapter->haldata;
if (Adapter->bNotifyChannelChange)
DBG_88E("[%s] ch = %d\n", __func__, channel);
/* s1. pre common command - CmdID_SetTxPowerLevel */
PHY_SetTxPowerLevel8188E(Adapter, channel);
/* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel */
param1 = RF_CHNLBW;
param2 = channel;
pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2);
rtl8188e_PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffffc00) | param2);
rtl8188e_PHY_SetRFReg(Adapter, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal);
}
void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)

24
drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
View File

@@ -50,12 +50,12 @@ void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
switch (Bandwidth) {
case HT_CHANNEL_WIDTH_20:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11));
rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffff3ff) | BIT(10) | BIT(11));
rtl8188e_PHY_SetRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
break;
case HT_CHANNEL_WIDTH_40:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10));
rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffff3ff) | BIT(10));
rtl8188e_PHY_SetRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
break;
default:
break;
@@ -99,9 +99,6 @@ rtl8188e_PHY_RF6052SetCckTxPower(
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1] << 8) |
(pPowerlevel[idx1] << 16) | (pPowerlevel[idx1] << 24);
/* 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. */
if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)
TxAGC[idx1] = 0x20;
}
} else {
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
@@ -203,7 +200,7 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
/* increase power diff defined by Realtek for regulatory */
if (pHalData->pwrGroupCnt == 1)
chnlGroup = 0;
if (pHalData->pwrGroupCnt >= pHalData->PGMaxGroup) {
if (pHalData->pwrGroupCnt >= MAX_PG_GROUP) {
if (Channel < 3) /* Channel 1-2 */
chnlGroup = 0;
else if (Channel < 6) /* Channel 3-5 */
@@ -374,12 +371,11 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
struct bb_reg_def *pPhyReg;
struct hal_data_8188e *pHalData = &Adapter->haldata;
u32 u4RegValue = 0;
u8 eRFPath = 0;
int rtStatus = _SUCCESS;
/* Initialize RF */
pPhyReg = &pHalData->PHYRegDef[eRFPath];
pPhyReg = &pHalData->PHYRegDef;
/*----Store original RFENV control type----*/
u4RegValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
@@ -400,18 +396,12 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
udelay(1);/* PlatformStallExecution(1); */
/*----Initialize RF fom connfiguration file----*/
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath))
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv))
rtStatus = _FAIL;
/*----Restore RFENV control type----*/;
rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
if (rtStatus != _SUCCESS)
goto phy_RF6052_Config_ParaFile_Fail;
return rtStatus;
phy_RF6052_Config_ParaFile_Fail:
return rtStatus;
}

78
drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c
View File

@@ -45,7 +45,7 @@ static void process_link_qual(struct adapter *padapter, struct recv_frame *prfra
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
}
void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe)
static void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe)
{
struct recv_frame *precvframe = (struct recv_frame *)prframe;
@@ -57,63 +57,47 @@ void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe)
void update_recvframe_attrib_88e(struct recv_frame *precvframe, struct recv_stat *prxstat)
{
struct rx_pkt_attrib *pattrib;
struct recv_stat report;
report.rxdw0 = prxstat->rxdw0;
report.rxdw1 = prxstat->rxdw1;
report.rxdw2 = prxstat->rxdw2;
report.rxdw3 = prxstat->rxdw3;
report.rxdw4 = prxstat->rxdw4;
report.rxdw5 = prxstat->rxdw5;
pattrib = &precvframe->attrib;
struct rx_pkt_attrib *pattrib = &precvframe->attrib;
memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
pattrib->crc_err = (u8)((le32_to_cpu(report.rxdw0) >> 14) & 0x1);/* u8)prxreport->crc32; */
pattrib->crc_err = (le32_to_cpu(prxstat->rxdw0) >> 14) & 0x1;
/* update rx report to recv_frame attribute */
pattrib->pkt_rpt_type = (u8)((le32_to_cpu(report.rxdw3) >> 14) & 0x3);/* prxreport->rpt_sel; */
pattrib->pkt_rpt_type = (le32_to_cpu(prxstat->rxdw3) >> 14) & 0x3;
if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */
pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */
pattrib->drvinfo_sz = (u8)((le32_to_cpu(report.rxdw0) >> 16) & 0xf) * 8;/* u8)(prxreport->drvinfosize << 3); */
if (pattrib->pkt_rpt_type == NORMAL_RX) {
pattrib->pkt_len = le32_to_cpu(prxstat->rxdw0) & 0x00003fff;
pattrib->drvinfo_sz = ((le32_to_cpu(prxstat->rxdw0) >> 16) & 0xf) * 8;
pattrib->physt = (u8)((le32_to_cpu(report.rxdw0) >> 26) & 0x1);/* u8)prxreport->physt; */
pattrib->physt = (le32_to_cpu(prxstat->rxdw0) >> 26) & 0x1;
pattrib->bdecrypted = (le32_to_cpu(report.rxdw0) & BIT(27)) ? 0 : 1;/* u8)(prxreport->swdec ? 0 : 1); */
pattrib->encrypt = (u8)((le32_to_cpu(report.rxdw0) >> 20) & 0x7);/* u8)prxreport->security; */
pattrib->bdecrypted = (le32_to_cpu(prxstat->rxdw0) & BIT(27)) ? 0 : 1;
pattrib->encrypt = (le32_to_cpu(prxstat->rxdw0) >> 20) & 0x7;
pattrib->qos = (u8)((le32_to_cpu(report.rxdw0) >> 23) & 0x1);/* u8)prxreport->qos; */
pattrib->priority = (u8)((le32_to_cpu(report.rxdw1) >> 8) & 0xf);/* u8)prxreport->tid; */
pattrib->qos = (le32_to_cpu(prxstat->rxdw0) >> 23) & 0x1;
pattrib->priority = (le32_to_cpu(prxstat->rxdw1) >> 8) & 0xf;
pattrib->amsdu = (u8)((le32_to_cpu(report.rxdw1) >> 13) & 0x1);/* u8)prxreport->amsdu; */
pattrib->amsdu = (le32_to_cpu(prxstat->rxdw1) >> 13) & 0x1;
pattrib->seq_num = (u16)(le32_to_cpu(report.rxdw2) & 0x00000fff);/* u16)prxreport->seq; */
pattrib->frag_num = (u8)((le32_to_cpu(report.rxdw2) >> 12) & 0xf);/* u8)prxreport->frag; */
pattrib->mfrag = (u8)((le32_to_cpu(report.rxdw1) >> 27) & 0x1);/* u8)prxreport->mf; */
pattrib->mdata = (u8)((le32_to_cpu(report.rxdw1) >> 26) & 0x1);/* u8)prxreport->md; */
pattrib->seq_num = le32_to_cpu(prxstat->rxdw2) & 0x00000fff;
pattrib->frag_num = (le32_to_cpu(prxstat->rxdw2) >> 12) & 0xf;
pattrib->mfrag = (le32_to_cpu(prxstat->rxdw1) >> 27) & 0x1;
pattrib->mdata = (le32_to_cpu(prxstat->rxdw1) >> 26) & 0x1;
pattrib->mcs_rate = (u8)(le32_to_cpu(report.rxdw3) & 0x3f);/* u8)prxreport->rxmcs; */
pattrib->rxht = (u8)((le32_to_cpu(report.rxdw3) >> 6) & 0x1);/* u8)prxreport->rxht; */
pattrib->mcs_rate = le32_to_cpu(prxstat->rxdw3) & 0x3f;
pattrib->rxht = (le32_to_cpu(prxstat->rxdw3) >> 6) & 0x1;
pattrib->icv_err = (u8)((le32_to_cpu(report.rxdw0) >> 15) & 0x1);/* u8)prxreport->icverr; */
pattrib->shift_sz = (u8)((le32_to_cpu(report.rxdw0) >> 24) & 0x3);
pattrib->icv_err = (le32_to_cpu(prxstat->rxdw0) >> 15) & 0x1;
pattrib->shift_sz = (le32_to_cpu(prxstat->rxdw0) >> 24) & 0x3;
} else if (pattrib->pkt_rpt_type == TX_REPORT1) { /* CCX */
pattrib->pkt_len = TX_RPT1_PKT_LEN;
pattrib->drvinfo_sz = 0;
} else if (pattrib->pkt_rpt_type == TX_REPORT2) { /* TX RPT */
pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x3FF);/* Rx length[9:0] */
pattrib->drvinfo_sz = 0;
} else if (pattrib->pkt_rpt_type == TX_REPORT2) {
pattrib->pkt_len = le32_to_cpu(prxstat->rxdw0) & 0x3FF;
/* */
/* Get TX report MAC ID valid. */
/* */
pattrib->MacIDValidEntry[0] = le32_to_cpu(report.rxdw4);
pattrib->MacIDValidEntry[1] = le32_to_cpu(report.rxdw5);
pattrib->MacIDValidEntry[0] = le32_to_cpu(prxstat->rxdw4);
pattrib->MacIDValidEntry[1] = le32_to_cpu(prxstat->rxdw5);
} else if (pattrib->pkt_rpt_type == HIS_REPORT) { /* USB HISR RPT */
pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */
} else if (pattrib->pkt_rpt_type == HIS_REPORT) {
pattrib->pkt_len = le32_to_cpu(prxstat->rxdw0) & 0x00003fff;
}
}
@@ -128,18 +112,12 @@ void update_recvframe_phyinfo_88e(struct recv_frame *precvframe, struct phy_stat
struct rx_pkt_attrib *pattrib = &precvframe->attrib;
struct hal_data_8188e *pHalData = &padapter->haldata;
struct phy_info *pPHYInfo = &pattrib->phy_info;
u8 *wlanhdr;
u8 *wlanhdr = precvframe->rx_data;
struct odm_per_pkt_info pkt_info;
u8 *sa = NULL;
struct sta_priv *pstapriv;
struct sta_info *psta;
pkt_info.bPacketMatchBSSID = false;
pkt_info.bPacketToSelf = false;
pkt_info.bPacketBeacon = false;
wlanhdr = get_recvframe_data(precvframe);
pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) &&
!pattrib->icv_err && !pattrib->crc_err &&
!memcmp(get_hdr_bssid(wlanhdr),

26
drivers/staging/r8188eu/hal/rtl8188eu_recv.c
View File

@@ -12,22 +12,6 @@
#include "../include/rtl8188e_hal.h"
void rtl8188eu_init_recvbuf(struct recv_buf *precvbuf)
{
precvbuf->transfer_len = 0;
precvbuf->len = 0;
precvbuf->ref_cnt = 0;
if (precvbuf->pbuf) {
precvbuf->pdata = precvbuf->pbuf;
precvbuf->phead = precvbuf->pbuf;
precvbuf->ptail = precvbuf->pbuf;
precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
}
}
int rtl8188eu_init_recv_priv(struct adapter *padapter)
{
struct recv_priv *precvpriv = &padapter->recvpriv;
@@ -47,20 +31,15 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter)
res = _FAIL;
goto exit;
}
memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF * sizeof(struct recv_buf) + 4);
precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((size_t)(precvpriv->pallocated_recv_buf), 4);
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
INIT_LIST_HEAD(&precvbuf->list);
spin_lock_init(&precvbuf->recvbuf_lock);
precvbuf->alloc_sz = MAX_RECVBUF_SZ;
res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
if (res == _FAIL)
break;
precvbuf->ref_cnt = 0;
precvbuf->adapter = padapter;
precvbuf++;
}
@@ -106,12 +85,7 @@ void rtl8188eu_free_recv_priv(struct adapter *padapter)
kfree(precvpriv->pallocated_recv_buf);
if (skb_queue_len(&precvpriv->rx_skb_queue))
DBG_88E(KERN_WARNING "rx_skb_queue not empty\n");
skb_queue_purge(&precvpriv->rx_skb_queue);
if (skb_queue_len(&precvpriv->free_recv_skb_queue))
DBG_88E(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
skb_queue_purge(&precvpriv->free_recv_skb_queue);
}

22
drivers/staging/r8188eu/hal/rtl8188eu_xmit.c
View File

@@ -264,11 +264,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
ptxdesc->txdw5 |= cpu_to_le32(0x00300000);/* retry limit = 12 */
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
} else if ((pxmitframe->frame_tag & 0x0f) == TXAGG_FRAMETAG) {
DBG_88E("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
} else {
DBG_88E("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
} else if ((pxmitframe->frame_tag & 0x0f) != TXAGG_FRAMETAG) {
/* offset 4 */
ptxdesc->txdw1 |= cpu_to_le32((4) & 0x3f);/* CAM_ID(MAC_ID) */
@@ -380,9 +376,9 @@ static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
return len;
}
s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
bool rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
{
struct hal_data_8188e *haldata = &adapt->haldata;
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
struct xmit_frame *pxmitframe = NULL;
struct xmit_frame *pfirstframe = NULL;
@@ -396,13 +392,18 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
u32 pbuf_tail; /* last pkt tail */
u32 len; /* packet length, except TXDESC_SIZE and PKT_OFFSET */
u32 bulksize = haldata->UsbBulkOutSize;
u32 bulksize;
u8 desc_cnt;
u32 bulkptr;
/* dump frame variable */
u32 ff_hwaddr;
if (pdvobjpriv->pusbdev->speed == USB_SPEED_HIGH)
bulksize = USB_HIGH_SPEED_BULK_SIZE;
else
bulksize = USB_FULL_SPEED_BULK_SIZE;
/* check xmitbuffer is ok */
if (!pxmitbuf) {
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
@@ -518,7 +519,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
if (pbuf < bulkptr) {
desc_cnt++;
if (desc_cnt == haldata->UsbTxAggDescNum)
if (desc_cnt == USB_TXAGG_DESC_NUM)
break;
} else {
desc_cnt = 0;
@@ -567,8 +568,7 @@ static s32 xmitframe_direct(struct adapter *adapt, struct xmit_frame *pxmitframe
res = rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
if (res == _SUCCESS)
rtw_dump_xframe(adapt, pxmitframe);
else
DBG_88E("==> %s xmitframe_coalsece failed\n", __func__);
return res;
}

432
drivers/staging/r8188eu/hal/usb_halinit.c
View File

@@ -6,17 +6,13 @@
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/rtw_efuse.h"
#include "../include/rtw_fw.h"
#include "../include/rtl8188e_hal.h"
#include "../include/rtw_iol.h"
#include "../include/usb_ops.h"
#include "../include/usb_osintf.h"
#include "../include/Hal8188EPwrSeq.h"
#define HAL_MAC_ENABLE 1
#define HAL_BB_ENABLE 1
#define HAL_RF_ENABLE 1
static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
{
struct hal_data_8188e *haldata = &adapt->haldata;
@@ -37,7 +33,6 @@ static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
default:
break;
}
DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
}
static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumOutPipe)
@@ -49,22 +44,7 @@ static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumOutPi
void rtl8188eu_interface_configure(struct adapter *adapt)
{
struct hal_data_8188e *haldata = &adapt->haldata;
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
if (pdvobjpriv->ishighspeed)
haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
else
haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
haldata->UsbTxAggMode = 1;
haldata->UsbTxAggDescNum = 0x6; /* only 4 bits */
haldata->UsbRxAggMode = USB_RX_AGG_DMA;/* USB_RX_AGG_DMA; */
haldata->UsbRxAggBlockCount = 8; /* unit : 512b */
haldata->UsbRxAggBlockTimeout = 0x6;
haldata->UsbRxAggPageCount = 48; /* uint :128 b 0x0A; 10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
haldata->UsbRxAggPageTimeout = 0x4; /* 6, absolute time = 34ms/(2^6) */
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
HalUsbSetQueuePipeMapping8188EUsb(adapt, pdvobjpriv->RtNumOutPipes);
}
@@ -77,10 +57,8 @@ u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
if (haldata->bMacPwrCtrlOn)
return _SUCCESS;
if (!HalPwrSeqCmdParsing(adapt, Rtl8188E_NIC_PWR_ON_FLOW)) {
DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
if (!HalPwrSeqCmdParsing(adapt, Rtl8188E_NIC_PWR_ON_FLOW))
return _FAIL;
}
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
/* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
@@ -118,10 +96,10 @@ static void _InitInterrupt(struct adapter *Adapter)
/* 1; Use bulk endpoint to upload interrupt pkt, */
usb_opt = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
if (!adapter_to_dvobj(Adapter)->ishighspeed)
usb_opt = usb_opt & (~INT_BULK_SEL);
else
if (adapter_to_dvobj(Adapter)->pusbdev->speed == USB_SPEED_HIGH)
usb_opt = usb_opt | (INT_BULK_SEL);
else
usb_opt = usb_opt & (~INT_BULK_SEL);
rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
}
@@ -328,15 +306,13 @@ static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
static void _InitWMACSetting(struct adapter *Adapter)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
RCR_CBSSID_DATA | RCR_CBSSID_BCN |
RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
RCR_APP_MIC | RCR_APP_PHYSTS;
u32 receive_config = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
RCR_CBSSID_DATA | RCR_CBSSID_BCN |
RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
RCR_APP_MIC | RCR_APP_PHYSTS;
/* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
rtw_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
rtw_write32(Adapter, REG_RCR, receive_config);
/* Accept all multicast address */
rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF);
@@ -413,20 +389,17 @@ static void _InitRetryFunction(struct adapter *Adapter)
*---------------------------------------------------------------------------*/
static void usb_AggSettingTxUpdate(struct adapter *Adapter)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
u32 value32;
if (Adapter->registrypriv.wifi_spec)
haldata->UsbTxAggMode = false;
return;
if (haldata->UsbTxAggMode) {
value32 = rtw_read32(Adapter, REG_TDECTRL);
value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
value32 = rtw_read32(Adapter, REG_TDECTRL);
value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
value32 |= ((USB_TXAGG_DESC_NUM & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
rtw_write32(Adapter, REG_TDECTRL, value32);
}
} /* usb_AggSettingTxUpdate */
rtw_write32(Adapter, REG_TDECTRL, value32);
}
/*-----------------------------------------------------------------------------
* Function: usb_AggSettingRxUpdate()
@@ -448,57 +421,21 @@ usb_AggSettingRxUpdate(
struct adapter *Adapter
)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
u8 valueDMA;
u8 valueUSB;
valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL);
valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
switch (haldata->UsbRxAggMode) {
case USB_RX_AGG_DMA:
valueDMA |= RXDMA_AGG_EN;
valueUSB &= ~USB_AGG_EN;
break;
case USB_RX_AGG_USB:
valueDMA &= ~RXDMA_AGG_EN;
valueUSB |= USB_AGG_EN;
break;
case USB_RX_AGG_MIX:
valueDMA |= RXDMA_AGG_EN;
valueUSB |= USB_AGG_EN;
break;
case USB_RX_AGG_DISABLE:
default:
valueDMA &= ~RXDMA_AGG_EN;
valueUSB &= ~USB_AGG_EN;
break;
}
valueDMA |= RXDMA_AGG_EN;
valueUSB &= ~USB_AGG_EN;
rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
switch (haldata->UsbRxAggMode) {
case USB_RX_AGG_DMA:
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, haldata->UsbRxAggPageTimeout);
break;
case USB_RX_AGG_USB:
rtw_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
rtw_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
break;
case USB_RX_AGG_MIX:
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
rtw_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
rtw_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
break;
case USB_RX_AGG_DISABLE:
default:
/* TODO: */
break;
}
} /* usb_AggSettingRxUpdate */
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, USB_RXAGG_PAGE_COUNT);
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, USB_RXAGG_PAGE_TIMEOUT);
}
static void InitUsbAggregationSetting(struct adapter *Adapter)
{
@@ -509,10 +446,6 @@ static void InitUsbAggregationSetting(struct adapter *Adapter)
usb_AggSettingRxUpdate(Adapter);
}
static void _InitOperationMode(struct adapter *Adapter)
{
}
static void _InitBeaconParameters(struct adapter *Adapter)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
@@ -548,18 +481,12 @@ static void _BBTurnOnBlock(struct adapter *Adapter)
rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
}
enum {
Antenna_Lfet = 1,
Antenna_Right = 2,
};
static void _InitAntenna_Selection(struct adapter *Adapter)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
if (haldata->AntDivCfg == 0)
return;
DBG_88E("==> %s ....\n", __func__);
rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0) | BIT(23));
rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
@@ -568,7 +495,17 @@ static void _InitAntenna_Selection(struct adapter *Adapter)
haldata->CurAntenna = Antenna_A;
else
haldata->CurAntenna = Antenna_B;
DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
}
static void hw_var_set_macaddr(struct adapter *Adapter, u8 *val)
{
u8 idx = 0;
u32 reg_macid;
reg_macid = REG_MACID;
for (idx = 0; idx < 6; idx++)
rtw_write8(Adapter, (reg_macid + idx), val[idx]);
}
u32 rtl8188eu_hal_init(struct adapter *Adapter)
@@ -580,7 +517,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter)
struct hal_data_8188e *haldata = &Adapter->haldata;
struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
struct registry_priv *pregistrypriv = &Adapter->registrypriv;
u32 init_start_time = jiffies;
if (Adapter->pwrctrlpriv.bkeepfwalive) {
if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
@@ -625,10 +561,9 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter)
_InitTxBufferBoundary(Adapter, 0);
status = rtl8188e_FirmwareDownload(Adapter);
status = rtl8188e_firmware_download(Adapter);
if (status != _SUCCESS) {
DBG_88E("%s: Download Firmware failed!!\n", __func__);
Adapter->bFWReady = false;
haldata->fw_ractrl = false;
return status;
@@ -636,40 +571,28 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter)
Adapter->bFWReady = true;
haldata->fw_ractrl = false;
}
rtl8188e_InitializeFirmwareVars(Adapter);
/* Initialize firmware vars */
Adapter->pwrctrlpriv.bFwCurrentInPSMode = false;
haldata->LastHMEBoxNum = 0;
#if (HAL_MAC_ENABLE == 1)
status = PHY_MACConfig8188E(Adapter);
if (status == _FAIL) {
DBG_88E(" ### Failed to init MAC ......\n ");
if (status == _FAIL)
goto exit;
}
#endif
/* */
/* d. Initialize BB related configurations. */
/* */
#if (HAL_BB_ENABLE == 1)
status = PHY_BBConfig8188E(Adapter);
if (status == _FAIL) {
DBG_88E(" ### Failed to init BB ......\n ");
if (status == _FAIL)
goto exit;
}
#endif
#if (HAL_RF_ENABLE == 1)
status = PHY_RFConfig8188E(Adapter);
if (status == _FAIL) {
DBG_88E(" ### Failed to init RF ......\n ");
if (status == _FAIL)
goto exit;
}
#endif
status = rtl8188e_iol_efuse_patch(Adapter);
if (status == _FAIL) {
DBG_88E("%s rtl8188e_iol_efuse_patch failed\n", __func__);
if (status == _FAIL)
goto exit;
}
_InitTxBufferBoundary(Adapter, txpktbuf_bndy);
@@ -681,14 +604,13 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter)
_InitDriverInfoSize(Adapter, DRVINFO_SZ);
_InitInterrupt(Adapter);
hal_init_macaddr(Adapter);/* set mac_address */
hw_var_set_macaddr(Adapter, Adapter->eeprompriv.mac_addr);
_InitNetworkType(Adapter);/* set msr */
_InitWMACSetting(Adapter);
_InitAdaptiveCtrl(Adapter);
_InitEDCA(Adapter);
_InitRetryFunction(Adapter);
InitUsbAggregationSetting(Adapter);
_InitOperationMode(Adapter);/* todo */
_InitBeaconParameters(Adapter);
/* */
@@ -715,8 +637,7 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter)
rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
/* Keep RfRegChnlVal for later use. */
haldata->RfRegChnlVal[0] = rtl8188e_PHY_QueryRFReg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
haldata->RfRegChnlVal[1] = rtl8188e_PHY_QueryRFReg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
haldata->RfRegChnlVal = rtl8188e_PHY_QueryRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask);
_BBTurnOnBlock(Adapter);
@@ -790,8 +711,6 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter)
rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
exit:
DBG_88E("%s in %dms\n", __func__, rtw_get_passing_time_ms(init_start_time));
return status;
}
@@ -853,13 +772,9 @@ static void CardDisableRTL8188EU(struct adapter *Adapter)
u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
{
DBG_88E("==> %s\n", __func__);
rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
rtw_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
if (!Adapter->pwrctrlpriv.bkeepfwalive) {
if (Adapter->hw_init_completed) {
CardDisableRTL8188EU(Adapter);
@@ -920,17 +835,11 @@ void ReadAdapterInfo8188EU(struct adapter *Adapter)
struct led_priv *ledpriv = &Adapter->ledpriv;
u8 eeValue;
/* Read EEPROM size before call any EEPROM function */
Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter);
/* check system boot selection */
eeValue = rtw_read8(Adapter, REG_9346CR);
eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM);
eeprom->bautoload_fail_flag = !(eeValue & EEPROM_EN);
DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
(eeprom->bautoload_fail_flag ? "Fail" : "OK"));
if (!is_boot_from_eeprom(Adapter))
EFUSE_ShadowMapUpdate(Adapter);
@@ -978,7 +887,7 @@ static void StopTxBeacon(struct adapter *adapt)
/* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */
}
static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
static void hw_var_set_opmode(struct adapter *Adapter, u8 *val)
{
u8 val8;
u8 mode = *((u8 *)val);
@@ -991,8 +900,6 @@ static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
val8 |= mode;
rtw_write8(Adapter, MSR, val8);
DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
StopTxBeacon(Adapter);
@@ -1035,18 +942,7 @@ static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
}
}
static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
{
u8 idx = 0;
u32 reg_macid;
reg_macid = REG_MACID;
for (idx = 0; idx < 6; idx++)
rtw_write8(Adapter, (reg_macid + idx), val[idx]);
}
static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
static void hw_var_set_bssid(struct adapter *Adapter, u8 *val)
{
u8 idx = 0;
u32 reg_bssid;
@@ -1057,18 +953,6 @@ static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
rtw_write8(Adapter, (reg_bssid + idx), val[idx]);
}
static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
{
u32 bcn_ctrl_reg;
bcn_ctrl_reg = REG_BCN_CTRL;
if (*((u8 *)val))
rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
else
rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg) & (~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
}
void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
@@ -1076,32 +960,11 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
struct odm_dm_struct *podmpriv = &haldata->odmpriv;
switch (variable) {
case HW_VAR_MEDIA_STATUS:
{
u8 val8;
val8 = rtw_read8(Adapter, MSR) & 0x0c;
val8 |= *((u8 *)val);
rtw_write8(Adapter, MSR, val8);
}
break;
case HW_VAR_MEDIA_STATUS1:
{
u8 val8;
val8 = rtw_read8(Adapter, MSR) & 0x03;
val8 |= *((u8 *)val) << 2;
rtw_write8(Adapter, MSR, val8);
}
break;
case HW_VAR_SET_OPMODE:
hw_var_set_opmode(Adapter, variable, val);
break;
case HW_VAR_MAC_ADDR:
hw_var_set_macaddr(Adapter, variable, val);
hw_var_set_opmode(Adapter, val);
break;
case HW_VAR_BSSID:
hw_var_set_bssid(Adapter, variable, val);
hw_var_set_bssid(Adapter, val);
break;
case HW_VAR_BASIC_RATE:
{
@@ -1113,7 +976,6 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
/* For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
/* We do not use other rates. */
HalSetBrateCfg(Adapter, val, &BrateCfg);
DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
/* 2011.03.30 add by Luke Lee */
/* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
@@ -1121,7 +983,6 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
/* CCK 5.5M & 11M ACK should be enabled for better performance */
BrateCfg = (BrateCfg | 0xd) & 0x15d;
haldata->BasicRateSet = BrateCfg;
BrateCfg |= 0x01; /* default enable 1M ACK rate */
/* Set RRSR rate table. */
@@ -1138,12 +999,6 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
}
break;
case HW_VAR_TXPAUSE:
rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
break;
case HW_VAR_BCN_FUNC:
hw_var_set_bcn_func(Adapter, variable, val);
break;
case HW_VAR_CORRECT_TSF:
{
u64 tsf;
@@ -1169,19 +1024,6 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
ResumeTxBeacon(Adapter);
}
break;
case HW_VAR_CHECK_BSSID:
if (*((u8 *)val)) {
rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
} else {
u32 val32;
val32 = rtw_read32(Adapter, REG_RCR);
val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
rtw_write32(Adapter, REG_RCR, val32);
}
break;
case HW_VAR_MLME_DISCONNECT:
/* Set RCR to not to receive data frame when NO LINK state */
/* reject all data frames */
@@ -1220,17 +1062,7 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
/* enable update TSF */
rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) & (~BIT(4)));
}
if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) | RCR_CBSSID_BCN);
} else {
if (Adapter->in_cta_test) {
u32 v = rtw_read32(Adapter, REG_RCR);
v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */
rtw_write32(Adapter, REG_RCR, v);
} else {
rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) | RCR_CBSSID_BCN);
}
}
rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) | RCR_CBSSID_BCN);
}
break;
case HW_VAR_MLME_JOIN:
@@ -1243,13 +1075,7 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
/* enable to rx data frame.Accept all data frame */
rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
if (Adapter->in_cta_test) {
u32 v = rtw_read32(Adapter, REG_RCR);
v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */
rtw_write32(Adapter, REG_RCR, v);
} else {
rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
}
rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
RetryLimit = 48;
@@ -1269,9 +1095,6 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
}
break;
case HW_VAR_BEACON_INTERVAL:
rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
break;
case HW_VAR_SLOT_TIME:
{
u8 u1bAIFS, aSifsTime;
@@ -1316,9 +1139,6 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
rtw_write8(Adapter, REG_RRSR + 2, regTmp);
}
break;
case HW_VAR_SEC_CFG:
rtw_write8(Adapter, REG_SECCFG, *((u8 *)val));
break;
case HW_VAR_DM_FLAG:
podmpriv->SupportAbility = *((u8 *)val);
break;
@@ -1338,55 +1158,10 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
case HW_VAR_DM_FUNC_CLR:
podmpriv->SupportAbility &= *((u32 *)val);
break;
case HW_VAR_CAM_EMPTY_ENTRY:
{
u8 ucIndex = *((u8 *)val);
u8 i;
u32 ulCommand = 0;
u32 ulContent = 0;
u32 ulEncAlgo = CAM_AES;
for (i = 0; i < CAM_CONTENT_COUNT; i++) {
/* filled id in CAM config 2 byte */
if (i == 0)
ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo) << 2);
else
ulContent = 0;
/* polling bit, and No Write enable, and address */
ulCommand = CAM_CONTENT_COUNT * ucIndex + i;
ulCommand = ulCommand | CAM_POLLINIG | CAM_WRITE;
/* write content 0 is equall to mark invalid */
rtw_write32(Adapter, WCAMI, ulContent); /* delay_ms(40); */
rtw_write32(Adapter, RWCAM, ulCommand); /* delay_ms(40); */
}
}
break;
case HW_VAR_CAM_INVALID_ALL:
rtw_write32(Adapter, RWCAM, BIT(31) | BIT(30));
break;
case HW_VAR_CAM_WRITE:
{
u32 cmd;
u32 *cam_val = (u32 *)val;
rtw_write32(Adapter, WCAMI, cam_val[0]);
cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
rtw_write32(Adapter, RWCAM, cmd);
}
break;
case HW_VAR_AC_PARAM_VO:
rtw_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
break;
case HW_VAR_AC_PARAM_VI:
rtw_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
break;
case HW_VAR_AC_PARAM_BE:
haldata->AcParam_BE = ((u32 *)(val))[0];
rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
break;
case HW_VAR_AC_PARAM_BK:
rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
break;
case HW_VAR_ACM_CTRL:
{
u8 acm_ctrl = *((u8 *)val);
@@ -1410,7 +1185,6 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
else
AcmCtrl &= (~AcmHw_BeqEn);
DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
}
break;
@@ -1472,7 +1246,7 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
{
u8 threshold = *((u8 *)val);
if (threshold == 0)
threshold = haldata->UsbRxAggPageCount;
threshold = USB_RXAGG_PAGE_COUNT;
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
}
break;
@@ -1531,9 +1305,6 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
}
}
break;
case HW_VAR_EFUSE_BYTES: /* To set EFUE total used bytes, added by Roger, 2008.12.22. */
haldata->EfuseUsedBytes = *((u16 *)val);
break;
case HW_VAR_FIFO_CLEARN_UP:
{
struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
@@ -1552,8 +1323,6 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
if (!(rtw_read32(Adapter, REG_RXPKT_NUM) & RXDMA_IDLE))
break;
} while (trycnt--);
if (trycnt == 0)
DBG_88E("Stop RX DMA failed......\n");
/* RQPN Load 0 */
rtw_write16(Adapter, REG_RQPN_NPQ, 0x0);
@@ -1562,14 +1331,9 @@ void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
}
}
break;
case HW_VAR_APFM_ON_MAC:
haldata->bMacPwrCtrlOn = *val;
DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
break;
case HW_VAR_TX_RPT_MAX_MACID:
{
u8 maxMacid = *val;
DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid + 1);
rtw_write8(Adapter, REG_TX_RPT_CTRL + 1, maxMacid + 1);
}
break;
@@ -1592,12 +1356,6 @@ void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
struct odm_dm_struct *podmpriv = &haldata->odmpriv;
switch (variable) {
case HW_VAR_BASIC_RATE:
*((u16 *)(val)) = haldata->BasicRateSet;
fallthrough;
case HW_VAR_TXPAUSE:
val[0] = rtw_read8(Adapter, REG_TXPAUSE);
break;
case HW_VAR_BCN_VALID:
/* BCN_VALID, BIT(16) of REG_TDECTRL = BIT(0) of REG_TDECTRL+2 */
val[0] = (BIT(0) & rtw_read8(Adapter, REG_TDECTRL + 2)) ? true : false;
@@ -1623,15 +1381,6 @@ void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
}
}
break;
case HW_VAR_CURRENT_ANTENNA:
val[0] = haldata->CurAntenna;
break;
case HW_VAR_EFUSE_BYTES: /* To get EFUE total used bytes, added by Roger, 2008.12.22. */
*((u16 *)(val)) = haldata->EfuseUsedBytes;
break;
case HW_VAR_APFM_ON_MAC:
*val = haldata->bMacPwrCtrlOn;
break;
case HW_VAR_CHK_HI_QUEUE_EMPTY:
*val = ((rtw_read32(Adapter, REG_HGQ_INFORMATION) & 0x0000ff00) == 0) ? true : false;
break;
@@ -1642,76 +1391,20 @@ void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
}
/* Query setting of specified variable. */
u8 GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
void GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
u8 bResult = _SUCCESS;
switch (eVariable) {
case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
{
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
struct sta_priv *pstapriv = &Adapter->stapriv;
struct sta_info *psta;
psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
if (psta)
*((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
}
break;
case HAL_DEF_IS_SUPPORT_ANT_DIV:
*((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
break;
case HAL_DEF_CURRENT_ANTENNA:
*((u8 *)pValue) = haldata->CurAntenna;
break;
case HAL_DEF_DRVINFO_SZ:
*((u32 *)pValue) = DRVINFO_SZ;
break;
case HAL_DEF_MAX_RECVBUF_SZ:
*((u32 *)pValue) = MAX_RECVBUF_SZ;
break;
case HAL_DEF_RX_PACKET_OFFSET:
*((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
break;
case HAL_DEF_DBG_DM_FUNC:
*((u32 *)pValue) = haldata->odmpriv.SupportAbility;
break;
case HAL_DEF_RA_DECISION_RATE:
{
u8 MacID = *((u8 *)pValue);
*((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&haldata->odmpriv, MacID);
}
break;
case HAL_DEF_RA_SGI:
{
u8 MacID = *((u8 *)pValue);
*((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&haldata->odmpriv, MacID);
}
break;
case HAL_DEF_PT_PWR_STATUS:
{
u8 MacID = *((u8 *)pValue);
*((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&haldata->odmpriv, MacID);
}
break;
case HW_VAR_MAX_RX_AMPDU_FACTOR:
*((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
break;
case HW_DEF_RA_INFO_DUMP:
{
u8 entry_id = *((u8 *)pValue);
if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
DBG_88E("============ RA status check ===================\n");
DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
entry_id,
haldata->odmpriv.RAInfo[entry_id].RateID,
haldata->odmpriv.RAInfo[entry_id].RAUseRate,
haldata->odmpriv.RAInfo[entry_id].RateSGI,
haldata->odmpriv.RAInfo[entry_id].DecisionRate,
haldata->odmpriv.RAInfo[entry_id].PTStage);
}
}
break;
case HAL_DEF_DBG_DUMP_RXPKT:
*((u8 *)pValue) = haldata->bDumpRxPkt;
break;
@@ -1719,18 +1412,14 @@ u8 GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable
*((u8 *)pValue) = haldata->bDumpTxPkt;
break;
default:
bResult = _FAIL;
break;
}
return bResult;
}
/* Change default setting of specified variable. */
u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
void SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
{
struct hal_data_8188e *haldata = &Adapter->haldata;
u8 bResult = _SUCCESS;
switch (eVariable) {
case HAL_DEF_DBG_DM_FUNC:
@@ -1740,15 +1429,12 @@ u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable
if (dm_func == 0) { /* disable all dynamic func */
podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE;
DBG_88E("==> Disable all dynamic function...\n");
} else if (dm_func == 1) {/* disable DIG */
podmpriv->SupportAbility &= (~DYNAMIC_BB_DIG);
DBG_88E("==> Disable DIG...\n");
} else if (dm_func == 2) {/* disable High power */
podmpriv->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
} else if (dm_func == 3) {/* disable tx power tracking */
podmpriv->SupportAbility &= (~DYNAMIC_RF_CALIBRATION);
DBG_88E("==> Disable tx power tracking...\n");
} else if (dm_func == 5) {/* disable antenna diversity */
podmpriv->SupportAbility &= (~DYNAMIC_BB_ANT_DIV);
} else if (dm_func == 6) {/* turn on all dynamic func */
@@ -1757,7 +1443,6 @@ u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable
pDigTable->CurIGValue = rtw_read8(Adapter, 0xc50);
}
podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
DBG_88E("==> Turn on all dynamic function...\n");
}
}
break;
@@ -1768,11 +1453,8 @@ u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable
haldata->bDumpTxPkt = *((u8 *)pValue);
break;
default:
bResult = _FAIL;
break;
}
return bResult;
}
void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
@@ -1824,22 +1506,13 @@ void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
rate_bitmap = 0x0fffffff;
rate_bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, mac_id, mask, rssi_level);
DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
__func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
mask &= rate_bitmap;
init_rate = get_highest_rate_idx(mask) & 0x3f;
if (haldata->fw_ractrl) {
u8 arg;
arg = mac_id & 0x1f;/* MACID */
arg |= BIT(7);
if (shortGIrate)
arg |= BIT(5);
mask |= ((raid << 28) & 0xf0000000);
DBG_88E("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg);
psta->ra_mask = mask;
mask |= ((raid << 28) & 0xf0000000);
@@ -1909,7 +1582,6 @@ void rtl8188eu_init_default_value(struct adapter *adapt)
haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
haldata->pwrGroupCnt = 0;
haldata->PGMaxGroup = 13;
haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
for (i = 0; i < HP_THERMAL_NUM; i++)
haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;

60
drivers/staging/r8188eu/hal/usb_ops_linux.c
View File

@@ -209,10 +209,8 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
prxstat = (struct recv_stat *)pbuf;
precvframe = rtw_alloc_recvframe(pfree_recv_queue);
if (!precvframe) {
DBG_88E("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __func__, __LINE__);
if (!precvframe)
goto _exit_recvbuf2recvframe;
}
INIT_LIST_HEAD(&precvframe->list);
precvframe->precvbuf = NULL; /* can't access the precvbuf for new arch. */
@@ -223,8 +221,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
pattrib = &precvframe->attrib;
if ((pattrib->crc_err) || (pattrib->icv_err)) {
DBG_88E("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __func__, pattrib->crc_err, pattrib->icv_err);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
@@ -235,7 +231,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) {
DBG_88E("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len\n", __func__, __LINE__);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
@@ -276,7 +271,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
precvframe->rx_data = pkt_copy->data;
} else {
if ((pattrib->mfrag == 1) && (pattrib->frag_num == 0)) {
DBG_88E("recvbuf2recvframe: alloc_skb fail , drop frag frame\n");
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
@@ -287,7 +281,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
precvframe->rx_data = precvframe->rx_tail;
precvframe->rx_end = pbuf + pattrib->drvinfo_sz + RXDESC_SIZE + alloc_sz;
} else {
DBG_88E("recvbuf2recvframe: skb_clone fail\n");
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
@@ -295,18 +288,8 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
recvframe_put(precvframe, skb_len);
switch (haldata->UsbRxAggMode) {
case USB_RX_AGG_DMA:
case USB_RX_AGG_MIX:
pkt_offset = (u16)_RND128(pkt_offset);
break;
case USB_RX_AGG_USB:
pkt_offset = (u16)_RND4(pkt_offset);
break;
case USB_RX_AGG_DISABLE:
default:
break;
}
pkt_offset = (u16)_RND128(pkt_offset);
if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */
if (pattrib->physt)
update_recvframe_phyinfo_88e(precvframe, (struct phy_stat *)pphy_status);
@@ -351,7 +334,6 @@ void rtl8188eu_recv_tasklet(unsigned long priv)
while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) {
if ((adapt->bDriverStopped) || (adapt->bSurpriseRemoved)) {
DBG_88E("recv_tasklet => bDriverStopped or bSurpriseRemoved\n");
dev_kfree_skb_any(pskb);
break;
}
@@ -372,9 +354,6 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
if (adapt->bSurpriseRemoved || adapt->bDriverStopped || adapt->bReadPortCancel) {
precvbuf->reuse = true;
DBG_88E("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n",
__func__, adapt->bDriverStopped,
adapt->bSurpriseRemoved, adapt->bReadPortCancel);
return;
}
@@ -382,11 +361,9 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) {
precvbuf->reuse = true;
rtw_read_port(adapt, (unsigned char *)precvbuf);
DBG_88E("%s()-%d: RX Warning!\n", __func__, __LINE__);
} else {
rtw_reset_continual_urb_error(adapter_to_dvobj(adapt));
precvbuf->transfer_len = purb->actual_length;
skb_put(precvbuf->pskb, purb->actual_length);
skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb);
@@ -398,7 +375,6 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
rtw_read_port(adapt, (unsigned char *)precvbuf);
}
} else {
DBG_88E("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
skb_put(precvbuf->pskb, purb->actual_length);
precvbuf->pskb = NULL;
@@ -419,7 +395,6 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
rtw_read_port(adapt, (unsigned char *)precvbuf);
break;
case -EINPROGRESS:
DBG_88E("ERROR: URB IS IN PROGRESS!/n");
break;
default:
break;
@@ -453,32 +428,16 @@ u32 rtw_read_port(struct adapter *adapter, u8 *rmem)
precvbuf->reuse = true;
}
rtl8188eu_init_recvbuf(precvbuf);
/* re-assign for linux based on skb */
if (!precvbuf->reuse || !precvbuf->pskb) {
precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
if (!precvbuf->pskb) {
DBG_88E("#### usb_read_port() alloc_skb fail!#####\n");
if (!precvbuf->pskb)
return _FAIL;
}
tmpaddr = (size_t)precvbuf->pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1);
skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
} else { /* reuse skb */
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
precvbuf->reuse = false;
}
@@ -490,17 +449,14 @@ u32 rtw_read_port(struct adapter *adapter, u8 *rmem)
pipe = usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe);
usb_fill_bulk_urb(purb, pusbd, pipe,
precvbuf->pbuf,
precvbuf->pskb->data,
MAX_RECVBUF_SZ,
usb_read_port_complete,
precvbuf);/* context is precvbuf */
err = usb_submit_urb(purb, GFP_ATOMIC);
if ((err) && (err != (-EPERM))) {
DBG_88E("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",
err, purb->status);
if ((err) && (err != (-EPERM)))
ret = _FAIL;
}
return ret;
}
@@ -517,10 +473,8 @@ void rtl8188eu_xmit_tasklet(unsigned long priv)
while (1) {
if ((adapt->bDriverStopped) ||
(adapt->bSurpriseRemoved) ||
(adapt->bWritePortCancel)) {
DBG_88E("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n");
(adapt->bWritePortCancel))
break;
}
ret = rtl8188eu_xmitframe_complete(adapt, pxmitpriv, NULL);

6
drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
View File

@@ -73,10 +73,8 @@ struct bb_reg_def {
u32 rtl8188e_PHY_QueryBBReg(struct adapter *adapter, u32 regaddr, u32 mask);
void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr,
u32 mask, u32 data);
u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
u32 regaddr, u32 mask);
void rtl8188e_PHY_SetRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
u32 regaddr, u32 mask, u32 data);
u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, u32 regaddr, u32 mask);
void rtl8188e_PHY_SetRFReg(struct adapter *adapter, u32 regaddr, u32 mask, u32 data);
/* Initialization related function */
/* MAC/BB/RF HAL config */

23
drivers/staging/r8188eu/include/HalVerDef.h
View File

@@ -6,7 +6,6 @@
enum HAL_CHIP_TYPE {
TEST_CHIP = 0,
NORMAL_CHIP = 1,
FPGA = 2,
};
enum HAL_CUT_VERSION {
@@ -15,8 +14,6 @@ enum HAL_CUT_VERSION {
C_CUT_VERSION = 2,
D_CUT_VERSION = 3,
E_CUT_VERSION = 4,
F_CUT_VERSION = 5,
G_CUT_VERSION = 6,
};
enum HAL_VENDOR {
@@ -34,33 +31,13 @@ struct HAL_VERSION {
/* Get element */
#define GET_CVID_CHIP_TYPE(version) (((version).ChipType))
#define GET_CVID_MANUFACTUER(version) (((version).VendorType))
#define GET_CVID_CUT_VERSION(version) (((version).CUTVersion))
/* Common Macro. -- */
/* HAL_VERSION VersionID */
/* HAL_CHIP_TYPE_E */
#define IS_TEST_CHIP(version) \
((GET_CVID_CHIP_TYPE(version) == TEST_CHIP) ? true : false)
#define IS_NORMAL_CHIP(version) \
((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? true : false)
/* HAL_CUT_VERSION_E */
#define IS_A_CUT(version) \
((GET_CVID_CUT_VERSION(version) == A_CUT_VERSION) ? true : false)
#define IS_B_CUT(version) \
((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? true : false)
#define IS_C_CUT(version) \
((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? true : false)
#define IS_D_CUT(version) \
((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? true : false)
#define IS_E_CUT(version) \
((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? true : false)
/* HAL_VENDOR_E */
#define IS_CHIP_VENDOR_TSMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_TSMC) ? true : false)
#define IS_CHIP_VENDOR_UMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? true : false)
#endif

46
drivers/staging/r8188eu/include/drv_types.h
View File

@@ -117,8 +117,8 @@ struct registry_priv {
#define MAX_CONTINUAL_URB_ERR 4
struct rt_firmware {
u8 *szFwBuffer;
u32 ulFwLength;
u8 *data;
u32 size;
};
struct dvobj_priv {
@@ -133,23 +133,16 @@ struct dvobj_priv {
int RtOutPipe[3];
u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
u8 irq_alloc;
struct rt_firmware firmware;
/*-------- below is for USB INTERFACE --------*/
u8 ishighspeed;
u8 RtNumOutPipes;
int RegUsbSS;
struct semaphore usb_suspend_sema;
struct mutex usb_vendor_req_mutex;
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
atomic_t continual_urb_error;
u8 signal_strength;
};
static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
@@ -159,29 +152,8 @@ static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
return &dvobj->pusbintf->dev;
};
enum _IFACE_TYPE {
IFACE_PORT0, /* mapping to port0 for C/D series chips */
IFACE_PORT1, /* mapping to port1 for C/D series chip */
MAX_IFACE_PORT,
};
enum _ADAPTER_TYPE {
PRIMARY_ADAPTER,
SECONDARY_ADAPTER,
MAX_ADAPTER,
};
enum driver_state {
DRIVER_NORMAL = 0,
DRIVER_DISAPPEAR = 1,
DRIVER_REPLACE_DONGLE = 2,
};
struct adapter {
int DriverState;/* for disable driver using module, use dongle toi
* replace module. */
int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */
int bDongle;/* build-in module or external dongle */
struct dvobj_priv *dvobj;
struct mlme_priv mlmepriv;
@@ -197,7 +169,6 @@ struct adapter {
struct pwrctrl_priv pwrctrlpriv;
struct eeprom_priv eeprompriv;
struct led_priv ledpriv;
struct hostapd_priv *phostapdpriv;
struct wifidirect_info wdinfo;
struct hal_data_8188e haldata;
@@ -206,20 +177,10 @@ struct adapter {
s32 bSurpriseRemoved;
s32 bCardDisableWOHSM;
u32 IsrContent;
u32 ImrContent;
u8 EepromAddressSize;
u8 hw_init_completed;
u8 bDriverIsGoingToUnload;
u8 init_adpt_in_progress;
u8 bHaltInProgress;
s8 signal_strength;
void *cmdThread;
void *evtThread;
void *xmitThread;
void *recvThread;
void (*intf_start)(struct adapter *adapter);
void (*intf_stop)(struct adapter *adapter);
struct net_device *pnetdev;
@@ -239,7 +200,6 @@ struct adapter {
int net_closed;
u8 bFWReady;
u8 bBTFWReady;
u8 bReadPortCancel;
u8 bWritePortCancel;
u8 bRxRSSIDisplay;
@@ -263,8 +223,6 @@ struct adapter {
unsigned char br_mac[ETH_ALEN];
unsigned char br_ip[4];
struct br_ext_info ethBrExtInfo;
unsigned char in_cta_test;
};
#define adapter_to_dvobj(adapter) (adapter->dvobj)

3
drivers/staging/r8188eu/include/hal_com.h
View File

@@ -148,9 +148,6 @@ void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg);
bool Hal_MappingOutPipe(struct adapter *pAdapter, u8 NumOutPipe);
void hal_init_macaddr(struct adapter *adapter);
void c2h_evt_clear(struct adapter *adapter);
s32 c2h_evt_read(struct adapter *adapter, u8 *buf);
#endif /* __HAL_COMMON_H__ */

48
drivers/staging/r8188eu/include/hal_intf.h
View File

@@ -9,38 +9,22 @@
#include "Hal8188EPhyCfg.h"
enum hw_variables {
HW_VAR_MEDIA_STATUS,
HW_VAR_MEDIA_STATUS1,
HW_VAR_SET_OPMODE,
HW_VAR_MAC_ADDR,
HW_VAR_BSSID,
HW_VAR_INIT_RTS_RATE,
HW_VAR_BASIC_RATE,
HW_VAR_TXPAUSE,
HW_VAR_BCN_FUNC,
HW_VAR_CORRECT_TSF,
HW_VAR_CHECK_BSSID,
HW_VAR_MLME_DISCONNECT,
HW_VAR_MLME_SITESURVEY,
HW_VAR_MLME_JOIN,
HW_VAR_BEACON_INTERVAL,
HW_VAR_SLOT_TIME,
HW_VAR_RESP_SIFS,
HW_VAR_ACK_PREAMBLE,
HW_VAR_SEC_CFG,
HW_VAR_BCN_VALID,
HW_VAR_DM_FLAG,
HW_VAR_DM_FUNC_OP,
HW_VAR_DM_FUNC_SET,
HW_VAR_DM_FUNC_CLR,
HW_VAR_CAM_EMPTY_ENTRY,
HW_VAR_CAM_INVALID_ALL,
HW_VAR_CAM_WRITE,
HW_VAR_CAM_READ,
HW_VAR_AC_PARAM_VO,
HW_VAR_AC_PARAM_VI,
HW_VAR_AC_PARAM_BE,
HW_VAR_AC_PARAM_BK,
HW_VAR_ACM_CTRL,
HW_VAR_AMPDU_MIN_SPACE,
HW_VAR_AMPDU_FACTOR,
@@ -49,28 +33,9 @@ enum hw_variables {
HW_VAR_H2C_FW_JOINBSSRPT,
HW_VAR_FWLPS_RF_ON,
HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
HW_VAR_TDLS_WRCR,
HW_VAR_TDLS_INIT_CH_SEN,
HW_VAR_TDLS_RS_RCR,
HW_VAR_TDLS_DONE_CH_SEN,
HW_VAR_INITIAL_GAIN,
HW_VAR_BT_SET_COEXIST,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_CURRENT_ANTENNA,
HW_VAR_ANTENNA_DIVERSITY_LINK,
HW_VAR_ANTENNA_DIVERSITY_SELECT,
HW_VAR_SWITCH_EPHY_WoWLAN,
HW_VAR_EFUSE_USAGE,
HW_VAR_EFUSE_BYTES,
HW_VAR_EFUSE_BT_USAGE,
HW_VAR_EFUSE_BT_BYTES,
HW_VAR_FIFO_CLEARN_UP,
HW_VAR_APFM_ON_MAC, /* Auto FSM to Turn On, include clock, isolation,
* power control for MAC only */
/* The valid upper nav range for the HW updating, if the true value is
* larger than the upper range, the HW won't update it. */
/* Unit in microsecond. 0 means disable this function. */
HW_VAR_NAV_UPPER,
HW_VAR_RPT_TIMER_SETTING,
HW_VAR_TX_RPT_MAX_MACID,
HW_VAR_H2C_MEDIA_STATUS_RPT,
@@ -78,19 +43,10 @@ enum hw_variables {
};
enum hal_def_variable {
HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
HAL_DEF_IS_SUPPORT_ANT_DIV,
HAL_DEF_CURRENT_ANTENNA,
HAL_DEF_DRVINFO_SZ,
HAL_DEF_MAX_RECVBUF_SZ,
HAL_DEF_RX_PACKET_OFFSET,
HAL_DEF_DBG_DUMP_RXPKT,/* for dbg */
HAL_DEF_DBG_DM_FUNC,/* for dbg */
HAL_DEF_RA_DECISION_RATE,
HAL_DEF_RA_SGI,
HAL_DEF_PT_PWR_STATUS,
HW_VAR_MAX_RX_AMPDU_FACTOR,
HW_DEF_RA_INFO_DUMP,
HAL_DEF_DBG_DUMP_TXPKT,
};
@@ -114,8 +70,8 @@ void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level);
int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter,
struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt);
u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
u8 GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
void SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
void GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
unsigned int rtl8188eu_inirp_init(struct adapter *Adapter);

271
drivers/staging/r8188eu/include/ieee80211.h
View File

@@ -11,7 +11,6 @@
#define MGMT_QUEUE_NUM 5
#define ETH_ALEN 6
#define ETH_TYPE_LEN 2
#define PAYLOAD_TYPE_LEN 1
@@ -182,28 +181,6 @@ struct ieee_param {
} u;
};
struct ieee_param_ex {
u32 cmd;
u8 sta_addr[ETH_ALEN];
u8 data[0];
};
struct sta_data {
u16 aid;
u16 capability;
int flags;
u32 sta_set;
u8 tx_supp_rates[16];
u32 tx_supp_rates_len;
struct ieee80211_ht_cap ht_cap;
u64 rx_pkts;
u64 rx_bytes;
u64 rx_drops;
u64 tx_pkts;
u64 tx_bytes;
u64 tx_drops;
};
#define IEEE80211_DATA_LEN 2304
/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
6.2.1.1.2.
@@ -219,14 +196,6 @@ struct sta_data {
/* this is stolen from ipw2200 driver */
#define IEEE_IBSS_MAC_HASH_SIZE 31
struct ieee_ibss_seq {
u8 mac[ETH_ALEN];
u16 seq_num;
u16 frag_num;
unsigned long packet_time;
struct list_head list;
};
struct rtw_ieee80211_hdr {
__le16 frame_ctl;
__le16 duration_id;
@@ -246,17 +215,6 @@ struct rtw_ieee80211_hdr_3addr {
u16 seq_ctl;
} __packed;
struct rtw_ieee80211_hdr_qos {
__le16 frame_ctl;
__le16 duration_id;
u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN];
u8 addr3[ETH_ALEN];
u16 seq_ctl;
u8 addr4[ETH_ALEN];
u16 qc;
} __packed;
struct rtw_ieee80211_hdr_3addr_qos {
__le16 frame_ctl;
__le16 duration_id;
@@ -267,22 +225,6 @@ struct rtw_ieee80211_hdr_3addr_qos {
u16 qc;
} __packed;
struct eapol {
u8 snap[6];
u16 ethertype;
u8 version;
u8 type;
u16 length;
} __packed;
enum eap_type {
EAP_PACKET = 0,
EAPOL_START,
EAPOL_LOGOFF,
EAPOL_KEY,
EAPOL_ENCAP_ASF_ALERT
};
#define IEEE80211_3ADDR_LEN 24
#define IEEE80211_4ADDR_LEN 30
#define IEEE80211_FCS_LEN 4
@@ -557,83 +499,12 @@ struct ieee80211_snap_hdr {
#define IEEE80211_NUM_CCK_RATES 4
#define IEEE80211_OFDM_SHIFT_MASK_A 4
/* NOTE: This data is for statistical purposes; not all hardware provides this
* information for frames received. Not setting these will not cause
* any adverse affects. */
struct ieee80211_rx_stats {
/* u32 mac_time[2]; */
s8 rssi;
u8 signal;
u8 noise;
u8 received_channel;
u16 rate; /* in 100 kbps */
/* u8 control; */
u8 mask;
u8 freq;
u16 len;
};
/* IEEE 802.11 requires that STA supports concurrent reception of at least
* three fragmented frames. This define can be increased to support more
* concurrent frames, but it should be noted that each entry can consume about
* 2 kB of RAM and increasing cache size will slow down frame reassembly. */
#define IEEE80211_FRAG_CACHE_LEN 4
struct ieee80211_frag_entry {
u32 first_frag_time;
uint seq;
uint last_frag;
uint qos; /* jackson */
uint tid; /* jackson */
struct sk_buff *skb;
u8 src_addr[ETH_ALEN];
u8 dst_addr[ETH_ALEN];
};
struct ieee80211_stats {
uint tx_unicast_frames;
uint tx_multicast_frames;
uint tx_fragments;
uint tx_unicast_octets;
uint tx_multicast_octets;
uint tx_deferred_transmissions;
uint tx_single_retry_frames;
uint tx_multiple_retry_frames;
uint tx_retry_limit_exceeded;
uint tx_discards;
uint rx_unicast_frames;
uint rx_multicast_frames;
uint rx_fragments;
uint rx_unicast_octets;
uint rx_multicast_octets;
uint rx_fcs_errors;
uint rx_discards_no_buffer;
uint tx_discards_wrong_sa;
uint rx_discards_undecryptable;
uint rx_message_in_msg_fragments;
uint rx_message_in_bad_msg_fragments;
};
struct ieee80211_softmac_stats {
uint rx_ass_ok;
uint rx_ass_err;
uint rx_probe_rq;
uint tx_probe_rs;
uint tx_beacons;
uint rx_auth_rq;
uint rx_auth_rs_ok;
uint rx_auth_rs_err;
uint tx_auth_rq;
uint no_auth_rs;
uint no_ass_rs;
uint tx_ass_rq;
uint rx_ass_rq;
uint tx_probe_rq;
uint reassoc;
uint swtxstop;
uint swtxawake;
};
#define SEC_KEY_1 (1<<0)
#define SEC_KEY_2 (1<<1)
#define SEC_KEY_3 (1<<2)
@@ -653,18 +524,6 @@ struct ieee80211_softmac_stats {
#define WEP_KEYS 4
#define WEP_KEY_LEN 13
struct ieee80211_security {
u16 active_key:2,
enabled:1,
auth_mode:2,
auth_algo:4,
unicast_uses_group:1;
u8 key_sizes[WEP_KEYS];
u8 keys[WEP_KEYS][WEP_KEY_LEN];
u8 level;
u16 flags;
} __packed;
/*
802.11 data frame from AP
@@ -680,15 +539,6 @@ Total: 28-2340 bytes
*/
struct ieee80211_header_data {
u16 frame_ctl;
u16 duration_id;
u8 addr1[6];
u8 addr2[6];
u8 addr3[6];
u16 seq_ctrl;
};
#define BEACON_PROBE_SSID_ID_POSITION 12
/* Management Frame Information Element Types */
@@ -705,17 +555,6 @@ struct ieee80211_header_data {
#define MFIE_TYPE_RATES_EX 50
#define MFIE_TYPE_GENERIC 221
struct ieee80211_info_element_hdr {
u8 id;
u8 len;
} __packed;
struct ieee80211_info_element {
u8 id;
u8 len;
u8 data[0];
} __packed;
/*
* These are the data types that can make up management packets
*
@@ -736,49 +575,6 @@ struct ieee80211_info_element {
#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
#define IEEE80211_DEFAULT_BASIC_RATE 10
struct ieee80211_authentication {
struct ieee80211_header_data header;
u16 algorithm;
u16 transaction;
u16 status;
/* struct ieee80211_info_element_hdr info_element; */
} __packed;
struct ieee80211_probe_response {
struct ieee80211_header_data header;
u32 time_stamp[2];
u16 beacon_interval;
u16 capability;
struct ieee80211_info_element info_element;
} __packed;
struct ieee80211_probe_request {
struct ieee80211_header_data header;
} __packed;
struct ieee80211_assoc_request_frame {
struct rtw_ieee80211_hdr_3addr header;
u16 capability;
u16 listen_interval;
struct ieee80211_info_element_hdr info_element;
} __packed;
struct ieee80211_assoc_response_frame {
struct rtw_ieee80211_hdr_3addr header;
u16 capability;
u16 status;
u16 aid;
} __packed;
struct ieee80211_txb {
u8 nr_frags;
u8 encrypted;
u16 reserved;
u16 frag_size;
u16 payload_size;
struct sk_buff *fragments[0];
};
/* SWEEP TABLE ENTRIES NUMBER*/
#define MAX_SWEEP_TAB_ENTRIES 42
#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
@@ -821,44 +617,6 @@ join_res:
> 0: TID
*/
enum ieee80211_state {
/* the card is not linked at all */
IEEE80211_NOLINK = 0,
/* IEEE80211_ASSOCIATING* are for BSS client mode
* the driver shall not perform RX filtering unless
* the state is LINKED.
* The driver shall just check for the state LINKED and
* defaults to NOLINK for ALL the other states (including
* LINKED_SCANNING)
*/
/* the association procedure will start (wq scheduling)*/
IEEE80211_ASSOCIATING,
IEEE80211_ASSOCIATING_RETRY,
/* the association procedure is sending AUTH request*/
IEEE80211_ASSOCIATING_AUTHENTICATING,
/* the association procedure has successfully authentcated
* and is sending association request
*/
IEEE80211_ASSOCIATING_AUTHENTICATED,
/* the link is ok. the card associated to a BSS or linked
* to a ibss cell or acting as an AP and creating the bss
*/
IEEE80211_LINKED,
/* same as LINKED, but the driver shall apply RX filter
* rules as we are in NO_LINK mode. As the card is still
* logically linked, but it is doing a syncro site survey
* then it will be back to LINKED state.
*/
IEEE80211_LINKED_SCANNING,
};
#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
#define DEFAULT_FTS 2346
@@ -876,11 +634,6 @@ static inline int is_broadcast_mac_addr(const u8 *addr)
#define CFG_IEEE80211_RESERVE_FCS (1<<0)
#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
struct tx_pending {
int frag;
struct ieee80211_txb *txb;
};
#define MAXTID 16
#define IEEE_A (1<<0)
@@ -941,26 +694,6 @@ enum rtw_ieee80211_back_actioncode {
RTW_WLAN_ACTION_DELBA = 2,
};
/* HT features action code */
enum rtw_ieee80211_ht_actioncode {
RTW_WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
RTW_WLAN_ACTION_SM_PS = 1,
RTW_WLAN_ACTION_PSPM = 2,
RTW_WLAN_ACTION_PCO_PHASE = 3,
RTW_WLAN_ACTION_MIMO_CSI_MX = 4,
RTW_WLAN_ACTION_MIMO_NONCP_BF = 5,
RTW_WLAN_ACTION_MIMP_CP_BF = 6,
RTW_WLAN_ACTION_ASEL_INDICATES_FB = 7,
RTW_WLAN_ACTION_HI_INFO_EXCHG = 8,
};
/* BACK (block-ack) parties */
enum rtw_ieee80211_back_parties {
RTW_WLAN_BACK_RECIPIENT = 0,
RTW_WLAN_BACK_INITIATOR = 1,
RTW_WLAN_BACK_TIMER = 2,
};
#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs)
* 00:50:F2 */
#define WME_OUI_TYPE 2
@@ -1139,9 +872,9 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv);
int rtw_get_bit_value_from_ieee_value(u8 val);
uint rtw_is_cckrates_included(u8 *rate);
bool rtw_is_cckrates_included(u8 *rate);
uint rtw_is_cckratesonly_included(u8 *rate);
bool rtw_is_cckratesonly_included(u8 *rate);
int rtw_check_network_type(unsigned char *rate, int ratelen, int channel);

50
drivers/staging/r8188eu/include/odm.h
View File

@@ -86,8 +86,6 @@ struct odm_phy_dbg_info {
/* ODM Write,debug info */
s8 RxSNRdB[MAX_PATH_NUM_92CS];
u64 NumQryPhyStatus;
u64 NumQryPhyStatusCCK;
u64 NumQryPhyStatusOFDM;
/* Others */
s32 RxEVM[MAX_PATH_NUM_92CS];
};
@@ -122,44 +120,19 @@ enum odm_common_info_def {
/* Fixed value: */
/* HOOK BEFORE REG INIT----------- */
ODM_CMNINFO_ABILITY, /* ODM_ABILITY_E */
ODM_CMNINFO_MP_TEST_CHIP,
/* HOOK BEFORE REG INIT----------- */
/* Dynamic value: */
/* POINTER REFERENCE----------- */
ODM_CMNINFO_WM_MODE, /* ODM_WIRELESS_MODE_E */
ODM_CMNINFO_SEC_CHNL_OFFSET, /* ODM_SEC_CHNL_OFFSET_E */
ODM_CMNINFO_BW, /* ODM_BW_E */
ODM_CMNINFO_CHNL,
ODM_CMNINFO_SCAN,
ODM_CMNINFO_POWER_SAVING,
/* POINTER REFERENCE----------- */
/* CALL BY VALUE------------- */
ODM_CMNINFO_LINK,
ODM_CMNINFO_RSSI_MIN,
ODM_CMNINFO_RF_ANTENNA_TYPE, /* u8 */
/* CALL BY VALUE-------------*/
};
/* 2011/10/20 MH Define ODM support ability. ODM_CMNINFO_ABILITY */
enum odm_ability_def {
/* BB ODM section BIT 0-15 */
ODM_BB_FA_CNT = BIT(3),
ODM_BB_RSSI_MONITOR = BIT(4),
ODM_BB_CCK_PD = BIT(5),
ODM_BB_ANT_DIV = BIT(6),
ODM_BB_PWR_TRA = BIT(8),
/* MAC DM section BIT 16-23 */
ODM_MAC_EDCA_TURBO = BIT(16),
/* RF ODM section BIT 24-31 */
ODM_RF_TX_PWR_TRACK = BIT(24),
ODM_RF_CALIBRATION = BIT(26),
};
# define ODM_ITRF_USB 0x2
@@ -186,12 +159,6 @@ enum odm_wireless_mode {
ODM_WM_AUTO = BIT(5),
};
/* ODM_CMNINFO_BW */
enum odm_bw {
ODM_BW20M = 0,
ODM_BW40M = 1,
};
struct odm_ra_info {
u8 RateID;
u32 RateMask;
@@ -238,9 +205,6 @@ struct odm_rf_cal {
s32 RegEB4;
s32 RegEBC;
u8 TXPowercount;
bool bTXPowerTrackingInit;
bool bTXPowerTracking;
u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking
* as default */
u8 TM_Trigger;
@@ -263,11 +227,9 @@ struct odm_rf_cal {
bool bReloadtxpowerindex;
u8 bRfPiEnable;
u32 TXPowerTrackingCallbackCnt; /* cosa add for debug */
u8 bCCKinCH14;
u8 CCK_index;
u8 OFDM_index[2];
u8 OFDM_index;
bool bDoneTxpower;
u8 ThermalValue_HP[HP_THERMAL_NUM];
@@ -355,7 +317,7 @@ struct odm_dm_struct {
/* Secondary channel offset don't_care/below/above = 0/1/2 */
u8 *pSecChOffset;
/* BW info 20M/40M/80M = 0/1/2 */
u8 *pBandWidth;
enum ht_channel_width *pBandWidth;
/* Central channel location Ch1/Ch2/.... */
u8 *pChannel; /* central channel number */
@@ -461,8 +423,7 @@ enum dm_swas {
#define CCK_TABLE_SIZE 33
extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D];
extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8];
extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
extern u8 cck_swing_table[CCK_TABLE_SIZE][8];
/* check Sta pointer valid or not */
#define IS_STA_VALID(pSta) (pSta)
@@ -487,9 +448,4 @@ void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm);
void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm,
enum odm_common_info_def CmnInfo, u32 Value);
void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm,
enum odm_common_info_def CmnInfo, void *pValue);
void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value);
#endif

39
drivers/staging/r8188eu/include/odm_HWConfig.h
View File

@@ -4,42 +4,13 @@
#ifndef __HALHWOUTSRC_H__
#define __HALHWOUTSRC_H__
/* Definition */
/* CCK Rates, TxHT = 0 */
#define DESC92C_RATE1M 0x00
#define DESC92C_RATE2M 0x01
#define DESC92C_RATE5_5M 0x02
#define DESC92C_RATE11M 0x03
/* OFDM Rates, TxHT = 0 */
#define DESC92C_RATE6M 0x04
#define DESC92C_RATE9M 0x05
#define DESC92C_RATE12M 0x06
#define DESC92C_RATE18M 0x07
#define DESC92C_RATE24M 0x08
#define DESC92C_RATE36M 0x09
#define DESC92C_RATE48M 0x0a
#define DESC92C_RATE54M 0x0b
/* MCS Rates, TxHT = 1 */
#define DESC92C_RATEMCS0 0x0c
#define DESC92C_RATEMCS1 0x0d
#define DESC92C_RATEMCS2 0x0e
#define DESC92C_RATEMCS3 0x0f
#define DESC92C_RATEMCS4 0x10
#define DESC92C_RATEMCS5 0x11
#define DESC92C_RATEMCS6 0x12
#define DESC92C_RATEMCS7 0x13
#define DESC92C_RATEMCS8 0x14
#define DESC92C_RATEMCS9 0x15
#define DESC92C_RATEMCS10 0x16
#define DESC92C_RATEMCS11 0x17
#define DESC92C_RATEMCS12 0x18
#define DESC92C_RATEMCS13 0x19
#define DESC92C_RATEMCS14 0x1a
#define DESC92C_RATEMCS15 0x1b
#define DESC92C_RATEMCS15_SG 0x1c
#define DESC92C_RATEMCS32 0x20
/* structure and define */
@@ -95,13 +66,5 @@ void ODM_PhyStatusQuery(struct odm_dm_struct *pDM_Odm,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt);
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *pDM_Odm,
enum rf_radio_path Content,
enum rf_radio_path eRFPath);
enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *pDM_Odm,
enum odm_bb_config_type ConfigType);
enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *pDM_Odm);
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *pDM_Odm);
#endif

50
drivers/staging/r8188eu/include/osdep_service.h
View File

@@ -54,26 +54,11 @@ static inline struct list_head *get_list_head(struct __queue *queue)
return (&(queue->queue));
}
static inline void rtw_list_delete(struct list_head *plist)
{
list_del_init(plist);
}
static inline void _set_timer(struct timer_list *ptimer,u32 delay_time)
{
mod_timer(ptimer , (jiffies+(delay_time*HZ/1000)));
mod_timer(ptimer, jiffies + msecs_to_jiffies(delay_time));
}
static inline void _cancel_timer(struct timer_list *ptimer,u8 *bcancelled)
{
del_timer_sync(ptimer);
*bcancelled= true;/* true ==1; false==0 */
}
#define RTW_TIMER_HDL_ARGS void *FunctionContext
#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl
#define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
{
return netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) &&
@@ -82,29 +67,8 @@ static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3));
}
static inline void rtw_netif_wake_queue(struct net_device *pnetdev)
{
netif_tx_wake_all_queues(pnetdev);
}
static inline void rtw_netif_start_queue(struct net_device *pnetdev)
{
netif_tx_start_all_queues(pnetdev);
}
static inline void rtw_netif_stop_queue(struct net_device *pnetdev)
{
netif_tx_stop_all_queues(pnetdev);
}
extern int RTW_STATUS_CODE(int error_code);
extern unsigned char MCS_rate_2R[16];
extern unsigned char MCS_rate_1R[16];
extern unsigned char RTW_WPA_OUI[];
extern unsigned char WPA_TKIP_CIPHER[4];
extern unsigned char RSN_TKIP_CIPHER[4];
void *rtw_malloc2d(int h, int w, int size);
#define rtw_init_queue(q) \
@@ -173,18 +137,6 @@ static inline u32 _RND512(u32 sz)
return val;
}
static inline u32 bitshift(u32 bitmask)
{
u32 i;
for (i = 0; i <= 31; i++)
if (((bitmask>>i) & 0x1) == 1) break;
return i;
}
/* limitation of path length */
#define PATH_LENGTH_MAX PATH_MAX
struct rtw_netdev_priv_indicator {
void *priv;
u32 sizeof_priv;

5
drivers/staging/r8188eu/include/recv_osdep.h
View File

@@ -14,16 +14,11 @@ s32 rtw_recv_entry(struct recv_frame *precv_frame);
int rtw_recv_indicatepkt(struct adapter *adapter, struct recv_frame *recv_frame);
void rtw_recv_returnpacket(struct net_device *cnxt, struct sk_buff *retpkt);
void rtw_hostapd_mlme_rx(struct adapter *padapter, struct recv_frame *recv_fr);
void rtw_handle_tkip_mic_err(struct adapter *padapter, u8 bgroup);
int rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter);
void rtw_free_recv_priv(struct recv_priv *precvpriv);
int rtw_os_recv_resource_init(struct recv_priv *recvpr, struct adapter *adapt);
int rtw_os_recv_resource_alloc(struct adapter *adapt, struct recv_frame *recvfr);
void rtw_os_recv_resource_free(struct recv_priv *precvpriv);
int rtw_os_recvbuf_resource_alloc(struct adapter *adapt, struct recv_buf *buf);
int rtw_os_recvbuf_resource_free(struct adapter *adapt, struct recv_buf *buf);

3
drivers/staging/r8188eu/include/rtl8188e_dm.h
View File

@@ -12,9 +12,8 @@ enum{
struct dm_priv {
u32 InitODMFlag;
/* Upper and Lower Signal threshold for Rate Adaptive*/
/* Lower Signal threshold for Rate Adaptive */
int EntryMinUndecoratedSmoothedPWDB;
int EntryMaxUndecoratedSmoothedPWDB;
int MinUndecoratedPWDBForDM;
};

97
drivers/staging/r8188eu/include/rtl8188e_hal.h
View File

@@ -34,63 +34,9 @@
#define DRVINFO_SZ 4 /* unit is 8bytes */
#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
/* download firmware related data structure */
#define FW_8188E_SIZE 0x4000 /* 16384,16k */
#define FW_8188E_START_ADDRESS 0x1000
#define MAX_PAGE_SIZE 4096 /* @ page : 4k bytes */
#define IS_FW_HEADER_EXIST(_pFwHdr) \
((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 || \
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 || \
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300 || \
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0)
/* This structure must be careful with byte-ordering */
struct rt_firmware_hdr {
/* 8-byte alinment required */
/* LONG WORD 0 ---- */
__le16 Signature; /* 92C0: test chip; 92C,
* 88C0: test chip; 88C1: MP A-cut;
* 92C1: MP A-cut */
u8 Category; /* AP/NIC and USB/PCI */
u8 Function; /* Reserved for different FW function
* indcation, for further use when
* driver needs to download different
* FW for different conditions */
__le16 Version; /* FW Version */
u8 Subversion; /* FW Subversion, default 0x00 */
u16 Rsvd1;
/* LONG WORD 1 ---- */
u8 Month; /* Release time Month field */
u8 Date; /* Release time Date field */
u8 Hour; /* Release time Hour field */
u8 Minute; /* Release time Minute field */
__le16 RamCodeSize; /* The size of RAM code */
u8 Foundry;
u8 Rsvd2;
/* LONG WORD 2 ---- */
__le32 SvnIdx; /* The SVN entry index */
u32 Rsvd3;
/* LONG WORD 3 ---- */
u32 Rsvd4;
u32 Rsvd5;
};
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
enum usb_rx_agg_mode {
USB_RX_AGG_DISABLE,
USB_RX_AGG_DMA,
USB_RX_AGG_USB,
USB_RX_AGG_MIX
};
#define MAX_RX_DMA_BUFFER_SIZE_88E \
0x2400 /* 9k for 88E nornal chip , MaxRxBuff=10k-max(TxReportSize(64*8),
* WOLPattern(16*24)) */
@@ -160,21 +106,16 @@ struct txpowerinfo24g {
#define EFUSE_PROTECT_BYTES_BANK 16
#define USB_RXAGG_PAGE_COUNT 48
#define USB_RXAGG_PAGE_TIMEOUT 0x4
struct hal_data_8188e {
struct HAL_VERSION VersionID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
u16 FirmwareSignature;
u8 PGMaxGroup;
/* current WIFI_PHY values */
u32 ReceiveConfig;
enum ht_channel_width CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
u16 BasicRateSet;
u8 EEPROMRegulatory;
u8 EEPROMThermalMeter;
@@ -192,24 +133,17 @@ struct hal_data_8188e {
u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* The current Tx Power Level */
u8 CurrentCckTxPwrIdx;
u8 CurrentOfdm24GTxPwrIdx;
u8 CurrentBW2024GTxPwrIdx;
u8 CurrentBW4024GTxPwrIdx;
/* Read/write are allow for following hardware information variables */
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
u8 CrystalCap;
u8 ExternalPA;
u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */
struct bb_reg_def PHYRegDef[2]; /* Radio A/B */
struct bb_reg_def PHYRegDef;
u32 RfRegChnlVal[2];
u32 RfRegChnlVal;
/* for host message to fw */
u8 LastHMEBoxNum;
@@ -232,37 +166,16 @@ struct hal_data_8188e {
u8 OutEpQueueSel;
u8 OutEpNumber;
u16 EfuseUsedBytes;
struct P2P_PS_Offload_t p2p_ps_offload;
/* Auto FSM to Turn On, include clock, isolation, power control
* for MAC only */
u8 bMacPwrCtrlOn;
u32 UsbBulkOutSize;
u8 UsbTxAggMode;
u8 UsbTxAggDescNum;
enum usb_rx_agg_mode UsbRxAggMode;
u8 UsbRxAggBlockCount; /* USB Block count. Block size is
* 512-byte in high speed and 64-byte
* in full speed */
u8 UsbRxAggBlockTimeout;
u8 UsbRxAggPageCount; /* 8192C DMA page count */
u8 UsbRxAggPageTimeout;
};
/* rtl8188e_hal_init.c */
s32 rtl8188e_FirmwareDownload(struct adapter *padapter);
void _8051Reset88E(struct adapter *padapter);
void rtl8188e_InitializeFirmwareVars(struct adapter *padapter);
s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy);
/* EFuse */
u8 GetEEPROMSize8188E(struct adapter *padapter);
void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo);
void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);

8
drivers/staging/r8188eu/include/rtl8188e_recv.h
View File

@@ -6,10 +6,6 @@
#define TX_RPT1_PKT_LEN 8
#define RECV_BLK_SZ 512
#define RECV_BLK_CNT 16
#define RECV_BLK_TH RECV_BLK_CNT
#define NR_PREALLOC_RECV_SKB (8)
#define NR_RECVBUFF (4)
@@ -37,13 +33,9 @@ enum rx_packet_type {
HIS_REPORT,/* USB HISR RPT */
};
void rtl8188eu_init_recvbuf(struct recv_buf *buf);
s32 rtl8188eu_init_recv_priv(struct adapter *padapter);
void rtl8188eu_free_recv_priv(struct adapter * padapter);
void rtl8188eu_recv_hdl(struct adapter * padapter, struct recv_buf *precvbuf);
void rtl8188eu_recv_tasklet(unsigned long priv);
void rtl8188e_query_rx_phy_status(struct recv_frame *fr, struct phy_stat *phy);
void rtl8188e_process_phy_info(struct adapter * padapter, void *prframe);
void update_recvframe_phyinfo_88e(struct recv_frame *fra, struct phy_stat *phy);
void update_recvframe_attrib_88e(struct recv_frame *fra, struct recv_stat *stat);

2
drivers/staging/r8188eu/include/rtl8188e_spec.h
View File

@@ -794,7 +794,7 @@ Current IOREG MAP
/* 2 MCUFWDL */
#define MCUFWDL_EN BIT(0)
#define MCUFWDL_RDY BIT(1)
#define FWDL_ChkSum_rpt BIT(2)
#define FWDL_CHKSUM_RPT BIT(2)
#define MACINI_RDY BIT(3)
#define BBINI_RDY BIT(4)
#define RFINI_RDY BIT(5)

4
drivers/staging/r8188eu/include/rtl8188e_xmit.h
View File

@@ -93,6 +93,8 @@ enum TXDESC_SC {
#define SGI BIT(6)
#define USB_TXAGG_NUM_SHT 24
#define USB_TXAGG_DESC_NUM 0x6
#define txdesc_set_ccx_sw_88e(txdesc, value) \
do { \
((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \
@@ -141,7 +143,7 @@ s32 rtl8188eu_mgnt_xmit(struct adapter *padapter, struct xmit_frame *frame);
s32 rtl8188eu_xmit_buf_handler(struct adapter *padapter);
#define hal_xmit_handler rtl8188eu_xmit_buf_handler
void rtl8188eu_xmit_tasklet(unsigned long priv);
s32 rtl8188eu_xmitframe_complete(struct adapter *padapter,
bool rtl8188eu_xmitframe_complete(struct adapter *padapter,
struct xmit_priv *pxmitpriv,
struct xmit_buf *pxmitbuf);

5
drivers/staging/r8188eu/include/rtw_br_ext.h
View File

@@ -4,11 +4,6 @@
#ifndef _RTW_BR_EXT_H_
#define _RTW_BR_EXT_H_
#define _DEBUG_ERR DBG_88E
#define _DEBUG_INFO DBG_88E
#define DEBUG_WARN DBG_88E
#define DEBUG_INFO DBG_88E
#define DEBUG_ERR DBG_88E
#define GET_MY_HWADDR(padapter) ((padapter)->eeprompriv.mac_addr)
#define NAT25_HASH_BITS 4

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