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vpp: enable the video data path for g12b

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PD#165090: vpp: enable the video data path for g12b

Change-Id: I35fd1e61d97d4d416f70f954c58217b70740e6f3
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
This commit is contained in:
Brian Zhu
2018-05-10 23:19:14 +08:00
committed by Yixun Lan
parent bdd48e2a31
commit 0daf159af2
4 changed files with 16 additions and 12 deletions
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2
drivers/amlogic/media/enhancement/amvecm/amvecm.c
View File

@@ -4612,7 +4612,7 @@ static int aml_vecm_probe(struct platform_device *pdev)
/* amvecm_vpp_mtx_debug(mtx_sel_dbg, 1);*/
} else if (is_meson_txhd_cpu())
vpp_set_10bit_datapath1();
else if (is_meson_g12a_cpu())
else if (is_meson_g12a_cpu() || is_meson_g12b_cpu())
vpp_set_12bit_datapath_g12a();
memset(&vpp_hist_param.vpp_histgram[0],
0, sizeof(unsigned short) * 64);

10
drivers/amlogic/media/enhancement/amvecm/bitdepth.c
View File

@@ -222,14 +222,16 @@ void vpp_extend_mode_osd2(bool mode)
/**/
void vpp_vd1_if_bits_mode(enum vd_if_bits_mode_e bits_mode)
{
u32 reg = (is_meson_g12a_cpu() ?
u32 reg = ((is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) ?
G12_VD1_IF0_GEN_REG3 :
VD1_IF0_GEN_REG3);
WRITE_VPP_REG_BITS(reg, (bits_mode & 0x3), 8, 2);
}
void vpp_vd2_if_bits_mode(enum vd_if_bits_mode_e bits_mode)
{
u32 reg = (is_meson_g12a_cpu() ?
u32 reg = ((is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) ?
G12_VD2_IF0_GEN_REG3 :
VD2_IF0_GEN_REG3);
WRITE_VPP_REG_BITS(reg, (bits_mode & 0x3), 8, 2);
@@ -384,7 +386,7 @@ void vpp_set_12bit_datapath_g12a(void)
vpp_set_vd1_ext_mod(0);
vpp_set_vd1_bypass_dolby(1);
if (is_meson_g12a_cpu()) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
/*vd1 mux config*/
vpp_set_vd1_mux0(0);
vpp_set_vd1_mux1(0);
@@ -652,7 +654,7 @@ void vpp_datapath_status(void)
unsigned int chroma_coring_en, black_ext_en, bluestretch_en;
unsigned int vadj1_en, vadj2_en;
if (is_meson_g12a_cpu()) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
vd1_out_format =
READ_VPP_REG_BITS(G12_VD1_IF0_GEN_REG3, 8, 2);
vd2_out_format =

14
drivers/amlogic/media/video_sink/video.c
View File

@@ -3366,7 +3366,8 @@ static void viu_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
}
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
if ((is_meson_txlx_cpu()
|| is_meson_g12a())
|| is_meson_g12a_cpu()
|| is_meson_g12b_cpu())
&& is_dolby_vision_on()
&& is_dolby_vision_stb_mode()
&& (vf->source_type ==
@@ -3832,7 +3833,8 @@ static void vd2_set_dcu(struct vpp_frame_par_s *frame_par, struct vframe_s *vf)
}
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
if ((is_meson_txlx_cpu()
|| is_meson_g12a())
|| is_meson_g12a_cpu()
|| is_meson_g12b_cpu())
&& is_dolby_vision_on()
&& is_dolby_vision_stb_mode()
&& (vf->source_type ==
@@ -6317,10 +6319,10 @@ SET_FILTER:
VSYNC_WR_MPEG_REG_BITS(
VIU_MISC_CTRL1,
1, 16, 1); /* bypass core1 */
else if (is_meson_g12a())
else if (is_meson_g12a_cpu()
|| is_meson_g12b_cpu())
VSYNC_WR_MPEG_REG_BITS(
DOLBY_PATH_CTRL,
1, 0, 1);
DOLBY_PATH_CTRL, 1, 0, 1);
}
if (cur_dispbuf && (cur_dispbuf == &vf_local))
cur_dispbuf = NULL;
@@ -10001,7 +10003,7 @@ static int __init video_init(void)
}
#endif
if (is_meson_g12a_cpu()) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
cur_dev->viu_off = 0x3200 - 0x1a50;
legacy_vpp = false;
}

2
drivers/amlogic/media/video_sink/vpp.c
View File

@@ -2657,7 +2657,7 @@ void vpp_super_scaler_support(void)
sr_support &= ~SUPER_CORE1_SUPPORT;
}
scaler_path_sel = SCALER_PATH_MAX;
if (is_meson_g12a_cpu()) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
sr_reg_offt = 0xc00;
super_scaler = false;
} else