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vpp: correct the vpp dummy reg for g12a/g12b/tl1 [1/1]

Browse Source 
PD#TV-1565

Problem:
After g12a chip, vpp post dummy reg was changed. The
test_screen/rgb_screen sysfs did not work.

Solution:
Use the correct vpp post dummy reg for those chip

Verify:
Verified on X301 and W400

Change-Id: I1cb718a1f7040804b63d0197de0bb6aafe233357
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
This commit is contained in:
Brian Zhu
2019-02-18 21:56:29 +08:00
committed by Dongjin Kim
parent 85aba15a90
commit 0e2090b5cf
1 changed files with 10 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/amlogic/media/video_sink/video.c
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@@ -10109,7 +10109,11 @@ static ssize_t video_test_screen_store(struct class *cla,
#endif
/* show test screen YUV blend*/
if (is_meson_gxm_cpu() ||
if (!legacy_vpp)
WRITE_VCBUS_REG(
VPP_POST_BLEND_BLEND_DUMMY_DATA,
test_screen & 0x00ffffff);
else if (is_meson_gxm_cpu() ||
(get_cpu_type() == MESON_CPU_MAJOR_ID_TXLX))
/* bit width change to 10bit in gxm, 10/12 in txlx*/
WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
@@ -10175,7 +10179,11 @@ static ssize_t video_rgb_screen_store(struct class *cla,
#endif
/* show test screen YUV blend*/
yuv_eight = rgb2yuv(rgb_screen & 0x00ffffff);
if (is_meson_gxtvbb_cpu()) {
if (!legacy_vpp) {
WRITE_VCBUS_REG(
VPP_POST_BLEND_BLEND_DUMMY_DATA,
yuv_eight & 0x00ffffff);
} else if (is_meson_gxtvbb_cpu()) {
WRITE_VCBUS_REG(VPP_DUMMY_DATA1,
rgb_screen & 0x00ffffff);
} else if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL)) {