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ARM: dts: enable SD and GMAC at rk3288-evb
There is a bug in GMAC IP, it supports RGMII clock but not a speed mode for it. Change-Id: I8e5cca355c30920db37400901d3411eebca711ae Signed-off-by: Randy Li <randy.li@rock-chips.com>
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@@ -226,7 +226,6 @@
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*/
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vcc_sd: sdmmc-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_pwr>;
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regulator-name = "vcc_sd";
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@@ -276,6 +275,22 @@
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status = "okay";
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};
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&gmac {
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phy-supply = <&vcc_phy>;
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phy-mode = "rgmii";
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clock_in_out = "input";
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snps,reset-gpio = <&gpio4 7 0>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 1000000>;
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assigned-clocks = <&cru SCLK_MAC>;
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assigned-clock-parents = <&ext_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x30>;
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rx_delay = <0x10>;
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status = "ok";
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};
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&hdmi {
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#address-cells = <1>;
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#size-cells = <0>;
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@@ -308,6 +323,7 @@
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status = "okay";
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vmmc-supply = <&vcc_sd>;
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vqmmc-supply = <&vccio_sd>;
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supports-sd;
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};
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&gmac {
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@@ -323,7 +339,7 @@
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x30>;
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rx_delay = <0x10>;
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status = "ok";
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status = "okay";
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};
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&edp_phy {
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@@ -494,6 +494,7 @@
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"aclk_mac", "pclk_mac";
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resets = <&cru SRST_MAC>;
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reset-names = "stmmaceth";
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max-speed = <100>;
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status = "disabled";
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};
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