shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-11 05:17:10 +09:00
Code Issues Packages Projects Releases Wiki Activity

ARM: tegra: timer: Fix us timer time after resume from LP1

Browse Source 
In LP1 suspend, or during a failed LP0 suspend, the core power is
not turned off and the timer register is not reset.  Saving the
timer value during suspend and adding it to the offset after resume
will cause the timer value to double for each suspend cycle.

To fix, when resuming subtract the current value of the timer
register from the offset.  Also, use the rtc registers to add
the time that passed during suspend.

Change-Id: I9f7ee2089b98cf66af45271f8478fbd9eb2ee250
Signed-off-by: Colin Cross <ccross@android.com>
This commit is contained in:
Colin Cross
2010-10-24 16:11:03 -07:00
parent 683a9ff2df
commit 0ecadc39ae
1 changed files with 6 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/mach-tegra/timer.c
View File

@@ -37,6 +37,7 @@
#include "board.h"
#include "clock.h"
#include "power.h"
#define RTC_SECONDS 0x08
#define RTC_SHADOW_SECONDS 0x0c
@@ -104,12 +105,15 @@ static cycle_t tegra_clocksource_us_read(struct clocksource *cs)
void tegra_clocksource_us_suspend(struct clocksource *cs)
{
tegra_us_resume_offset = tegra_clocksource_us_read(cs);
tegra_us_resume_offset = tegra_clocksource_us_read(cs) -
tegra_rtc_read_ms() * 1000;
}
void tegra_clocksource_us_resume(struct clocksource *cs)
{
tegra_us_clocksource_offset = tegra_us_resume_offset;
tegra_us_clocksource_offset += tegra_us_resume_offset +
tegra_rtc_read_ms() * 1000 -
tegra_clocksource_us_read(cs);
}
static struct clock_event_device tegra_clockevent = {