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Merge commit '383b245ce2449c78580a067ed3a9872314f3a780'

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* commit '383b245ce2449c78580a067ed3a9872314f3a780':
  arm64: dts: rockchip: rk3588-vehicle-evb-maxim-max96722: adjust some node name
  arm64: dts: rockchip: rk3588-vehicle-evb-maxim-max96712: adjust some node name
  arm64: dts: rockchip: rk3562-rk817: set vcc_3v3 regulator on in suspend
  mmc: dw_mmc-rockchip: fix tuning return incorrect value in certain situations
  arm64: dts: rockchip: rk3562-evb1-lp4x-v10-linux-amp: Add memory node for ap amp
  video: rockchip: vehicle: fix support RK356X
  arm64: dts: rockchip: rk3588-vehicle-adsp-audio-s66: set i2s3 master

Change-Id: I399421907007ac460928435c727d8890948e5466
This commit is contained in:
Tao Huang
2023-08-28 19:06:28 +08:00
parent 90ed5e5ef1 383b245ce2
commit 0fee6a48e4
7 changed files with 56 additions and 38 deletions
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8
arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10-linux-amp.dts
View File

@@ -8,3 +8,11 @@
#include "rk3562-linux.dtsi"
#include "rk3562-rk817.dtsi"
#include "rk3562-amp.dtsi"
/ {
memory {
device_type = "memory";
reg = <0x0 0x01000000 0x0 0x07400000>,
<0x0 0x0a200000 0x0 0xf1e00000>;
};
};

3
arch/arm64/boot/dts/rockchip/rk3562-rk817.dtsi
View File

@@ -114,7 +114,8 @@
regulator-initial-mode = <0x2>;
regulator-name = "vcc_3v3";
regulator-state-mem {
regulator-off-in-suspend;
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};

6
arch/arm64/boot/dts/rockchip/rk3588-vehicle-adsp-audio-s66.dtsi
View File

@@ -37,9 +37,7 @@
sound1 {
compatible = "simple-audio-card";
simple-audio-card,name = "rockchip,bt";
simple-audio-card,format = "dsp_a";
simple-audio-card,bitclock-inversion = <1>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,format = "i2s";
simple-audio-card,cpu {
sound-dai = <&i2s3_2ch>;
};
@@ -78,7 +76,7 @@
};
&mclkin_i2s3 {
clock-frequency = <12288000>;
clock-frequency = <24576000>;
};
&spi3 {

43
arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712.dtsi
View File

@@ -5,11 +5,11 @@
*/
/ {
max96712_osc: oscillator {
max96712_dphy3_osc0: max96712-dphy3-oscillator@0 {
compatible = "fixed-clock";
#clock-cells = <1>;
clock-frequency = <25000000>;
clock-output-names = "max96712-osc";
clock-frequency = <25000000>;
clock-output-names = "max96712-dphy3-osc0";
};
};
@@ -28,9 +28,9 @@
#address-cells = <1>;
#size-cells = <0>;
mipi_dphy1_in_max96712: endpoint@1 {
mipi_dphy3_in_max96712: endpoint@1 {
reg = <1>;
remote-endpoint = <&max96712_out>;
remote-endpoint = <&max96712_dphy3_out>;
data-lanes = <1 2 3 4>;
};
};
@@ -39,7 +39,7 @@
#address-cells = <1>;
#size-cells = <0>;
csidphy1_out: endpoint@0 {
csidphy3_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi4_csi2_input>;
};
@@ -50,19 +50,20 @@
&i2c6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6m3_xfer>, <&max96712_errb>, <&max96712_int>;
pinctrl-0 = <&i2c6m3_xfer>;
max96712: max96712@29 {
compatible = "max96712";
max96712_dphy3: max96712@29 {
compatible = "maxim,max96712";
status = "okay";
reg = <0x29>;
clock-names = "xvclk";
clocks = <&max96712_osc 0>;
clocks = <&max96712_dphy3_osc0 0>;
pinctrl-names = "default";
pinctrl-0 = <&max96712_dphy3_power>, <&max96712_dphy3_errb>, <&max96712_dphy3_lock>;
power-domains = <&power RK3588_PD_VI>;
rockchip,grf = <&sys_grf>;
power-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
pocen-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
//reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
lock-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
auto-init-deskew-mask = <0x03>;
frame-sync-period = <0>;
@@ -72,8 +73,8 @@
rockchip,camera-module-lens-name = "max96712";
port {
max96712_out: endpoint {
remote-endpoint = <&mipi_dphy1_in_max96712>;
max96712_dphy3_out: endpoint {
remote-endpoint = <&mipi_dphy3_in_max96712>;
data-lanes = <1 2 3 4>;
};
};
@@ -94,7 +95,7 @@
mipi4_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy1_out>;
remote-endpoint = <&csidphy3_out>;
};
};
@@ -105,7 +106,7 @@
mipi4_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi2_in>;
remote-endpoint = <&cif_mipi4_in>;
};
};
};
@@ -129,7 +130,7 @@
rockchip,cif-monitor = <3 2 1 1000 5>;
port {
cif_mipi2_in: endpoint {
cif_mipi4_in: endpoint {
remote-endpoint = <&mipi4_csi2_output>;
};
};
@@ -145,12 +146,16 @@
};
&pinctrl {
max96712 {
max96712_errb: max96712-errb {
max96712-dphy3 {
max96712_dphy3_power: max96712-dphy3-power {
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
};
max96712_dphy3_errb: max96712-dphy3-errb {
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
};
max96712_int: max96712-int {
max96712_dphy3_lock: max96712-dphy3-lock {
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

28
arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722.dtsi
View File

@@ -5,11 +5,11 @@
*/
/ {
max96722_osc: max96722-oscillator {
max96722_dphy0_osc0: max96722-dphy0-oscillator@0 {
compatible = "fixed-clock";
#clock-cells = <1>;
clock-frequency = <25000000>;
clock-output-names = "max96722-osc";
clock-output-names = "max96722-dphy0-osc0";
};
};
@@ -30,7 +30,7 @@
mipi_dphy0_in_max96722: endpoint@1 {
reg = <1>;
remote-endpoint = <&max96722_out>;
remote-endpoint = <&max96722_dphy0_out>;
data-lanes = <1 2 3 4>;
};
};
@@ -50,14 +50,16 @@
&i2c7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c7m3_xfer>, <&max96722_errb>, <&max96722_lock>;
pinctrl-0 = <&i2c7m3_xfer>;
max96722: max96722@29 {
compatible = "max96722";
max96722_dphy0: max96722@29 {
compatible = "maxim,max96722";
status = "okay";
reg = <0x29>;
clock-names = "xvclk";
clocks = <&max96722_osc 0>;
clocks = <&max96722_dphy0_osc0 0>;
pinctrl-names = "default";
pinctrl-0 = <&max96722_dphy0_power>, <&max96722_dphy0_errb>, <&max96722_dphy0_lock>;
power-domains = <&power RK3588_PD_VI>;
rockchip,grf = <&sys_grf>;
power-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
@@ -72,7 +74,7 @@
rockchip,camera-module-lens-name = "max96722";
port {
max96722_out: endpoint {
max96722_dphy0_out: endpoint {
remote-endpoint = <&mipi_dphy0_in_max96722>;
data-lanes = <1 2 3 4>;
};
@@ -145,12 +147,16 @@
};
&pinctrl {
max96722 {
max96722_errb: max96722-errb {
max96722-dphy0 {
max96722_dphy0_power: max96722-dphy0-power {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
max96722_dphy0_errb: max96722-dphy0-errb {
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
};
max96722_lock: max96722-lock {
max96722_dphy0_lock: max96722-dphy0-lock {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

5
drivers/mmc/host/dw_mmc-rockchip.c
View File

@@ -176,7 +176,7 @@ static int dw_mci_v2_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
}
if (i == ARRAY_SIZE(degrees)) {
dev_warn(host->dev, "All phases bad!");
dev_warn(host->dev, "V2 All phases bad!");
return -EIO;
}
@@ -210,8 +210,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
}
if (priv->use_v2_tuning) {
ret = dw_mci_v2_execute_tuning(slot, opcode);
if (!ret)
if (!dw_mci_v2_execute_tuning(slot, opcode))
return 0;
/* Otherwise we continue using fine tuning */
}

1
drivers/video/rockchip/vehicle/vehicle_cif.c
View File

@@ -5223,6 +5223,7 @@ int vehicle_cif_init(struct vehicle_cif *cif)
if (inf_id == RKCIF_MIPI_LVDS) {
/* 5. set csi2-mipi-dphy reg */
if (cif->dphy_hw->chip_id == CHIP_ID_RK3588 ||
cif->dphy_hw->chip_id == CHIP_ID_RK3568 ||
cif->dphy_hw->chip_id == CHIP_ID_RK3562)
cif->dphy_hw->csi2_dphy_base = cif->csi2_dphy_base;