deinterlace: pq: adjust cue setting for tl1 [1/1]

PD#SWPL-2984

Problem:
VLSI(yanling.liu) fine-tune cue setting for TL1.

Solution:
add new setting.

Verify:
tl1

Change-Id: I99c32d994687650dc851dd2fb8c0464e8ffd21b5
Signed-off-by: Jihong Sui <jihong.sui@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
This commit is contained in:
Jihong Sui
2018-12-07 10:40:26 +08:00
committed by Luan Yuan
parent 0647e61aea
commit 1046c0d685

View File

@@ -779,10 +779,10 @@ void adaptive_cue_adjust(unsigned int frame_diff, unsigned int field_diff)
/* for clockfuliness clip */
if (pcue_parm->field_count >
(pcue_parm->glb_mot_fieldnum - 6)) {
Wr(NR2_CUE_MODE, 0x50323|(Rd(NR2_CUE_MODE)&0xc00));
Wr(NR2_CUE_MODE, mask1|(Rd(NR2_CUE_MODE)&0xc00));
Wr(NR2_CUE_CON_MOT_TH, 0x03010e01);
} else {
Wr(NR2_CUE_MODE, 0x00054375|(Rd(NR2_CUE_MODE)&0xc00));
Wr(NR2_CUE_MODE, mask2|(Rd(NR2_CUE_MODE)&0xc00));
Wr(NR2_CUE_CON_MOT_TH, 0xa03c8c3c);
}
}