meida: i2c: nvp6158: cherry-pick from kernel-4.19 and adapt to

kernel-5.10

  media: i2c: add nvp6158 sensor driver from NEXTCHIP Inc
  Change-Id: I9f58e128889db55333e90e75144687ce9cc6d40f

  media: i2c: nvp6158: add v4l2 interface
  Change-Id: I7932353657f5a75f2787647c7b4f31c6c9dbde44

  media: i2c: nvp6158: add workqueue & more resolution support
  Change-Id: I6c7b762cacefe7de473a63cb275e1861c9ef096b

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: I9f58e128889db55333e90e75144687ce9cc6d40f

drivers/media/i2c/Kconfig

@@ -356,6 +356,16 @@ config VIDEO_ML86V7667
 	  To compile this driver as a module, choose M here: the
 	  module will be called ml86v7667.
 
+config VIDEO_NVP6158
+	tristate "NEXTCHIP nvp6158 driver support"
+	depends on VIDEO_V4L2 && I2C
+	help
+	  Support for the Nextchip NVP6158 multi channels digital decode to
+	  BT656/BT1120 bridge.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called nvp6158_drv.
+
 config VIDEO_NVP6324
 	tristate "NEXTCHIP nvp6324 driver support"
 	depends on VIDEO_V4L2 && I2C

drivers/media/i2c/Makefile

@@ -6,6 +6,7 @@ obj-$(CONFIG_VIDEO_SMIAPP)	+= smiapp/
 obj-$(CONFIG_VIDEO_ET8EK8)	+= et8ek8/
 obj-$(CONFIG_VIDEO_CX25840) += cx25840/
 obj-$(CONFIG_VIDEO_M5MOLS)	+= m5mols/
+obj-$(CONFIG_VIDEO_NVP6158)	+= nvp6158_drv/
 obj-$(CONFIG_VIDEO_NVP6324)	+= jaguar1_drv/
 
 obj-$(CONFIG_VIDEO_APTINA_PLL) += aptina-pll.o

drivers/media/i2c/nvp6158_drv/Makefile

@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0
+subdir-ccflags-y += -DNC_DEBUG
+nvp6158-objs	+= nvp6158_drv.o nvp6158_i2c.o \
+		   nvp6158_video.o nvp6158_coax_protocol.o \
+		   nvp6158_motion.o nvp6158_video_eq.o \
+		   nvp6158_audio.o nvp6158_video_auto_detect.o \
+		   nvp6158_v4l2.o
+
+obj-$(CONFIG_VIDEO_NVP6158)	+= nvp6158.o

drivers/media/i2c/nvp6158_drv/nvp6158_audio.h

@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+*
+*  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+*  Module		: The decoder's audio header file
+*  Description	: Audio i/o
+*  Author		:
+*  Date         :
+*  Version		: Version 2.0
+*
+********************************************************************************
+*  History      :
+*
+*
+********************************************************************************/
+#ifndef _AUDIO_H_
+#define _AUDIO_H_
+
+/********************************************************************
+ *  define and enum
+ ********************************************************************/
+#define AIG_DEF   0x08
+#define AOG_DEF   0x08
+
+/********************************************************************
+ *  structure
+ ********************************************************************/
+
+/********************************************************************
+ *  external api
+ ********************************************************************/
+extern void nvp6158_audio_init(unsigned char recmaster, unsigned char pbmaster,
+                              unsigned char ch_num, unsigned char samplerate, unsigned char bits);
+extern void nvp6168_audio_init(unsigned char recmaster, unsigned char pbmaster,
+                              unsigned char ch_num, unsigned char samplerate, unsigned char bits);
+extern void nvp6158_audio_powerdown(unsigned char chip);
+// Add for Raptor4
+void nvp6158_audio_in_type_set(int type);
+int nvp6158_audio_in_type_get(void);
+void nvp6158_audio_sample_rate_set(int sample);
+int nvp6158_audio_sample_rate_get(void);
+void nvp6158_audio_re_initialize(int devnum);
+void nvp6158_audio_set_aoc_format(decoder_dev_ch_info_s *decoder_info);
+
+#endif	// End of _AUDIO_H_
+
+/********************************************************************
+ *  End of file
+ ********************************************************************/
+

drivers/media/i2c/nvp6158_drv/nvp6158_coax_protocol.h

@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+*
+*  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+*  Module		: Raptor3 Device Driver
+*  Description	: coax_protocol.h
+*  Author		:
+*  Date         :
+*  Version		: Version 1.0
+*
+********************************************************************************
+*  History      :
+*
+*
+********************************************************************************/
+#ifndef _RAPTOR3_COAX_PROTOCOL_
+#define _RAPTOR3_COAX_PROTOCOL_
+
+#include "nvp6158_common.h"
+
+//#define BANK1 0x01
+//#define BANK2 0x02
+//#define BANK3 0x03
+//#define BANKC 0x0C
+
+#define FW_SUCCESS 0
+#define FW_FAILURE -1
+
+#define DBG_TX_INIT_PRINT 0
+#define DBG_TX_CMD_PRINT 0
+#define DBG_RX_INIT_PRINT 0
+
+typedef enum NC_COAX_CMD_DEF
+{
+	COAX_CMD_UNKNOWN = 0,
+	COAX_CMD_IRIS_INC,
+	COAX_CMD_IRIS_DEC,
+	COAX_CMD_FOCUS_INC,
+	COAX_CMD_FOCUS_DEC,
+	COAX_CMD_ZOOM_INC,
+	COAX_CMD_ZOOM_DEC,
+	COAX_CMD_OSD_ON,
+	COAX_CMD_PTZ_UP,
+	COAX_CMD_PTZ_DOWN,
+	COAX_CMD_PTZ_LEFT,
+	COAX_CMD_PTZ_RIGHT,
+	COAX_CMD_OSD_ENTER,
+	COAX_CMD_SPECIAL_FW,
+	COAX_CMD_SPECIAL_CAMEQ,
+	COAX_CMD_SPECIAL_FPS,
+	COAX_CMD_SPECIAL_MOTION,
+	COAX_CMD_SPECIAL_3DNR_REQUEST,
+	COAX_CMD_TVI_DOWNSTREAM_REQUEST,
+	COAX_CMD_OSD_UP,
+	COAX_CMD_OSD_DOWN,
+	COAX_CMD_OSD_LEFT,
+	COAX_CMD_OSD_RIGHT,
+	COAX_CMD_STOP,
+
+	COAX_CMD_MAX,
+
+} NC_COAX_CMD_DEF;
+
+/*=============================================================
+ * Coaxial Test Structure[APP <-> DRV]
+ ==============================================================*/
+typedef struct NC_VD_COAX_TEST_STR{
+	 unsigned char ch;
+	 unsigned char chip_num;
+	 unsigned char bank;
+	 unsigned char data_addr;
+	 unsigned char param;
+
+	 unsigned char rx_src;             //B5/6/7/8 0x7C
+	 unsigned char rx_slice_lev;       //B5/6/7/8 0x7D
+	 unsigned char tx_baud;            //B3/4 0x00/80
+	 unsigned char tx_pel_baud;        //B3/4 0x02/82
+	 unsigned char tx_line_pos0;       //B3/4 0x03/83
+	 unsigned char tx_line_pos1;       //B3/4 0x04/84
+	 unsigned char tx_pel_line_pos0;   //B3/4 0x07/87
+	 unsigned char tx_pel_line_pos1;   //B3/4 0x08/88
+	 unsigned char tx_line_count;      //B3/4 0x05/85
+	 unsigned char tx_line_count_max;  //B3/4 0x0A/8A
+	 unsigned char tx_mode;            //B3/4 0x0B/8B
+	 unsigned char tx_sync_pos0;       //B3/4 0x0D/8D
+	 unsigned char tx_sync_pos1;       //B3/4 0x0E/8E
+	 unsigned char tx_even;            //B3/4 0x2F/AF
+	 unsigned char tx_zero_length;     //B3/4 0x0C/
+} NC_VD_COAX_TEST_STR;
+
+typedef struct NC_VD_COAX_BANK_DUMP_STR{
+	 unsigned char ch;
+	 unsigned char vd_dev;
+	 unsigned char bank;
+
+	 unsigned char rx_pelco_data[256];
+
+} NC_VD_COAX_BANK_DUMP_STR;
+
+/*=============================================================
+ * Coaxial UP/Down Stream Initialize Structure[APP -> DRV]
+ ==============================================================*/
+typedef struct NC_VD_COAX_STR{
+	 char *name;
+	 unsigned char ch;
+	 unsigned char vd_dev;
+	 unsigned char param;
+	 NC_FORMAT_STANDARD format_standard;
+	 NC_FORMAT_RESOLUTION format_resolution;
+	 NC_FORMAT_FPS format_fps;
+	 NC_VIVO_CH_FORMATDEF vivo_fmt;
+	 NC_COAX_CMD_DEF cmd;
+
+	 unsigned char rx_pelco_data[8];
+	 unsigned char rx_data1[8];
+	 unsigned char rx_data2[8];
+	 unsigned char rx_data3[8];
+	 unsigned char rx_data4[8];
+	 unsigned char rx_data5[8];
+	 unsigned char rx_data6[8];
+
+} NC_VD_COAX_STR;
+
+typedef struct _nvp6158_coax_str{
+	unsigned char ch;
+	unsigned char param;
+	NC_VIVO_CH_FORMATDEF fmt_def;
+	NC_COAX_CMD_DEF cmd;
+	unsigned char rx_pelco_data[8];
+	unsigned char rx_data1[8];
+	unsigned char rx_data2[8];
+	unsigned char rx_data3[8];
+	unsigned char rx_data4[8];
+	unsigned char rx_data5[8];
+	unsigned char rx_data6[8];
+
+} nvp6158_coax_str;
+
+/*=============================================================
+ * COAX FW Upgrade
+ ==============================================================*/
+typedef struct __file_information
+{
+	unsigned int	channel;                // FirmUP Channel
+	unsigned int	cp_mode;                // Channel Format
+  	unsigned char 	filename[64];           //
+  	unsigned char 	filePullname[64+32];    // FirmUP FileNmae
+  	unsigned int	filesize;
+  	unsigned int	filechecksum;		// (sum of file&0x0000FFFFF)
+  	unsigned int	currentpacketnum;	// current packet sequnce number(0,1,2........)
+  	unsigned int	filepacketnum;		// file packet number = (total size/128bytes), if remain exist, file packet number++
+  	unsigned char 	onepacketbuf[128+32];
+
+  	unsigned int	currentFileOffset;	// Current file offset
+  	unsigned int	readsize;		// currnet read size
+
+  	unsigned int	receive_addr;
+
+  	unsigned int	ispossiblefirmup[16]; 	// is it possible to update firmware?
+  	int 		result;
+
+  	int		appstatus[16];		// Application status
+
+} FIRMWARE_UP_FILE_INFO, *PFIRMWARE_UP_FILE_INFO;
+
+// Coaxial UP Stream Function
+void nvp6158_coax_tx_init( nvp6158_coax_str *ps_coax_str );     // Coax Tx : Initialize
+void nvp6158_coax_tx_cmd_send( nvp6158_coax_str *ps_coax_str ); // Coax Tx : Command Send
+
+int nvp6158_coax_tx_16bit_init( nvp6158_coax_str *ps_coax_str );
+void nvp6158_coax_tx_16bit_cmd_send( nvp6158_coax_str *ps_coax_str );
+void nvp6158_coax_tx_cvi_new_cmd_send( nvp6158_coax_str *ps_coax_str );
+
+// Coaxial Down Stream Function
+void nvp6158_coax_rx_init( nvp6158_coax_str *ps_coax_str );          	// Coax Rx : Initialize
+void nvp6158_coax_rx_data_get( nvp6158_coax_str *coax_rx );      	// Coax Rx : All Rx Buffer read
+void nvp6158_coax_rx_buffer_clear( nvp6158_coax_str *ps_coax_str );  	// Coax Rx : Rx Buffer Clear
+void nvp6158_coax_rx_deinit( nvp6158_coax_str *ps_coax_str );        	// Coax Rx : 3x63 Set[ 1 -> 0 ]
+
+// Coaxial FW Update Function
+void nvp6158_coax_fw_ready_header_check_from_isp_recv(void *p_param);
+void nvp6158_coax_fw_ready_cmd_to_isp_send(void *p_param);                // 1.1 FW Update Ready Command Send
+void nvp6158_coax_fw_ready_cmd_ack_from_isp_recv(void *p_param);          // 1.2 FW Update Ready ACK
+void nvp6158_coax_fw_start_cmd_to_isp_send( void *p_param );              // 2.1 FW Update Start Command Send
+void nvp6158_coax_fw_start_cmd_ack_from_isp_recv( void *p_param );        // 2.2 FW Update Start ACK
+void nvp6158_coax_fw_one_packet_data_to_isp_send( void *p_param );        // 3.1 FW Update One Packet Data Send
+void nvp6158_coax_fw_one_packet_data_ack_from_isp_recv( void *p_param );  // 3.2 FW Update One Packet Data ACK
+void nvp6158_coax_fw_end_cmd_to_isp_send( void *p_param );                // 4.1 FW Update End Command Send
+void nvp6158_coax_fw_end_cmd_ack_from_isp_recv( void *p_param );          // 4.2 FW Update End ACK
+
+// Coaxial Option
+void nvp6158_coax_option_rt_nrt_mode_change_set(void *p_param);    // RT, NRT Mode change
+
+// Coaxial Test Function
+void nvp6158_coax_test_tx_init_read(NC_VD_COAX_TEST_STR *coax_tx_mode);    // Coax Test : Tx Init Read
+void nvp6158_coax_test_data_set(NC_VD_COAX_TEST_STR *coax_data);           // Coax Test : 1byte Data write
+void nvp6158_coax_test_data_get(NC_VD_COAX_TEST_STR *coax_data);           // Coax Test : 1byte Data read
+void nvp6158_coax_test_Bank_dump_get(NC_VD_COAX_BANK_DUMP_STR *coax_data); // Bank Dump
+unsigned char nvp6158_coax_acp_isp_read(unsigned char ch, unsigned int reg_addr);
+unsigned char nvp6158_coax_acp_isp_write(unsigned char ch, unsigned int reg_addr, unsigned char reg_data);
+
+#endif
+/********************************************************************
+ *  End of file
+ ********************************************************************/

drivers/media/i2c/nvp6158_drv/nvp6158_common.h

@@ -0,0 +1,537 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+*
+*  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+*  Module		: Common header file
+*  Description	: This file is common header file
+*  Author		:
+*  Date         :
+*  Version		: Version 2.0
+*
+********************************************************************************
+*  History      :
+*
+*
+********************************************************************************/
+#ifndef __COMMON_H__
+#define __COMMON_H__
+
+unsigned char nvp6158_I2CReadByte8(unsigned char devaddress, unsigned char address);
+void nvp6158_I2CWriteByte8(unsigned char devaddress, unsigned char address, unsigned char data);
+
+#define  gpio_i2c_read   nvp6158_I2CReadByte8
+#define  gpio_i2c_write  nvp6158_I2CWriteByte8
+
+//#define STREAM_ON_DEFLAULT
+
+#define I2C_0       (0)
+#define I2C_1       (1)
+#define I2C_2       (2)
+#define I2C_3       (3)
+
+// device address define
+#define NVP6158_R0_ID 	0xA1
+#define NVP6158C_R0_ID 	0xA0   //6158B AND 6158C USES THE SAME CHIPID,DIFF IN REV_ID
+#define NVP6158_REV_ID 	0x00
+#define NVP6168_R0_ID 	0xC1
+#define NVP6168C_R0_ID 	0xC0
+//#define NVP6158C_REV_ID 	0x01
+#define CH_PER_CHIP		4
+
+#define NTSC		0x00
+#define PAL			0x01
+
+#define AHD_PELCO_16BIT
+
+enum {
+    NC_AD_SAMPLE_RATE_8000 = 8000,
+    NC_AD_SAMPLE_RATE_16000 = 16000,
+    NC_AD_SAMPLE_RATE_32000 = 32000,
+    NC_AD_SAMPLE_RATE_44100 = 44100,
+
+    NC_AD_SAMPLE_RATE_MAX,
+};
+
+enum {
+	NC_AD_AI = 0,
+	NC_AD_AOC,
+
+	NC_AD_MAX
+};
+
+enum {
+	NC_AD_BIT_WIDTH_8 = 0,
+	NC_AD_BIT_WIDTH_16,
+	NC_AD_BIT_WIDTH_24,
+
+	NC_AD_BIT_WIDTH_MAX
+};
+
+//FIXME HI3520 Register
+#define VIU_CH_CTRL					0x08
+#define VIU_ANC0_START				0x9c
+#define VIU_ANC0_SIZE				0xa0
+#define VIU_ANC1_START				0xa4
+#define VIU_ANC1_SIZE				0xa8
+#define VIU_BLANK_DATA_ADDR			0xac
+
+#define IOC_VDEC_GET_EQ_DIST			0x07
+#define IOC_VDEC_GET_INPUT_VIDEO_FMT	0x08
+#define IOC_VDEC_GET_VIDEO_LOSS     	0x09
+#define IOC_VDEC_SET_SYNC		     	0x0A
+#define IOC_VDEC_SET_EQUALIZER			0x0B
+#define IOC_VDEC_GET_DRIVERVER			0x0C
+#define IOC_VDEC_PTZ_ACP_READ			0x0D
+#define IOC_VDEC_SET_BRIGHTNESS	    	0x0E
+#define IOC_VDEC_SET_CONTRAST   		0x0F
+#define IOC_VDEC_SET_HUE    			0x10
+#define IOC_VDEC_SET_SATURATION  		0x11
+#define IOC_VDEC_SET_SHARPNESS  		0x12
+#define IOC_VDEC_SET_CHNMODE    		0x13
+#define IOC_VDEC_SET_OUTPORTMODE  		0x14
+#define IOC_VDEC_SET_CHDETMODE  		0x15
+
+#define IOC_VDEC_ACP_WRITE              0x2f
+#define IOC_VDEC_ACP_WRITE_EXTENTION    0x30
+#define IOC_VDEC_PTZ_ACP_READ_EACH_CH	0x31
+
+#define IOC_VDEC_INIT_MOTION			0x40
+#define IOC_VDEC_ENABLE_MOTION			0x41
+#define IOC_VDEC_DISABLE_MOTION			0x42
+#define IOC_VDEC_SET_MOTION_AREA		0x43
+#define IOC_VDEC_GET_MOTION_INFO		0x44
+#define IOC_VDEC_SET_MOTION_DISPLAY		0x45
+#define IOC_VDEC_SET_MOTION_SENS		0x46
+
+#define IOC_AUDIO_SET_CHNNUM            0x80
+#define IOC_AUDIO_SET_SAMPLE_RATE       0x81
+#define IOC_AUDIO_SET_BITWIDTH          0x82
+#define IOC_VDEC_SET_I2C				0x83
+
+#define IOC_VDEC_ACP_POSSIBLE_FIRMUP	0xA0	// by Andy(2016-06-26)
+#define IOC_VDEC_ACP_CHECK_ISPSTATUS    0xA1	// by Andy(2016-07-12)
+#define IOC_VDEC_ACP_START_FIRMUP	    0xA2	// by Andy(2016-07-12)
+#define IOC_VDEC_ACP_FIRMUP				0xA3	// by Andy(2016-06-26)
+#define IOC_VDEC_ACP_FIRMUP_END			0xA4	// by Andy(2016-06-26)
+
+#define IOC_VDEC_GET_ADC_CLK			0xB1
+#define IOC_VDEC_SET_ADC_CLK			0xB2
+
+/*----------------------- Coaxial protocol  ---------------------*/
+// Coax UP Stream - 8bit
+#define IOC_VDEC_COAX_TX_INIT			  0xA0
+#define IOC_VDEC_COAX_TX_CMD_SEND	  0xA1
+
+// Coax UP Stream - 16bit only ACP 720P Support
+#define IOC_VDEC_COAX_TX_16BIT_INIT		  0xB4
+#define IOC_VDEC_COAX_TX_16BIT_CMD_SEND	  0xB5
+#define IOC_VDEC_COAX_TX_CVI_NEW_CMD_SEND 0xB6
+
+// Coax Down Stream
+#define IOC_VDEC_COAX_RX_INIT      0xA2
+#define IOC_VDEC_COAX_RX_DATA_READ 0xA3
+#define IOC_VDEC_COAX_RX_BUF_CLEAR 0xA4
+#define IOC_VDEC_COAX_RX_DEINIT    0xA5
+
+// Coax Test
+#define IOC_VDEC_COAX_TEST_TX_INIT_DATA_READ  0xA6
+#define IOC_VDEC_COAX_TEST_DATA_SET           0xA7
+#define IOC_VDEC_COAX_TEST_DATA_READ          0xA8
+
+// Coax FW Update
+#define IOC_VDEC_COAX_FW_ACP_HEADER_GET     0xA9
+#define IOC_VDEC_COAX_FW_READY_CMD_SET  0xAA
+#define IOC_VDEC_COAX_FW_READY_ACK_GET  0xAB
+#define IOC_VDEC_COAX_FW_START_CMD_SET  0xAC
+#define IOC_VDEC_COAX_FW_START_ACK_GET  0xAD
+#define IOC_VDEC_COAX_FW_SEND_DATA_SET  0xAE
+#define IOC_VDEC_COAX_FW_SEND_ACK_GET   0xAF
+#define IOC_VDEC_COAX_FW_END_CMD_SET    0xB0
+#define IOC_VDEC_COAX_FW_END_ACK_GET    0xB1
+
+// Bank Dump Test
+#define IOC_VDEC_COAX_BANK_DUMP_GET    0xB2
+
+// ACP Option
+#define IOC_VDEC_COAX_RT_NRT_MODE_CHANGE_SET 0xB3
+
+/*----------------------- MOTION -----------------*/
+#define IOC_VDEC_MOTION_SET			0x70
+#define IOC_VDEC_MOTION_PIXEL_SET     0x71
+#define IOC_VDEC_MOTION_PIXEL_GET     0x72
+#define IOC_VDEC_MOTION_TSEN_SET      0x73
+#define IOC_VDEC_MOTION_PSEN_SET      0x74
+#define IOC_VDEC_MOTION_ALL_PIXEL_SET 0x75
+#define IOC_VDEC_MOTION_DETECTION_GET 0x76
+
+typedef struct _nvp6158_video_mode
+{
+    unsigned int chip;
+    unsigned int mode;
+	unsigned char vformat[16];
+	unsigned char chmode[16];
+}nvp6158_video_mode;
+
+typedef struct _nvp6158_chn_mode
+{
+    unsigned char ch;
+	unsigned char vformat;
+	unsigned char chmode;
+}nvp6158_chn_mode;
+
+typedef struct _nvp6158_opt_mode
+{
+	unsigned char chipsel;
+    unsigned char portsel;
+	unsigned char portmode;
+	unsigned char chid;
+}nvp6158_opt_mode;
+
+typedef struct _nvp6158_input_videofmt
+{
+    unsigned int inputvideofmt[16];
+	unsigned int getvideofmt[16];
+	unsigned int geteqstage[16];
+	unsigned int getacpdata[16][8];
+}nvp6158_input_videofmt;
+
+typedef struct _nvp6158_input_videofmt_ch
+{
+	unsigned char ch;
+	nvp6158_input_videofmt vfmt;
+}nvp6158_input_videofmt_ch;
+
+typedef struct _nvp6124_i2c_mode
+{
+	unsigned char flag;       // 0: read, 1 : write
+	unsigned char slaveaddr;
+	unsigned char bank;
+	unsigned char address;
+	unsigned char data;
+}nvp6124_i2c_mode;
+
+typedef struct _nvp6158_video_adjust
+{
+ 	unsigned char ch;
+	unsigned char value;
+}nvp6158_video_adjust;
+
+typedef struct _nvp6158_motion_area
+{
+    unsigned char ch;
+    int m_info[12];
+}nvp6158_motion_area;
+
+typedef struct _nvp6158_audio_playback
+{
+    unsigned char chip;
+    unsigned char ch;
+}nvp6158_audio_playback;
+
+typedef struct _nvp6158_audio_da_mute
+{
+    unsigned char chip;
+}nvp6158_audio_da_mute;
+
+typedef struct _nvp6158_audio_da_volume
+{
+    unsigned char chip;
+    unsigned char volume;
+}nvp6158_audio_da_volume;
+
+typedef struct _nvp6158_audio_format
+{
+	unsigned char format;   /* 0:i2s; 1:dsp */
+    unsigned char mode;   /* 0:slave 1:master*/
+	unsigned char dspformat; /*0:dsp;1:ssp*/
+    unsigned char clkdir;  /*0:inverted;1:non-inverted*/
+	unsigned char chn_num; /*2,4,8,16*/
+	unsigned char bitrate; /*0:256fs 1:384fs invalid for nvp6114 2:320fs*/
+	unsigned char precision;/*0:16bit;1:8bit*/
+	unsigned char samplerate;/*0:8kHZ;1:16kHZ; 2:32kHZ*/
+} nvp6158_audio_format;
+
+// by Andy(2016-06-26)
+/*typedef struct __file_information
+{
+	unsigned int	channel;
+  	unsigned char 	filename[64];
+  	unsigned char 	filePullname[64+32];
+  	unsigned int	filesize;
+  	unsigned int	filechecksum;			// (sum of file&0x0000FFFFF)
+  	unsigned int	currentpacketnum;		// current packet sequnce number(0,1,2........)
+  	unsigned int	filepacketnum;			// file packet number = (total size/128bytes), if remain exist, file packet number++
+  	unsigned char 	onepacketbuf[128+32];
+
+  	unsigned int	currentFileOffset;		// Current file offset
+  	unsigned int	readsize;				// currnet read size
+
+  	unsigned int	ispossiblefirmup[16]; 	// is it possible to update firmware?
+  	int 			result;
+
+  	int				appstatus[16];			// Application status
+
+} FIRMWARE_UP_FILE_INFO, *PFIRMWARE_UP_FILE_INFO;
+*/
+enum __CABLE_TYPE_INFORMATION__
+{
+	CABLE_TYPE_COAX=0,
+	CABLE_TYPE_UTP,
+
+	CABLE_TYPE_MAX
+};
+
+enum __DETECTION_TYPE_INFORMATION__
+{
+	DETECTION_TYPE_AUTO=0,
+	DETECTION_TYPE_AHD,
+	DETECTION_TYPE_CHD,
+	DETECTION_TYPE_THD,
+	DETECTION_TYPE_CVBS,
+
+	DETECTION_TYPE_MAX
+};
+
+#define NVP6158_IOC_MAGIC            'n'
+
+#define NVP6158_SET_AUDIO_PLAYBACK   		_IOW(NVP6158_IOC_MAGIC, 0x21, nvp6158_audio_playback) 
+#define NVP6158_SET_AUDIO_DA_MUTE    		_IOW(NVP6158_IOC_MAGIC, 0x22, nvp6158_audio_da_mute)
+#define NVP6158_SET_AUDIO_DA_VOLUME  		_IOW(NVP6158_IOC_MAGIC, 0x23, nvp6158_audio_da_volume)
+/*set record format*/
+#define NVP6158_SET_AUDIO_R_FORMAT     		_IOW(NVP6158_IOC_MAGIC, 0x24, nvp6158_audio_format)
+/*set playback format*/
+#define NVP6158_SET_AUDIO_PB_FORMAT     	_IOW(NVP6158_IOC_MAGIC, 0x25, nvp6158_audio_format)
+
+#define _SET_BIT(data,bit) ((data)|=(1<<(bit)))
+#define _CLE_BIT(data,bit) ((data)&=(~(1<<(bit))))
+//////////////////////////////////////
+typedef enum _NC_VIDEO_ONOFF
+{
+	VIDEO_LOSS_ON = 0,
+	VIDEO_LOSS_OFF = 1,
+
+} NC_VIDEO_ONOFF;
+
+typedef struct _decoder_dev_ch_info_s
+{
+	unsigned char ch;
+	unsigned char devnum;
+	unsigned char fmt_def;
+}decoder_dev_ch_info_s;
+
+typedef enum NC_VIVO_CH_FORMATDEF
+{
+	NC_VIVO_CH_FORMATDEF_UNKNOWN = 0,
+	NC_VIVO_CH_FORMATDEF_AUTO,
+
+	AHD20_SD_H960_NT,   //960h*480i
+	AHD20_SD_H960_PAL,  //960h*576i
+	AHD20_SD_SH720_NT,  //720h*480i
+	AHD20_SD_SH720_PAL, //720h*576i
+	AHD20_SD_H1280_NT,
+	AHD20_SD_H1280_PAL,
+	AHD20_SD_H1440_NT,
+	AHD20_SD_H1440_PAL,
+	AHD20_SD_H960_EX_NT,  //1920h*480i
+	AHD20_SD_H960_EX_PAL, //1920h*576i
+	AHD20_SD_H960_2EX_NT,
+	AHD20_SD_H960_2EX_PAL,
+	AHD20_SD_H960_2EX_Btype_NT,	 //3840h*480i
+	AHD20_SD_H960_2EX_Btype_PAL, //3840h*576i
+
+	AHD30_4M_30P,
+	AHD30_4M_25P,
+	AHD30_4M_15P,
+	AHD30_3M_30P,
+	AHD30_3M_25P,
+	AHD30_3M_18P,	//2048 x 1536
+	AHD30_5M_12_5P,	//2592 x 1944
+	AHD30_5M_20P,	//2592 x 1944
+
+	AHD30_5_3M_20P,
+	AHD30_6M_18P,
+	AHD30_6M_20P,
+	AHD30_8M_X_30P,
+	AHD30_8M_X_25P,
+	AHD30_8M_7_5P,
+	AHD30_8M_12_5P,
+	AHD30_8M_15P,
+
+	TVI_FHD_30P,
+	TVI_FHD_25P,
+	TVI_HD_60P,
+	TVI_HD_50P,
+	TVI_HD_30P,
+	TVI_HD_25P,
+	TVI_HD_30P_EX,
+	TVI_HD_25P_EX,
+	TVI_HD_B_30P,
+	TVI_HD_B_25P,
+	TVI_HD_B_30P_EX,
+	TVI_HD_B_25P_EX,
+	TVI_3M_18P,	//1920 x 1536
+	TVI_5M_12_5P,
+	TVI_5M_20P,
+	TVI_4M_30P,
+	TVI_4M_25P,
+	TVI_4M_15P,
+	TVI_8M_15P, 
+	TVI_8M_12_5P,
+
+	CVI_FHD_30P,
+	CVI_FHD_25P,
+	CVI_HD_60P,
+	CVI_HD_50P,
+	CVI_HD_30P,
+	CVI_HD_25P,
+	CVI_HD_30P_EX,
+	CVI_HD_25P_EX,
+	CVI_4M_30P,
+	CVI_4M_25P,
+	CVI_5M_20P,
+	CVI_8M_15P,
+	CVI_8M_12_5P,
+
+	AHD20_1080P_60P,
+	AHD20_1080P_50P,
+	AHD20_1080P_15P,
+	AHD20_1080P_12_5P,
+
+	TVI_FHD_60P,
+	TVI_FHD_50P,
+
+	AHD20_960P_30P,
+	AHD20_960P_25P,
+	AHD20_960P_60P,
+	AHD20_960P_50P,
+
+	AHD20_1080P_15P_EX, // Hidden For test
+	AHD20_1080P_12_5P_EX, // Hidden For test
+
+	AHD20_720P_15P_2EX_Btype, // Hidden For test
+	AHD20_720P_12_5P_2EX_Btype, // Hidden For test
+
+	AHD20_720P_15P_EX_Btype, // Hidden For test
+	AHD20_720P_12_5P_EX_Btype, // Hidden For test
+
+	AHD20_1080P_30P,
+	AHD20_1080P_25P,
+
+	AHD20_720P_60P,
+	AHD20_720P_50P,
+	AHD20_720P_30P,
+	AHD20_720P_25P,
+	AHD20_720P_30P_EX,
+	AHD20_720P_25P_EX,
+	AHD20_720P_30P_EX_Btype,
+	AHD20_720P_25P_EX_Btype,
+
+	NC_VIVO_CH_FORMATDEF_MAX,
+
+} NC_VIVO_CH_FORMATDEF;
+
+typedef enum NC_FORMAT_FPS
+{
+	FMT_FPS_UNKNOWN = 0,
+	FMT_NT = 1,
+	FMT_PAL,
+	FMT_12_5P,
+	FMT_7_5P,
+	FMT_30P,
+	FMT_25P,
+	FMT_50P,
+	FMT_60P,
+	FMT_15P,
+	FMT_18P,
+	FMT_18_75P,
+	FMT_20P,
+
+	FMT_FPS_MAX,
+
+} NC_FORMAT_FPS;
+
+typedef enum NC_FORMAT_STANDARD
+{
+	FMT_STD_UNKNOWN = 0,
+	FMT_SD,
+	FMT_AHD20,
+	FMT_AHD30,
+	FMT_TVI,
+	FMT_CVI,
+
+	FMT_AUTO,		// FIXME
+
+	FMT_STD_MAX,
+
+} NC_FORMAT_STANDARD;
+
+typedef enum NC_FORMAT_RESOLUTION
+{
+	FMT_RESOL_UNKNOWN = 0,
+	FMT_SH720,
+	FMT_H960,
+	FMT_H1280,
+	FMT_H1440,
+	FMT_H960_EX,
+	FMT_H960_2EX,
+	FMT_H960_Btype_2EX,
+	FMT_720P,
+	FMT_720P_EX,
+	FMT_720P_Btype,
+	FMT_720P_Btype_EX,
+	FMT_1080P,
+	FMT_1080P_EX,
+	FMT_3M,
+	FMT_4M,
+	FMT_5M,
+	FMT_5_3M,
+	FMT_6M,
+	FMT_8M_X,
+	FMT_8M,
+
+	FMT_H960_Btype_2EX_SP,
+	FMT_720P_Btype_EX_SP,
+
+	FMT_RESOL_MAX,
+
+} NC_FORMAT_RESOLUTION;
+
+typedef enum _dvp_mode
+{
+	BT601 = 0,
+	BT656_1MUX,
+	BT656_2MUX,
+	BT656_4MUX,
+	BT656I_TEST_MODES,
+	BT1120_1MUX,
+	BT1120_2MUX,
+	BT1120_4MUX,
+	NVP6158_DVP_MODES_END
+} NVP6158_DVP_MODE;
+
+typedef struct VDEC_DEV_INFORM_S{
+
+	unsigned char nvp6158_chip_id[4];
+	unsigned char chip_rev[4];
+	unsigned char chip_addr[4];
+
+	unsigned char Total_Port_Num;
+	unsigned char Total_Chip_Cnt;
+
+}VDEC_DEV_INFORM_S;
+
+typedef struct _NVP6158_INFORMATION_S
+{
+	unsigned char			ch;
+	NC_VIVO_CH_FORMATDEF 	curvideofmt[ 16 ];
+	NC_VIVO_CH_FORMATDEF 	prevideofmt[ 16 ];
+	unsigned char 		 	curvideoloss[ 16 ];
+	unsigned char			vfc[16];
+	unsigned char			debounce[16][5];
+	unsigned char			debounceidx[16];
+	VDEC_DEV_INFORM_S 		chipinform;
+
+} NVP6158_INFORMATION_S;
+
+#endif
+

drivers/media/i2c/nvp6158_drv/nvp6158_dev.c

@@ -0,0 +1,309 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+*
+*  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+*  Copyright (c) 2021 	Rockchip Electronics Co. Ltd.All rights reserved.
+*  Module		: install driver main
+*  Description	: driver main
+*  Author		:
+*  Date         :
+*  Version		: Version 2.0
+*
+********************************************************************************
+*  History      :
+*
+*
+********************************************************************************/
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/fcntl.h>
+#include <linux/mm.h>
+#include <linux/proc_fs.h>
+
+#ifndef CONFIG_HISI_SNAPSHOT_BOOT
+#include <linux/miscdevice.h>
+#endif
+
+#include <linux/fs.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/uaccess.h>
+#include <asm/io.h>
+//#include <asm/system.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/string.h>
+#include <linux/list.h>
+#include <asm/delay.h>
+#include <linux/timer.h>
+#include <linux/delay.h>
+#include <linux/proc_fs.h>
+#include <linux/poll.h>
+#include <asm/bitops.h>
+#include <linux/uaccess.h>
+#include <asm/irq.h>
+#include <linux/moduleparam.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/semaphore.h>
+#include <linux/kthread.h>
+
+#include <linux/i2c.h>
+#include <linux/i2c-dev.h>
+
+//#include "gpio_i2c.h"
+#include "nvp6158_video.h"
+#include "nvp6158_coax_protocol.h"
+#include "nvp6158_motion.h"
+#include "nvp6158_common.h"
+#include "nvp6158_audio.h"
+#include "nvp6158_video_auto_detect.h"
+//#include "acp_firmup.h"
+#include "nvp6158_video_eq.h"
+#include "nvp6158_drv.h"
+
+unsigned int nvp6158_mode = PAL;  //0:ntsc, 1: pal
+unsigned int nvp6158_kthread = 0;
+
+module_param(nvp6158_mode, uint, S_IRUGO);
+
+module_param(nvp6158_kthread, uint, S_IRUGO);
+#ifdef CONFIG_HISI_SNAPSHOT_BOOT
+static struct himedia_device s_stNvp6158Device;
+#endif
+
+#ifdef CONFIG_HISI_SNAPSHOT_BOOT
+static int nvp6158_freeze(struct himedia_device* pdev)
+{
+    printk(KERN_ALERT "%s  %d\n", __FUNCTION__, __LINE__);
+    return 0;
+}
+
+static int nvp6158_restore(struct himedia_device* pdev)
+{
+    printk(KERN_ALERT "%s  %d\n", __FUNCTION__, __LINE__);
+    return 0;
+}
+#endif
+
+static const struct file_operations nvp6158_fops = {
+	.owner      = THIS_MODULE,
+    	.unlocked_ioctl	= nvp6158_native_ioctl,
+	.open       = nvp6158_open,
+	.release    = nvp6158_close,
+};
+
+#ifdef CONFIG_HISI_SNAPSHOT_BOOT
+struct himedia_ops stNvp6158DrvOps =
+{
+    .pm_freeze = nvp6158_freeze,
+    .pm_restore  = nvp6158_restore
+};
+#endif
+
+/*******************************************************************************
+*	Description		: kernel thread for EQ (now, not used)
+*	Argurments		: void
+*	Return value	: 0
+*	Modify			:
+*	warning			:
+*******************************************************************************/
+#ifdef STREAM_ON_DEFLAULT
+static int nvp6158_kernel_thread(void *data)
+{
+	//int ch;
+	//nvp6158_input_videofmt videofmt;
+	NVP6158_INFORMATION_S s_nvp6158_vfmts;
+	video_equalizer_info_s s_eq_info;
+	unsigned char prefmt=0, curfmt=0, chvloss=0;
+	unsigned char ch = 0;
+
+	memset(&s_nvp6158_vfmts, 0, sizeof(NVP6158_INFORMATION_S));
+
+	while(!kthread_should_stop()) {
+		#if 1  //standard rutine of a process
+		down(&nvp6158_lock);
+		ch = ch % (nvp6158_cnt*4);
+		nvp6158_getvideoloss();
+		if(nvp6158_chip_id[0]==NVP6158C_R0_ID || nvp6158_chip_id[0]==NVP6158_R0_ID) {
+			nvp6158_video_fmt_det(ch, &s_nvp6158_vfmts);
+			curfmt = s_nvp6158_vfmts.curvideofmt[ch];
+			prefmt = s_nvp6158_vfmts.prevideofmt[ch];
+			chvloss = s_nvp6158_vfmts.curvideoloss[ch];
+			//printk(">>>>>>%s CH[%d] chvloss = %d curfmt = %x prefmt = %x\n", __func__, ch, chvloss, curfmt, prefmt);
+
+			if(chvloss == 0x00) {	
+				if(nvp6158_ch_mode_status[ch] != prefmt) {
+					nvp6158_set_chnmode(ch, curfmt);
+					nvp6158_set_portmode(0, ch%4, NVP6158_OUTMODE_1MUX_FHD, ch%4);
+					s_eq_info.Ch = ch%4;
+					s_eq_info.devnum = ch/4;
+					s_eq_info.FmtDef = curfmt;
+					nvp6158_get_eq_dist(&s_eq_info);
+					s_nvp6158_vfmts.prevideofmt[ch] = curfmt;
+					printk(">>>>>>%s CH[%d] s_eq_info.distance = %d\n",
+						__func__, ch, s_eq_info.distance);
+					nvp6158_set_equalizer(&s_eq_info);
+					
+				}
+			} else {	
+				if(nvp6158_ch_mode_status[ch] != NC_VIVO_CH_FORMATDEF_UNKNOWN) {
+					nvp6158_set_chnmode(ch, NC_VIVO_CH_FORMATDEF_UNKNOWN);
+					nvp6158_set_portmode(0, ch%4, NVP6158_OUTMODE_1MUX_FHD, ch%4);
+				}
+			}
+		} else {
+			nvp6168_video_fmt_det(ch, &s_nvp6158_vfmts);
+			curfmt = s_nvp6158_vfmts.curvideofmt[ch];
+			prefmt = s_nvp6158_vfmts.prevideofmt[ch];
+			chvloss = s_nvp6158_vfmts.curvideoloss[ch];
+			//printk(">>>>>>%s CH[%d] chvloss = %d curfmt = %x prefmt = %x nvp6158_ch_mode_status[%d]=%x\n", __func__, ch, chvloss, curfmt, prefmt, ch, nvp6158_ch_mode_status[ch]);
+
+			if(chvloss == 0x00) {
+				if(nvp6158_ch_mode_status[ch] != prefmt) {
+					nvp6168_set_chnmode(ch, curfmt);
+					nvp6158_set_portmode(0, ch%4, NVP6158_OUTMODE_1MUX_FHD, ch%4);
+					s_eq_info.Ch = ch%4;
+					s_eq_info.devnum = ch/4;
+					s_eq_info.FmtDef = curfmt;
+					nvp6158_get_eq_dist(&s_eq_info);
+					s_nvp6158_vfmts.prevideofmt[ch] = curfmt;
+					printk(">>>>>>%s CH[%d] s_eq_info.distance = %d\n", __func__, ch, s_eq_info.distance);
+					nvp6168_set_equalizer(&s_eq_info);
+				}
+			} else {
+				if(nvp6158_ch_mode_status[ch] != NC_VIVO_CH_FORMATDEF_UNKNOWN) {
+					nvp6168_set_chnmode(ch, NC_VIVO_CH_FORMATDEF_UNKNOWN);
+					nvp6158_set_portmode(0, ch%4, NVP6158_OUTMODE_1MUX_FHD, ch%4);
+				}
+			}
+		}
+		ch ++;
+		up(&nvp6158_lock);
+		#endif
+		schedule_timeout_interruptible(msecs_to_jiffies(200));
+		//printk("nvp6158_kernel_thread running\n");
+	}
+
+	return 0;
+}
+#endif
+
+/*******************************************************************************
+*	Description		: It is called when "insmod nvp61XX_ex.ko" command run
+*	Argurments		: void
+*	Return value	: -1(could not register nvp61XX device), 0(success)
+*	Modify			:
+*	warning			:
+*******************************************************************************/
+struct proc_dir_entry *nvp6158_dir;
+#define NVP6158_PROC_ENTRY "nvp6158"
+
+#ifndef CONFIG_VIDEO_NVP6158
+
+#ifdef STREAM_ON_DEFLAULT
+static struct task_struct *nvp6158_kt = NULL;
+#endif
+
+#ifndef CONFIG_HISI_SNAPSHOT_BOOT
+static struct miscdevice nvp6158_dev = {
+	.minor		= MISC_DYNAMIC_MINOR,
+	.name		= "nc_vdec",
+	.fops  		= &nvp6158_fops,
+};
+#endif
+
+static int __init nvp6158_module_init(void)
+{
+	int ret = 0;
+	//char entry[20];
+#ifdef CONFIG_HISI_SNAPSHOT_BOOT
+	snprintf(s_stNvp6158Device.devfs_name, sizeof(s_stNvp6158Device.devfs_name), DEV_NAME);
+	s_stNvp6158Device.minor  = HIMEDIA_DYNAMIC_MINOR;
+	s_stNvp6158Device.fops   = &nvp6158_fops;
+	s_stNvp6158Device.drvops = &stNvp6158DrvOps;
+	s_stNvp6158Device.owner  = THIS_MODULE;
+
+	ret = himedia_register(&s_stNvp6158Device);
+	if (ret) {
+		printk(0, "could not register nvp6158_dev device");
+		return -1;
+ 	}
+#else
+	ret = misc_register(&nvp6158_dev);
+   	if (ret) {
+		printk("ERROR: could not register nvp6158_dev devices:%#x \n",ret);
+        	return -1;
+	}
+#endif
+
+#ifdef STREAM_ON_DEFLAULT
+	//printk("NVP6158/68(C) ex Driver %s COMPILE TIME[%s %s]\n", NVP6158_DRIVER_VER, __DATE__,__TIME__);
+	nvp6158_init(I2C_1);
+	if (ret) {
+		printk(KERN_ERR "ERROR: jaguar1 init failed\n");
+		return -1;
+	}
+	down(&nvp6158_lock);
+	nvp6158_video_decoder_init();
+	/* initialize Audio
+	 * recmaster, pbmaster, ch_num, samplerate, bits */
+	if(nvp6158_chip_id[0] == NVP6158C_R0_ID || nvp6158_chip_id[0] == NVP6158_R0_ID)
+		nvp6158_audio_init(1, 0, 16, 0, 0);
+	else
+		nvp6168_audio_init(1, 0, 16, 0, 0);
+	//VDO_1/2 enable, VCLK_x ebable
+	gpio_i2c_write(0x60, 0xFF, 0x01);
+	gpio_i2c_write(0x60, 0xCA, 0x66);
+	up(&nvp6158_lock);
+
+	/* create kernel thread for EQ, But Now not used. */
+	if(nvp6158_kthread == 1) {
+		nvp6158_kt = kthread_create(nvp6158_kernel_thread, NULL, "nvp6158_kt");
+	    	if(!IS_ERR(nvp6158_kt))
+	       		wake_up_process(nvp6158_kt);
+	    	else {
+	        	printk("create nvp6158 watchdog thread failed!!\n");
+	        	nvp6158_kt = 0;
+	        	return 0;
+	    	}
+	}
+#endif
+	return 0;
+}
+
+/*******************************************************************************
+*	Description		: It is called when "rmmod nvp61XX_ex.ko" command run
+*	Argurments		: void
+*	Return value	: void
+*	Modify			:
+*	warning			:
+*******************************************************************************/
+static void __exit nvp6158_module_exit(void)
+{
+#ifdef STREAM_ON_DEFLAULT
+	if(nvp6158_kt)
+		kthread_stop(nvp6158_kt);
+#endif
+#ifdef CONFIG_HISI_SNAPSHOT_BOOT
+	himedia_unregister(&s_stNvp6158Device);
+#else
+	misc_deregister(&nvp6158_dev);
+#endif
+	nvp6158_i2c_client_exit();
+	//printk("NVP6158(C) ex Driver %s COMPILE TIME[%s %s] removed\n", NVP6158_DRIVER_VER, __DATE__,__TIME__);
+}
+
+module_init(nvp6158_module_init);
+module_exit(nvp6158_module_exit);
+#endif
+
+MODULE_LICENSE("GPL");
+
+/*******************************************************************************
+*	End of file
+*******************************************************************************/
+

drivers/media/i2c/nvp6158_drv/nvp6158_drv.h

@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+ *
+ *  Copyright (C) 2017 NEXTCHIP Inc. All rights reserved.
+ *  Module		: Nvp6158 Device Driver
+ *  Description	: BT1120
+ *  Author		:
+ *  Date         :
+ *  Version		: Version 1.0
+ *
+ ********************************************************************************
+ *  History      :
+ *
+ *
+ ********************************************************************************/
+#ifndef _NVP6158_DRV_
+#define _NVP6158_DRV_
+
+#include "nvp6158_video.h"
+
+extern void nvp6158_datareverse(unsigned char chip, unsigned char port);
+
+int nvp6158_open(struct inode * inode, struct file * file);
+int nvp6158_close(struct inode * inode, struct file * file);
+long nvp6158_native_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
+void nvp6158_i2c_client_exit(void);
+
+void nvp6158_set_mclk(unsigned int mclk);
+void nvp6158_start(video_init_all *video_init, bool dual_edge);
+void nvp6158_stop(void);
+int nvp6158_init(int i2c_bus);
+void nvp6158_exit(void);
+
+#endif

drivers/media/i2c/nvp6158_drv/nvp6158_i2c.c

@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+ *
+ *  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+ *  Module		: nvp6158_i2c.c
+ *  Description	:
+ *  Author		:
+ *  Date         :
+ *  Version		: Version 1.0
+ *
+ ********************************************************************************
+ *  History      :
+ *
+ *
+ ********************************************************************************/
+#include <linux/string.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/i2c-dev.h>
+#include "nvp6158_common.h"
+
+extern struct i2c_client* nvp6158_client;
+//origin
+#if 0
+void nvp6158_I2CWriteByte8(unsigned char chip_addr, unsigned char reg_addr, unsigned char value)
+{
+    int ret;
+    unsigned char buf[2];
+    struct i2c_client* client = nvp6158_client;
+
+    nvp6158_client->addr = chip_addr;
+
+    buf[0] = reg_addr;
+    buf[1] = value;
+
+    ret = i2c_master_send(client, buf, 2);
+    udelay(300);
+    //return ret;
+}
+
+unsigned char nvp6158_I2CReadByte8(unsigned char chip_addr, unsigned char reg_addr)
+{
+    int ret_data = 0xFF;
+    int ret;
+    struct i2c_client* client = nvp6158_client;
+    unsigned char buf[2];
+
+    nvp6158_client->addr = chip_addr;
+
+    buf[0] = reg_addr;
+    ret = i2c_master_recv(client, buf, 1);
+    if (ret >= 0)
+    {
+        ret_data = buf[0];
+    }
+    return ret_data;
+}
+#endif
+
+
+void nvp6158_I2CWriteByte8(unsigned char chip_addr, unsigned char reg_addr, unsigned char value)
+{
+    int ret;
+    unsigned char buf[2];
+	struct i2c_client* client = nvp6158_client;
+
+	client->addr = chip_addr>>1;
+
+	buf[0] = reg_addr;
+	buf[1] = value;
+
+	ret = i2c_master_send(client, buf, 2);
+	udelay(300);
+}
+
+unsigned char nvp6158_I2CReadByte8(unsigned char chip_addr, unsigned char reg_addr)
+{
+	struct i2c_client* client = nvp6158_client;
+
+	client->addr = chip_addr>>1;
+
+	return i2c_smbus_read_byte_data(client, reg_addr);
+}

drivers/media/i2c/nvp6158_drv/nvp6158_motion.c

@@ -0,0 +1,278 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+*
+*  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+*  Module		: motion.c
+*  Description	:
+*  Author		:
+*  Date         :
+*  Version		: Version 1.0
+*
+********************************************************************************
+*  History      :
+*
+*
+********************************************************************************/
+#include <linux/string.h>
+#include <linux/delay.h>
+#include "nvp6158_common.h"
+
+extern unsigned int nvp6158_iic_addr[4];
+
+#include "nvp6158_motion.h"
+
+/**************************************************************************************
+* @desc
+* 	RAPTOR3's
+*
+* @param_in		(motion_mode *)p_param->channel                  FW Update channel
+*
+* @return   	void  		       								 None
+*
+* ioctl : IOC_VDEC_MOTION_SET
+***************************************************************************************/
+void nvp6158_motion_detection_get(motion_mode *motion_set)
+{
+	//BANK2_MOTION
+	unsigned char ReadVal = 0;
+	unsigned char ch_mask = 1;
+	unsigned char ch = motion_set->ch;
+	unsigned char ret = 0;
+
+	ch_mask = ch_mask<<ch;
+
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0xFF, 0x00);
+	ReadVal = gpio_i2c_read(nvp6158_iic_addr[motion_set->devnum], 0xA9);
+
+	ret = ReadVal&ch_mask;
+	motion_set->set_val = ret;
+
+//	printk("motion_detection_get:: %x\n", motion_set->set_val);
+
+}
+
+void nvp6158_motion_onoff_set(motion_mode *motion_set)
+{
+	//BANK2_MOTION
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0xFF, 0x02);
+
+	if(motion_set->fmtdef == TVI_3M_18P || motion_set->fmtdef == TVI_5M_12_5P ||
+		motion_set->fmtdef == TVI_5M_20P) {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x00 + (0x07 * motion_set->ch), 0x0C);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x02 + (0x07 * motion_set->ch), 0x23);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x11);
+
+		if(motion_set->fmtdef == TVI_3M_18P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0x78);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x40);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x72);
+		} else if(motion_set->fmtdef == TVI_5M_12_5P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xA2);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x51);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x9c);
+		} else if(motion_set->fmtdef == TVI_5M_20P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xA0);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x51);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x9a);
+		}
+
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2B + (0x06 * motion_set->ch), 0x6);
+
+		printk("[DRV_Motion_OnOff] ch(%d) fmtdef(%d)\n", motion_set->ch, motion_set->fmtdef);
+	} else if( motion_set->fmtdef == AHD20_1080P_15P_EX || motion_set->fmtdef == AHD20_1080P_12_5P_EX ) {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x00 + (0x07 * motion_set->ch), 0x0C);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x02 + (0x07 * motion_set->ch), 0x23);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x11);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xf0);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x2d);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2B + (0x06 * motion_set->ch), 0x06);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0xea);
+	} else {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x00);
+	}
+
+	if(motion_set->set_val<0 || motion_set->set_val>1) {
+		printk("[DRV_Motion_OnOff]Error!! ch(%d) Setting Value Over:%x!! Only 0 or 1\n", motion_set->ch, motion_set->set_val);
+		return;
+	}
+
+	switch(motion_set->set_val) {
+		case FUNC_OFF : gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], (0x00 + (0x07 * motion_set->ch)), 0x0D);
+						gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x00);
+			break;
+		case FUNC_ON : gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], (0x00 + (0x07 * motion_set->ch)), 0x0C);
+			break;
+	}
+
+
+}
+
+void nvp6158_motion_pixel_all_onoff_set(motion_mode *motion_set)
+{
+	int ii=0;
+	unsigned char addr = 0;
+
+	//BANK2_MOTION
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0xFF, 0x02);
+
+	if(motion_set->fmtdef == TVI_3M_18P || motion_set->fmtdef == TVI_5M_12_5P ||
+			motion_set->fmtdef == TVI_5M_20P) {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x00 + (0x07 * motion_set->ch), 0x0C);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x02 + (0x07 * motion_set->ch), 0x23);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x11);
+
+		if(motion_set->fmtdef == TVI_3M_18P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0x78);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x40);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x72);
+		} else if(motion_set->fmtdef == TVI_5M_12_5P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xA2);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x51);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x9c);
+		} else if(motion_set->fmtdef == TVI_5M_20P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xA0);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x51);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x9a);
+		}
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2B + (0x06 * motion_set->ch), 0x6);
+
+		printk("[DRV_Motion_OnOff] ch(%d) fmtdef(%d)\n", motion_set->ch, motion_set->fmtdef);
+	} else  if( motion_set->fmtdef == AHD20_1080P_15P_EX || motion_set->fmtdef == AHD20_1080P_12_5P_EX ) {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x00 + (0x07 * motion_set->ch), 0x0C);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x02 + (0x07 * motion_set->ch), 0x23);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x11);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xf0);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x2d);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2B + (0x06 * motion_set->ch), 0x06);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0xea);
+	} else {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x00);
+	}
+
+	for(ii=0; ii<24; ii++) {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], (0x40 +(0x18 *motion_set->ch)) + ii, motion_set->set_val);
+		addr = (0x40 +(0x18 *motion_set->ch)) + ii;
+	}
+}
+
+void nvp6158_motion_pixel_onoff_set(motion_mode *motion_set)
+{
+	unsigned char val = 0x80;
+	unsigned char ReadVal;
+	unsigned char on;
+
+	unsigned char ch      = motion_set->ch;
+	unsigned char SetPix  = motion_set->set_val/8;
+	unsigned char SetVal  = motion_set->set_val%8;
+
+	val = val >> SetVal;
+
+	//BANK2_MOTION
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0xFF, 0x02);
+
+	if(motion_set->fmtdef == TVI_3M_18P || motion_set->fmtdef == TVI_5M_12_5P ||
+			motion_set->fmtdef == TVI_5M_20P) {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x00 + (0x07 * motion_set->ch), 0x0C);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x02 + (0x07 * motion_set->ch), 0x23);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x11);
+
+		if(motion_set->fmtdef == TVI_3M_18P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0x78);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x40);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x72);
+		} else if(motion_set->fmtdef == TVI_4M_15P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xA0);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x3C);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x9a);
+		} else if(motion_set->fmtdef == TVI_5M_12_5P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xA2);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x51);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x9c);
+		} else if(motion_set->fmtdef == TVI_5M_20P) {
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xA0);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x51);
+			gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x9a);
+		}
+
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2B + (0x06 * motion_set->ch), 0x6);
+
+		printk("[DRV_Motion_OnOff] ch(%d) fmtdef(%d)\n", motion_set->ch, motion_set->fmtdef);
+	} else if( motion_set->fmtdef == AHD20_1080P_15P_EX || motion_set->fmtdef == AHD20_1080P_12_5P_EX ) {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x00 + (0x07 * motion_set->ch), 0x0C);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x02 + (0x07 * motion_set->ch), 0x23);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x11);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xf0);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x2d);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2B + (0x06 * motion_set->ch), 0x06);
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0xea);
+	} else {
+		gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x00);
+	}
+
+	ReadVal = gpio_i2c_read(nvp6158_iic_addr[motion_set->devnum], (0x40 +(0x18 *ch)) + SetPix);
+	on = val&ReadVal;
+	if(on) {
+		val = ~val;
+		val = val&ReadVal;
+	} else {
+		val = val|ReadVal;
+	}
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], (0x40 +(0x18 *ch)) + SetPix, val);
+}
+
+void nvp6158_motion_pixel_onoff_get(motion_mode *motion_set)
+{
+	unsigned char val = 0x80;
+	unsigned char ReadVal;
+	unsigned char on;
+
+	unsigned char Ch      = motion_set->ch;
+	unsigned char SetPix  = motion_set->set_val/8;
+	unsigned char SetVal  = motion_set->set_val%8;
+
+	val = val >> SetVal;
+
+	//BANK2_MOTION
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0xFF, 0x02);
+	ReadVal = gpio_i2c_read(nvp6158_iic_addr[motion_set->devnum], (0x40 +(0x18 *Ch)) + SetPix);
+
+	on = val&ReadVal;
+
+	if(on) {
+		motion_set->set_val = 1;
+	} else {
+		motion_set->set_val = 0;
+	}
+}
+
+void nvp6158_motion_tsen_set(motion_mode *motion_set)
+{
+	unsigned char ch = motion_set->ch;
+	unsigned char SetVal = motion_set->set_val;
+
+	//BANK2_MOTION
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0xFF, 0x02);
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], (0x01 +(0x07 * ch)), SetVal);
+	printk("[DRV_Motion]ch(%d), TSEN Val(%x)\n", ch, SetVal);
+}
+
+void nvp6158_motion_psen_set(motion_mode *motion_set)
+{
+	unsigned char msb_mask = 0xf0;
+	unsigned char lsb_mask = 0x07;
+	unsigned char ch = motion_set->ch;
+	unsigned char SetVal = motion_set->set_val;
+	unsigned char ReadVal;
+
+	//BANK2_MOTION
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0xFF, 0x02);
+	ReadVal = gpio_i2c_read(nvp6158_iic_addr[motion_set->devnum], (0x02 +(0x07 * ch)));
+
+	msb_mask = msb_mask&ReadVal;
+	SetVal = lsb_mask&SetVal;
+
+	SetVal = SetVal|msb_mask;
+
+	gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], (0x02 +(0x07 * ch)), SetVal);
+	printk("[DRV_Motion]ch(%d), readVal(%x), SetVal(%x)\n", ch, ReadVal, SetVal);
+}

drivers/media/i2c/nvp6158_drv/nvp6158_motion.h

@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+*
+*  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+*  Module		: motion.h
+*  Description	:
+*  Author		:
+*  Date         :
+*  Version		: Version 1.0
+*
+********************************************************************************
+*  History      :
+*
+*
+********************************************************************************/
+#ifndef _MOTION_H_
+#define _MOTION_H_
+
+#include "nvp6158_common.h"
+
+#define FUNC_ON		0x01
+#define FUNC_OFF		0x00
+
+typedef struct _motion_mode{
+	unsigned char ch;
+	unsigned char devnum;
+	unsigned char set_val;
+
+	unsigned char fmtdef;
+}motion_mode;
+
+void nvp6158_motion_onoff_set(motion_mode *motion_set);
+void nvp6158_motion_display_onoff_set(motion_mode *motion_set);
+void nvp6158_motion_pixel_all_onoff_set(motion_mode *motion_set);
+void nvp6158_motion_pixel_onoff_set(motion_mode *motion_set);
+void nvp6158_motion_pixel_onoff_get(motion_mode *motion_set);
+void nvp6158_motion_tsen_set(motion_mode *motion_set);
+void nvp6158_motion_psen_set(motion_mode *motion_set);
+void nvp6158_motion_detection_get(motion_mode *motion_set);
+
+#endif /* _MOTION_H_ */

drivers/media/i2c/nvp6158_drv/nvp6158_video.h

@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+*
+*  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+*  Module		: The decoder's video format module
+*  Description	: Video format
+*  Author		:
+*  Date         :
+*  Version		: Version 2.0
+*
+********************************************************************************
+*  History      :
+*
+*
+********************************************************************************/
+#ifndef _NVP6158_VIDEO_HI_
+#define _NVP6158_VIDEO_HI_
+
+#include "nvp6158_common.h"
+/* ===============================================
+ * APP -> DRV
+ * =============================================== */
+typedef struct _video_input_init {
+	unsigned char ch;
+	unsigned char format;
+	unsigned char dist;
+	unsigned char input;
+	unsigned char val;
+	unsigned char interface;
+} video_input_init;
+
+typedef struct _video_init_all {
+	video_input_init ch_param[4];
+	NVP6158_DVP_MODE mode;
+} video_init_all;
+
+/********************************************************************
+ *  define and enum
+ ********************************************************************/
+
+typedef enum _nvp6158_outmode_sel {
+	NVP6158_OUTMODE_1MUX_SD = 0,
+	NVP6158_OUTMODE_1MUX_HD,
+	NVP6158_OUTMODE_1MUX_FHD,
+	NVP6158_OUTMODE_1MUX_FHD_DDR,
+	NVP6158_OUTMODE_2MUX_SD,
+	NVP6158_OUTMODE_2MUX_HD,
+	NVP6158_OUTMODE_2MUX_MIX,
+	NVP6158_OUTMODE_2MUX_FHD,
+	NVP6158_OUTMODE_4MUX_SD,
+	NVP6158_OUTMODE_4MUX_HD,
+	NVP6158_OUTMODE_4MUX_MIX,
+	NVP6158_OUTMODE_1MUX_297MHz,
+	NVP6158_OUTMODE_1MUX_BT1120S_720P,
+	NVP6158_OUTMODE_1MUX_BT1120S_1080P,
+	NVP6158_OUTMODE_2MUX_BT1120S,
+	NVP6158_OUTMODE_2MUX_BT1120S_720P,
+	NVP6158_OUTMODE_2MUX_BT1120S_1080P,
+	NVP6158_OUTMODE_4MUX_BT1120S,
+	NVP6158_OUTMODE_4MUX_BT1120S_DDR,
+	NVP6158_OUTMODE_4MUX_BT1120S_720P,
+	NVP6158_OUTMODE_4MUX_BT1120S_1080P,
+	NVP6158_OUTMODE_BUTT
+} NVP6158_OUTMODE_SEL;
+
+typedef enum _nvp6158_det_sel {
+	NVP6158_DET_MODE_AUTO = 0,
+	NVP6158_DET_MODE_AHD,
+	NVP6158_DET_MODE_CVI,
+	NVP6158_DET_MODE_TVI,
+	NVP6158_DET_MODE_OTHER,
+	NVP6158_DET_MODE_BUTT
+} NVP6158_DET_SEL;
+
+/********************************************************************
+ *  structure
+ ********************************************************************/
+
+/********************************************************************
+ *  external api
+ ********************************************************************/
+void nvp6158_common_init(unsigned char chip);
+int nvp6158_set_portmode(const unsigned char chip, const unsigned char portsel,
+			const unsigned char portmode, const unsigned char chid);
+int nvp6158_set_chnmode(const unsigned char ch, const unsigned char chnmode);
+int nvp6168_set_chnmode(const unsigned char ch, const unsigned char chnmode);
+void nvp6158_set_portcontrol(unsigned char chip, unsigned char portsel,
+				unsigned char enclk, unsigned char endata);
+void nvp6158_set_chn_commonvalue(const unsigned char ch, const unsigned char chnmode);
+
+unsigned int nvp6158_video_fmt_det(const unsigned char ch, NVP6158_INFORMATION_S *ps_nvp6158_vfmts);
+unsigned int nvp6168_video_fmt_det(const unsigned char ch, NVP6158_INFORMATION_S *ps_nvp6158_vfmts);
+unsigned char nvp6158_video_fmt_debounce(unsigned char ch,
+		unsigned char keep_fmt, unsigned int keep_sync_width);
+unsigned int nvp6158_getvideoloss(void);
+
+void nvp6158_video_set_contrast(unsigned char ch, unsigned int value, unsigned int v_format);
+void nvp6158_video_set_brightness(unsigned char ch, unsigned int value, unsigned int v_format);
+void nvp6158_video_set_saturation(unsigned char ch, unsigned int value, unsigned int v_format);
+void nvp6158_video_set_hue(unsigned char ch, unsigned int value, unsigned int v_format);
+void nvp6158_video_set_sharpness(unsigned char ch, unsigned int value);
+void nvp6158_video_set_ugain(unsigned char ch, unsigned int value);
+void nvp6158_video_set_vgain(unsigned char ch, unsigned int value);
+void nvp6158_video_set_adcclk(unsigned char ch, unsigned char value);
+unsigned char nvp6158_video_get_adcclk(unsigned char ch);
+void nvp6158_hide_ch(unsigned char ch);
+void nvp6158_show_ch(unsigned char ch);
+
+void nvp6158_vd_chnreset(unsigned char ch);
+int nvp6158_GetAgcLockStatus(unsigned char ch);
+int nvp6158_GetFSCLockStatus(unsigned char ch);
+void nvp6158_ResetFSCLock(unsigned char ch);
+void nvp6158_chn_killcolor(unsigned char ch, unsigned char onoff);
+int nvp6158_acp_SetVFmt(unsigned char ch, const unsigned char vfmt);
+void nvp6158_video_input_new_format_set(const unsigned char ch, const unsigned char chnmode);
+void nvp6158_dump_reg(unsigned char ch, unsigned char bank);
+NC_FORMAT_STANDARD NVP6158_GetFmtStd_from_Fmtdef(NC_VIVO_CH_FORMATDEF vivofmt);
+void nvp6158_additional_for3MoverDef(unsigned char chip);
+void nvp6158_video_powerdown(unsigned char ch);
+void nvp6158_set_colorpattern(void);
+void nvp6158_set_colorpattern2(void);
+void nvp6158_set_colorpattern3(void);
+void nvp6158_channel_reset(unsigned char ch);
+
+
+#endif // End of _NVP6158_VIDEO_HI_
+
+/********************************************************************
+ *  End of file
+ ********************************************************************/

drivers/media/i2c/nvp6158_drv/nvp6158_video_auto_detect.h

@@ -0,0 +1,260 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+*
+*  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+*  Module		: video_auto_detect.h
+*  Description	:
+*  Author		:
+*  Date         :
+*  Version		: Version 1.0
+*
+********************************************************************************
+*  History      :
+*
+*
+********************************************************************************/
+#ifndef _RAPTOR3_VIDEO_AUTO_DETECT_H_
+#define _RAPTOR3_VIDEO_AUTO_DETECT_H_
+
+#include "nvp6158_common.h"
+
+typedef enum CH_NUM
+{
+	CH1 = 0,
+	CH2,
+	CH3,
+	CH4
+} CH_NUM;
+
+typedef struct _video_input_vafe {
+	unsigned char powerdown;		//B0       0x00/1/2/3 [0]
+	unsigned char gain;			//B0       0x00/1/2/3 [4]
+	unsigned char spd;				//B5/6/7/8 0x00       [5:4]
+
+	unsigned char ctrlreg;			//B5/6/7/8 0x01       [6]
+	unsigned char ctrlibs;			//B5/6/7/8 0x01       [5:4]
+	unsigned char adcspd;			//B5/6/7/8 0x01       [2]
+	unsigned char clplevel;		//B5/6/7/8 0x01       [1:0]
+
+
+	unsigned char eq_band;			//B5/6/7/8 0x58       [6:4]
+	unsigned char lpf_front_band;	//B5/6/7/8 0x58       [1:0]
+
+	unsigned char clpmode;			//B5/6/7/8 0x59       [7]
+	unsigned char f_lpf_bypass;	//B5/6/7/8 0x59       [4]
+	unsigned char clproff;			//B5/6/7/8 0x59       [3]
+	unsigned char b_lpf_bypass;	//B5/6/7/8 0x59       [0]
+
+	unsigned char duty;		   	//B5/6/7/8 0x5B    	  [6:4]
+	unsigned char ref_vol;			//B5/6/7/8 0x5B       [1:0]
+
+	unsigned char lpf_back_band;	//B5/6/7/8 0x5C       [6:4]
+	unsigned char clk_sel;			//B5/6/7/8 0x5C       [3]
+	unsigned char eq_gainsel;		//B5/6/7/8 0x5C       [2:0]
+
+} video_input_vafe;
+
+typedef struct _video_input_auto_detect {
+	unsigned char ch;
+	unsigned char devnum;
+
+	unsigned char d_cmp;				//B5/6/7/8 0x03
+	unsigned char slice_level;		//B5/6/7/8 0x08
+	unsigned char control_mode;		//B5/6/7/8 0x47
+	unsigned char gdf_fix_coeff;		//B5/6/7/8 0x50
+	unsigned char dfe_ref_sel;		//B5/6/7/8 0x76
+	unsigned char wpd_77;				//B5/6/7/8 0x77
+	unsigned char wpd_78;				//B5/6/7/8 0x78
+	unsigned char wpd_79;				//B5/6/7/8 0x79
+	unsigned char auto_gnos_mode;		//B5/6/7/8 0x82
+	unsigned char auto_sync_mode;		//B5/6/7/8 0x83
+	unsigned char hafc_bypass;			//B5/6/7/8 0xB8
+
+	unsigned char novid_vfc_init;	//B13		0x31
+	unsigned char stable_mode_1;	//B13		0x0
+	unsigned char stable_mode_2;	//B13		0x1
+
+	unsigned char novid_det;		//B0		0x23/0x27/0x2B/0x2F
+	video_input_vafe vafe;
+} video_input_auto_detect;
+
+typedef struct _video_input_novid {
+	unsigned char ch;
+	unsigned char novid; 				//B0 0xa8 [3:0]  MSB 1Ch ~ LSB 4Ch
+	unsigned char devnum;
+} video_input_novid;
+
+typedef struct _video_input_vfc {
+	unsigned char ch;
+	unsigned char vfc;				//B5/6/7/8 0xf0
+	unsigned char devnum;
+} video_input_vfc;
+
+typedef struct _video_input_onvid_set {
+	unsigned char ch;
+	unsigned char auto_gnos_mode;		//B5/6/7/8 0x82
+	unsigned char auto_sync_mode;		//B5/6/7/8 0x83
+	unsigned char op_md;				//B5/6/7/8 0xB8
+} video_input_onvid_set;
+
+typedef struct _video_input_onvid_set_2 {
+	unsigned char ch;
+	unsigned char dfe_ref_sel;			//B5/6/7/8 0x76
+	unsigned char wpd_77;				//B5/6/7/8 0x77
+	unsigned char wpd_78;				//B5/6/7/8 0x78
+	unsigned char wpd_79;				//B5/6/7/8 0x79
+	unsigned char slice_mode;			//B5/6/7/8 0x0E
+} video_input_onvid_set_2;
+
+typedef struct _video_input_novid_set {
+	unsigned char ch;
+	unsigned char devnum;
+	unsigned char control_mode;
+	unsigned char gdf_fix_coeff;
+	unsigned char auto_gnos_mode;
+	unsigned char auto_sync_mode;
+	unsigned char hafc_bypass;
+	unsigned char dfe_ref_sel;			//B5/6/7/8 0x76
+	unsigned char wpd_77;				//B5/6/7/8 0x77
+	unsigned char wpd_78;				//B5/6/7/8 0x78
+	unsigned char wpd_79;				//B5/6/7/8 0x79
+	unsigned char slice_mode;			//B5/6/7/8 0x0E
+} video_input_novid_set;
+
+typedef struct _video_input_cable_dist {	
+	unsigned char ch;
+	unsigned char devnum;
+	unsigned char dist;				// B13 0xA0
+	unsigned char FmtDef;
+	unsigned char cabletype;			// 0:coax, 1:utp, 2:reserved1, 3:reserved2
+} video_input_cable_dist;
+
+typedef struct _video_input_sam_val {
+	unsigned char ch;
+	unsigned char devnum;
+	/*
+	unsigned char sam_val_1;		// B13 0xCD [7:0]
+	unsigned char sam_val_2;		// B13 0xCC [9:8]
+	*/
+	unsigned int  sam_val;
+} video_input_sam_val;
+
+typedef struct _video_input_hsync_accum {
+	unsigned char ch;
+	unsigned char devnum;
+	unsigned char h_lock;				// Bank 0 0xE2 [3:0] [Ch3:Ch0]
+	unsigned int  hsync_accum_val1;		// Value 1  			// 170210 Add
+	unsigned int  hsync_accum_val2;		// Value 2				// 170210 Add
+	unsigned int  hsync_accum_result;	// Value 1 - Value 2	// 170210 Fix
+} video_input_hsync_accum;
+
+typedef struct _video_input_agc_val {
+	unsigned char ch;
+	unsigned char devnum;
+	unsigned char agc_lock;
+	unsigned char agc_val;			// B13 0xB8
+} video_input_agc_val;
+
+typedef struct _video_input_format_set_done { // [add] 170209 format set done
+	unsigned char ch;
+	unsigned char set_val;		// B13 0x70 [3:0] each channel
+} video_input_format_set_done;
+
+typedef struct _video_input_fsc_val {
+	unsigned char ch;
+	unsigned char devnum;
+	unsigned int fsc_val1;
+	unsigned int fsc_val2;
+	unsigned int fsc_final;
+} video_input_fsc_val;
+
+typedef struct _video_input_aeq_set { // 170214 AEQ Set
+	unsigned char ch;
+	unsigned char aeq_val;				//B5/6/7/8 0x58       [7:4]
+} video_input_aeq_set;
+
+typedef struct _video_input_deq_set { // 170214 DEQ Set
+	unsigned char ch;
+	unsigned char deq_val;				// B9 0x80/0xA0/0xC0/0xE0 [3:0]
+} video_input_deq_set;
+
+typedef struct _video_input_vfc_set {	// 170215 VFC Setting Enable  (temp)
+	unsigned char ch;
+	unsigned char set_val;
+} video_input_vfc_set;
+
+
+typedef struct _video_input_acc_gain_val {	// 170215 acc gain value read
+	unsigned char ch;
+	unsigned char devnum;
+	unsigned int acc_gain_val;
+	unsigned char func_sel;
+} video_input_acc_gain_val;
+
+typedef struct _video_input_sleep_time_val {	// 170215 acc gain value read
+	unsigned char sleep_val;
+} video_input_sleep_time_val;
+
+typedef struct _video_input_agc_reset_val {	// 170221 agc init
+	unsigned char ch;
+	unsigned char reset_val;
+} video_input_agc_reset_val;
+
+typedef struct _video_output_data_out_mode {
+	unsigned char ch;
+	unsigned char devnum;
+	unsigned char set_val;
+} video_output_data_out_mode;
+
+typedef struct _video_input_manual_mode {
+	unsigned char ch;
+	unsigned char dev_num;
+} video_input_manual_mode;
+
+typedef struct _video_input_onvideo_check_s {
+	unsigned char vfc;
+	unsigned char sw_rst_ret;
+	decoder_dev_ch_info_s info;
+} video_input_onvideo_check_s;
+
+
+void nvp6158_video_input_auto_detect_set(video_input_auto_detect *vin_auto_det);
+void nvp6158_video_input_vfc_read(video_input_vfc *vin_vfc);
+void nvp6158_video_input_novid_read(video_input_novid *vin_novid); // 170204 novid
+void nvp6158_video_input_no_video_set(video_input_novid *auto_novid); // 170206 novideo set 
+void nvp6158_video_input_cable_dist_read(video_input_cable_dist *vin_cable_dist);	// 170207 Cable Distance
+void nvp6158_video_input_sam_val_read(video_input_sam_val *vin_sam_val ); 	// 170207 SAM Value
+void nvp6158_video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum );	// 170207 Hsync Accumulation
+void nvp6158_video_input_agc_val_read(video_input_agc_val *vin_agc_val); 	// 170207 AGC Value
+void nvp6158_video_input_fsc_val_read(video_input_fsc_val *vin_fsc_val); // 170214 fsc value read
+void nvp6158_video_input_aeq_val_set(video_input_aeq_set *vin_aeq_val); // 170214 aeq value set
+void nvp6158_video_input_deq_val_set(video_input_deq_set *vin_deq_val); // 170214 deq value set
+void nvp6158_video_input_acc_gain_val_read(video_input_acc_gain_val *vin_acc_gain); // 170215 acc gain value read
+void nvp6158_video_output_data_out_mode_set(video_output_data_out_mode *vo_data_out_mode); // 170329 Data Out Mode Setting Func
+void nvp6158_video_input_manual_mode_set(video_input_manual_mode *vin_manual_det); // 170330 Manual Mode Set
+void nvp6158_video_input_onvideo_set(decoder_dev_ch_info_s *decoder_info);
+
+void nvp6158_video_input_onvideo_check_data(video_input_vfc *vin_vfc);
+void nvp6158_video_input_auto_ch_sw_rst(decoder_dev_ch_info_s *decoder_info);
+
+int  nvp6158_video_input_cable_measure_way( unsigned char ch, unsigned char devnum );
+void nvp6158_video_input_vafe_reset(decoder_dev_ch_info_s *decoder_info);
+void nvp6158_video_input_vafe_control(decoder_dev_ch_info_s *decoder_info, int cmd);
+void nvp6158_video_input_manual_agc_stable_endi(decoder_dev_ch_info_s *decoder_info, int endi);
+void nvp6158_video_input_ahd_tvi_distinguish(decoder_dev_ch_info_s *decoder_info);
+int nvp6158_video_input_cvi_tvi_distinguish(decoder_dev_ch_info_s *decoder_info);
+void nvp6158_video_input_cvi_ahd_1080p_distinguish(decoder_dev_ch_info_s *decoder_info);
+void nvp6158_video_input_ahd_nrt_distinguish(decoder_dev_ch_info_s *decoder_info);
+unsigned char __nvp6158_IsOver3MRTVideoFormat( decoder_dev_ch_info_s *decoder_info );
+NC_VIVO_CH_FORMATDEF NVP6158_NC_VD_AUTO_VFCtoFMTDEF(unsigned char ch, unsigned char VFC);
+void nvp6168_video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum );
+void nvp6168_video_input_onvideo_set(decoder_dev_ch_info_s *decoder_info);
+void nvp6168_video_input_vfc_read(video_input_vfc *vin_vfc);
+void nvp6168_video_input_auto_detect_set(video_input_auto_detect * vin_auto_det);
+void nvp6168_video_input_no_video_set(video_input_novid * auto_novid);
+void nvp6168_video_input_cvi_tvi_5M20p_distinguish(decoder_dev_ch_info_s *decoder_info);
+void nvp6168_video_input_manual_mode_set(video_input_manual_mode *vin_manual_det);
+
+
+
+#endif /* _RAPTOR3_VIDEO_AUTO_DETECT_H_ */

drivers/media/i2c/nvp6158_drv/nvp6158_video_eq.h

@@ -0,0 +1,228 @@
+// SPDX-License-Identifier: GPL-2.0
+/********************************************************************************
+*
+*  Copyright (C) 2017 	NEXTCHIP Inc. All rights reserved.
+*  Module		: video_eq.h
+*  Description	:
+*  Author		:
+*  Date         :
+*  Version		: Version 1.0
+*
+********************************************************************************
+*  History      :
+*
+*
+********************************************************************************/
+#ifndef _RAPTOR3_VIDEO_EQ_H_
+#define _RAPTOR3_VIDEO_EQ_H_
+
+#include "nvp6158_common.h"
+#include "nvp6158_video_auto_detect.h"
+///////////////////////////////
+typedef enum ACC_DEBUG
+{
+	ACC_GAIN_NORMAL,
+	ACC_GAIN_DEBUG,
+
+}ACC_DEBUG;
+
+typedef enum DISTANCE
+{
+	SHORT_2M,
+	LONG_100M,
+	LONG_200M,
+	LONG_300M,
+	LONG_400M,
+	LONG_500M,
+}CABLE_DISTANCE;
+
+typedef struct _NC_VD_AUTO_HSYNC_STR{ // 170207 Hsync Accumulation
+ unsigned char Ch;
+ unsigned char dev_addr;
+ unsigned char h_lock;				// Bank 0 0xE2 [3:0] [Ch3:Ch0]
+ unsigned int Hsync_Accum_Val1;		// Value 1  			// 170210 Add
+ unsigned int Hsync_Accum_Val2;		// Value 2				// 170210 Add
+ unsigned int Hsync_Accum_Result;	// Value 1 - Value 2	// 170210 Fix
+}NC_VD_AUTO_HSYNC_STR;
+
+typedef struct _NC_VD_AUTO_SAM_STR{ // 170207 SAM Value 항목 추가
+ unsigned char Ch;
+ unsigned char dev_addr;
+ /*
+ unsigned char SAMval_CD;			// B13 0xCD [7:0]
+ unsigned char SAMval_CC;			// B13 0xCC [9:8]
+ */
+ unsigned int SAMval;
+}NC_VD_AUTO_SAM_STR;
+
+typedef struct _NC_VD_AUTO_AGC_STR{ // 170207 AGC Value 항목 추가
+ unsigned char Ch;
+ unsigned char devnum;
+ unsigned char agc_lock;			// Bank 0 0xE0 [3:0] [Ch3:Ch0]
+ unsigned char AGCval;				// B13 0xB8
+}NC_VD_AUTO_AGC_STR;
+
+typedef struct _NC_VD_AUTO_DIST_STR{ // 170207 Cable Distance 항목 추가
+ unsigned char Ch;
+ unsigned char devnum;
+ unsigned char Dist;					// B13 0xA0
+}NC_VD_AUTO_CABLE_DIST_STR;
+
+typedef struct _NC_VD_MANUAL_DIST_STR{
+ unsigned char Ch;
+ unsigned char dev_addr;
+ unsigned char Dist;
+ unsigned char FmtDef;
+ unsigned char cabletype;				// 0:coax, 1:utp, 2:reserved1, 3:reserved2
+}NC_VD_MANUAL_CABLE_DIST_STR;
+
+///////////////////////////////////
+typedef struct _video_equalizer_hsync_stage_s{
+	unsigned int hsync_stage[9];
+}video_equalizer_hsync_stage_s;
+
+typedef struct _video_equalizer_agc_stage_s{
+	unsigned int agc_stage[9];
+}video_equalizer_agc_stage_s;
+
+typedef struct _video_equalizer_distance_table_s{
+	video_equalizer_hsync_stage_s hsync_stage;
+	video_equalizer_agc_stage_s   agc_stage;
+} nvp6158_video_equalizer_distance_table_s;
+
+
+typedef struct _video_equalizer_base_s{
+	unsigned char eq_bypass[11];			// B5x01
+	unsigned char eq_band_sel[11];		// B5x58
+	unsigned char eq_gain_sel[11];		// B5x5C
+
+	unsigned char deq_a_on[11];			// BAx3d
+	unsigned char deq_a_sel[11];			// BAx3C
+	unsigned char deq_b_sel[11];			// B9x80
+
+} video_equalizer_base_s;
+
+typedef struct _video_equalizer_coeff_s{
+
+	unsigned char deqA_01[11];	// BankA 0x30
+	unsigned char deqA_02[11];	// BankA 0x31
+	unsigned char deqA_03[11];   // BankA 0x32
+	unsigned char deqA_04[11];   // BankA 0x33
+	unsigned char deqA_05[11];   // BankA 0x34
+	unsigned char deqA_06[11];   // BankA 0x35
+	unsigned char deqA_07[11];   // BankA 0x36
+	unsigned char deqA_08[11];   // BankA 0x37
+	unsigned char deqA_09[11];   // BankA 0x38
+	unsigned char deqA_10[11];   // BankA 0x39
+	unsigned char deqA_11[11];   // BankA 0x3A
+	unsigned char deqA_12[11];   // BankA 0x3B
+
+} video_equalizer_coeff_s;
+
+typedef struct _video_equalizer_color_s{
+	unsigned char contrast[11];			// Bank0 0x10
+	unsigned char h_peaking[11];			// Bank0 0x18
+	unsigned char c_filter[11];			// Bank0 0x21
+	unsigned char hue[11];				// Bank0 0x40
+	unsigned char u_gain[11];			// Bank0 0x44
+	unsigned char v_gain[11];			// Bank0 0x48
+	unsigned char u_offset[11];			// Bank0 0x4c
+	unsigned char v_offset[11];			// Bank0 0x50
+
+	unsigned char black_level[11];		// Bank5 0x20
+	unsigned char acc_ref[11];			// Bank5 0x27
+
+	unsigned char cti_delay[11];			// Bank5 0x28
+	unsigned char sub_saturation[11];    // Bank5 0x2B
+	unsigned char burst_dec_a[11];       // Bank5 0x24
+	unsigned char burst_dec_b[11];       // Bank5 0x5F
+	unsigned char burst_dec_c[11];       // Bank5 0xD1
+	unsigned char c_option[11];          // Bank5 0xD5
+
+	unsigned char y_filter_b[11];		// BankA 0x25
+	unsigned char y_filter_b_sel[11];	// BankA 0x27
+
+} video_equalizer_color_s;
+
+typedef struct _video_equalizer_timing_a_s{
+	unsigned char h_delay_a[11];			// Bank0 0x58
+	unsigned char h_delay_b[11];			// Bank0 0x89
+	unsigned char h_delay_c[11];			// Bank0 0x8E
+	unsigned char y_delay[11];			// Bank0 0xA0
+
+} video_equalizer_timing_a_s;
+
+typedef struct _video_equalizer_clk_s{
+	unsigned char clk_adc[11];			// Bank1 0x84
+	unsigned char clk_dec[11];			// Bank1 0x8C
+
+} video_equalizer_clk_s;
+
+typedef struct _video_equalizer_timing_b_s{
+	unsigned char h_scaler1[11];		// B9x96 + ch*0x20
+	unsigned char h_scaler2[11];		// B9x97 + ch*0x20
+	unsigned char h_scaler3[11];		// B9x98 + ch*0x20
+	unsigned char h_scaler4[11];		// B9x99 + ch*0x20
+	unsigned char h_scaler5[11];		// B9x9a + ch*0x20
+	unsigned char h_scaler6[11];		// B9x9b + ch*0x20
+	unsigned char h_scaler7[11];		// B9x9c + ch*0x20
+	unsigned char h_scaler8[11];		// B9x9d + ch*0x20
+	unsigned char h_scaler9[11];		// B9x9e + ch*0x20
+
+	unsigned char pn_auto[11];		// B9x40 + ch
+
+	unsigned char comb_mode[11];		// B5x90
+	unsigned char h_pll_op_a[11];	// B5xB9
+	unsigned char mem_path[11];		// B5x57
+	unsigned char fsc_lock_speed[11]; //B5x25
+
+	unsigned char format_set1[11];	// B0x81
+	unsigned char format_set2[11];	// B0x85
+
+	unsigned char v_delay[11];		// B0x64
+} video_equalizer_timing_b_s;
+
+
+typedef struct _video_equalizer_value_table_s{
+	video_equalizer_base_s		eq_base;
+	video_equalizer_coeff_s 	eq_coeff;
+	video_equalizer_color_s 	eq_color;
+
+	video_equalizer_timing_a_s 	eq_timing_a;
+	video_equalizer_clk_s		eq_clk;
+	video_equalizer_timing_b_s	eq_timing_b;
+
+} video_equalizer_value_table_s;
+
+typedef struct _video_equalizer_info{
+	unsigned char Ch;
+	unsigned char devnum;
+	unsigned char distance;
+	unsigned char FmtDef;
+} video_equalizer_info_s;
+
+CABLE_DISTANCE NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get (unsigned char Ch, video_input_cable_dist *pDistance);
+CABLE_DISTANCE nvp6158_get_eq_dist(video_equalizer_info_s *ps_eq_info);
+unsigned char __nvp6158_video_cable_manualdistance( unsigned char cabletype, video_input_hsync_accum *pvin_hsync_accum,
+				video_input_acc_gain_val *pvin_acc_val, nvp6158_video_equalizer_distance_table_s *pdistance_value );
+void __nvp6158_eq_base_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_base_s *pbase );
+void __nvp6158_eq_coeff_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_coeff_s *pcoeff );
+void __nvp6158_eq_color_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_color_s *pcolor );
+void __nvp6158_eq_timing_a_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_timing_a_s *ptiming_a );
+void __nvp6158_eq_clk_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_clk_s *pclk );
+void __nvp6158_eq_timing_b_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_timing_b_s *ptiming_b );
+unsigned int __nvp6158_get_acc_gain(unsigned char ch, unsigned char devnum);
+unsigned int __nvp6158_get_yplus_slope(unsigned char ch, unsigned char devnum);
+unsigned int __nvp6158_get_yminus_slope(unsigned char ch, unsigned char devnum);
+unsigned int __nvp6158_get_sync_width( unsigned char ch, unsigned char devnum );
+void __nvp6168_set_eq_ext_val(video_equalizer_info_s *pvin_eq_set);
+
+void nvp6158_video_input_cable_manualdist_read(video_input_cable_dist *vin_cable_dist );
+void nvp6168_video_input_cable_manualdist_read(video_input_cable_dist *vin_cable_dist );
+
+int nvp6158_set_equalizer(video_equalizer_info_s *pvin_eq_set);
+int nvp6168_set_equalizer(video_equalizer_info_s *pvin_eq_set);
+int  nvp6158_video_input_cable_measure_way( unsigned char ch, unsigned char devnum );
+CABLE_DISTANCE nvp6158_get_eq_dist(video_equalizer_info_s *ps_eq_info);
+
+#endif /* _RAPTOR3_VIDEO_EQ_H_ */