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ASoC: rockchip: pdm: Allow mclk shift around 1 ppm
This patch allow mclk shift around +/- 1ppm compared to requested freq. we could not always achieve the precise freq as required, e.g. request: 98304000, but got: 98303999 there is no big deal and any side effect on the above case, so, we allow a tiny shift for mclk. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Change-Id: I8da91e467cfc0306fa9069ab30079d5ddf1c0336
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@@ -28,6 +28,7 @@
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#define PDM_START_DELAY_MS_MAX (1000)
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#define PDM_FILTER_DELAY_MS_MIN (20)
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#define PDM_FILTER_DELAY_MS_MAX (1000)
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#define PDM_CLK_SHIFT_PPM_MAX (1000000) /* 1 ppm */
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enum rk_pdm_version {
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RK_PDM_RK3229,
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@@ -89,7 +90,7 @@ static unsigned int get_pdm_clk(struct rk_pdm_dev *pdm, unsigned int sr,
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unsigned int *clk_src, unsigned int *clk_out,
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unsigned int signoff)
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{
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unsigned int i, count, clk, div, rate;
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unsigned int i, count, clk, div, rate, delta;
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clk = 0;
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if (!sr)
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@@ -103,7 +104,9 @@ static unsigned int get_pdm_clk(struct rk_pdm_dev *pdm, unsigned int sr,
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if ((div & (div - 1)) == 0) {
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*clk_out = clkref[i].clk_out;
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rate = clk_round_rate(pdm->clk, clkref[i].clk);
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if (rate != clkref[i].clk)
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delta = clkref[i].clk / PDM_CLK_SHIFT_PPM_MAX;
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if (rate < clkref[i].clk - delta ||
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rate > clkref[i].clk + delta)
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continue;
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clk = clkref[i].clk;
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*clk_src = clkref[i].clk;
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