media: rockchip: isp: set clk depend on resolution for cif input

Change-Id: I0d87a9256863fab2e8412929baa8565ae860d9c9
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
This commit is contained in:
Cai YiWei
2020-09-14 18:14:25 +08:00
committed by Tao Huang
parent b873c8d42f
commit 12fea355c8

View File

@@ -153,7 +153,7 @@ static int __isp_pipeline_s_isp_clk(struct rkisp_pipeline *p)
if (rkisp_clk_dbg)
return 0;
if (dev->isp_inp & (INP_RAWRD0 | INP_RAWRD1 | INP_RAWRD2)) {
if (dev->isp_inp & (INP_RAWRD0 | INP_RAWRD1 | INP_RAWRD2 | INP_CIF)) {
for (i = 0; i < hw_dev->num_clk_rate_tbl; i++) {
if (w <= hw_dev->clk_rate_tbl[i].refer_data)
break;