di: fix image jitter and flash av ntsc [1/1]

PD#SWPL-8937

Problem:
image jitter and flash av ntsc

Solution:
1.force entry pulldown32

Verify:
tl1

Change-Id: I8e86993be8db358c70cd9a4d86c9d578bce74f6e
Signed-off-by: Wenfeng Guo <wenfeng.guo@amlogic.com>
This commit is contained in:
Wenfeng Guo
2019-05-29 15:48:52 +08:00
committed by Jianxin Pan
parent 256d807cf3
commit 137c2f4d14
3 changed files with 8 additions and 4 deletions

View File

@@ -61,6 +61,7 @@
#endif
#include <linux/amlogic/media/video_sink/video.h>
#include "register.h"
#include "register_nr4.h"
#include "deinterlace.h"
#include "deinterlace_dbg.h"
#include "nr_downscale.h"
@@ -3072,13 +3073,16 @@ static void pre_de_process(void)
}
}
/*patch for SECAM signal format*/
/*patch for SECAM signal format from vlsi-feijun for all IC*/
if (di_pre_stru.di_inp_buf->vframe->sig_fmt ==
TVIN_SIG_FMT_CVBS_SECAM && secam_cfr_en) {
secam_cfr_fun((di_pre_stru.di_inp_buf->vframe->type &
VIDTYPE_TYPEMASK) == VIDTYPE_INTERLACE_TOP);
} else {
DI_Wr_reg_bits(NR2_SW_EN, 0, 7, 1);/*set cfr_en:1*/
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXLX))
DI_Wr_reg_bits(NR4_TOP_CTRL, 0, 12, 1);/*set cfr_en:0*/
else
DI_Wr_reg_bits(NR2_SW_EN, 0, 7, 1);/*set cfr_en:0*/
DI_Wr_reg_bits(NR2_CFR_PARA_CFG0, 2, 2, 2);
}

View File

@@ -71,7 +71,7 @@ UINT8 FlmVOFSftInt(struct sFlmSftPar *pPar)
pPar->dif01rate = 20;
pPar->flag_di01th = 0;
pPar->numthd = 60;
pPar->flm32_dif02_gap_th = 7;
pPar->flm32_dif02_gap_th = 3;/*suggest from vlsi-yanling*/
pPar->flm32_luma_th = 90;
pPar->sF32Dif02M0 = 4096;/* mpeg-4096, cvbs-8192 */
pPar->sF32Dif02M1 = 4096;

View File

@@ -24,7 +24,7 @@ int cmb32_blw_wnd = 180; /*192 */
module_param(cmb32_blw_wnd, int, 0644);
MODULE_PARM_DESC(cmb32_blw_wnd, "cmb32_blw_wnd");
static int cmb32_wnd_ext = 11;
static int cmb32_wnd_ext = 12;/*suggest from vlsi-yanling*/
module_param(cmb32_wnd_ext, int, 0644);
MODULE_PARM_DESC(cmb32_wnd_ext, "cmb32_wnd_ext");