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ARM: dts: meson: fix PHY deassert timing requirements
[ Upstream commit656ab1bdcd] According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY registers. On similar boards with the same PHY this fixes an issue where Ethernet link would not come up when using ip link set down/up. Fixes:a2c6e82e53("ARM: dts: meson: switch to the generic Ethernet PHY reset bindings") Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> # on Odroid-C1+ Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/ff78772b306411e145769c46d4090554344db41e.1607363522.git.stefan@agner.ch Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
154105c0ba
commit
13f4c61d2f
@@ -219,7 +219,7 @@
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reg = <0>;
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reset-assert-us = <10000>;
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reset-deassert-us = <30000>;
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reset-deassert-us = <80000>;
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reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&gpio_intc>;
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@@ -83,7 +83,7 @@
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reg = <0>;
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reset-assert-us = <10000>;
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reset-deassert-us = <30000>;
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reset-deassert-us = <80000>;
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reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
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};
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};
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