rk3288: temporarily not limit dclk_lcdc1 div to be even

This commit is contained in:
dkl
2014-04-03 10:21:02 +08:00
parent b0d09d6ea2
commit 14d9c873ac

View File

@@ -1414,7 +1414,7 @@
rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
#clock-cells = <0>;
rockchip,clkops-idx =
<CLKOPS_RATE_MUX_EVENDIV>;
<CLKOPS_RATE_MUX_DIV>;
};
};