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hdmi: add the following extra resolutions:

Browse Source 
1366x768p60hz
1600x900p60hz
800x600p60hz
1024x600p60hz
1024x768p60hz
1360x768p60hz
1440x900p60hz
1680x1050p60hz

Change-Id: I0ef660f1f603d0dcd731980b2bccce3a54befa3f
This commit is contained in:
Mauro Ribeiro
2015-01-09 12:51:13 -02:00
parent 3b322d3e7d
commit 152ecbe4f4
13 changed files with 722 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

173
arch/arm/mach-meson8b/hdmi_tx_hw/hdmi_tx_hw.c Normal file → Executable file
View File

@@ -764,6 +764,134 @@ static void hdmi_tvenc_set(Hdmi_tx_video_para_t *param)
SOF_LINES = 10;
TOTAL_FRAMES = 4;
}
else if(param->VIC == HDMI_800x600p60hz) {
INTERLACE_MODE = 0;
PIXEL_REPEAT_VENC = 0;
PIXEL_REPEAT_HDMI = 0;
ACTIVE_PIXELS = 800;
ACTIVE_LINES = 600;
LINES_F0 = 628;
LINES_F1 = 628;
FRONT_PORCH = 40;
HSYNC_PIXELS = 128;
BACK_PORCH = 88;
EOF_LINES = 1;
VSYNC_LINES = 4;
SOF_LINES = 23;
TOTAL_FRAMES = 4;
}
else if(param->VIC == HDMI_1024x600p60hz) {
INTERLACE_MODE = 0;
PIXEL_REPEAT_VENC = 0;
PIXEL_REPEAT_HDMI = 0;
ACTIVE_PIXELS = 1024;
ACTIVE_LINES = 600;
LINES_F0 = 638;
LINES_F1 = 638;
FRONT_PORCH = 24;
HSYNC_PIXELS = 136;
BACK_PORCH = 160;
EOF_LINES = 3;
VSYNC_LINES = 6;
SOF_LINES = 29;
TOTAL_FRAMES = 4;
}
else if(param->VIC == HDMI_1024x768p60hz) {
INTERLACE_MODE = 0;
PIXEL_REPEAT_VENC = 0;
PIXEL_REPEAT_HDMI = 0;
ACTIVE_PIXELS = 1024;
ACTIVE_LINES = 768;
LINES_F0 = 806;
LINES_F1 = 806;
FRONT_PORCH = 24;
HSYNC_PIXELS = 136;
BACK_PORCH = 160;
EOF_LINES = 3;
VSYNC_LINES = 6;
SOF_LINES = 29;
TOTAL_FRAMES = 4;
}
else if(param->VIC == HDMI_1360x768p60hz) {
INTERLACE_MODE = 0;
PIXEL_REPEAT_VENC = 0;
PIXEL_REPEAT_HDMI = 0;
ACTIVE_PIXELS = 1360;
ACTIVE_LINES = 768;
LINES_F0 = 795;
LINES_F1 = 795;
FRONT_PORCH = 64;
HSYNC_PIXELS = 112;
BACK_PORCH = 256;
EOF_LINES = 3;
VSYNC_LINES = 6;
SOF_LINES = 18;
TOTAL_FRAMES = 4;
}
else if(param->VIC == HDMI_1440x900p60hz) {
INTERLACE_MODE = 0;
PIXEL_REPEAT_VENC = 0;
PIXEL_REPEAT_HDMI = 0;
ACTIVE_PIXELS = 1440;
ACTIVE_LINES = 900;
LINES_F0 = 934;
LINES_F1 = 934;
FRONT_PORCH = 80;
HSYNC_PIXELS = 152;
BACK_PORCH = 232;
EOF_LINES = 3;
VSYNC_LINES = 6;
SOF_LINES = 25;
TOTAL_FRAMES = 4;
}
else if(param->VIC == HDMI_1680x1050p60hz) {
INTERLACE_MODE = 0;
PIXEL_REPEAT_VENC = 0;
PIXEL_REPEAT_HDMI = 0;
ACTIVE_PIXELS = 1680;
ACTIVE_LINES = 1050;
LINES_F0 = 1089;
LINES_F1 = 1089;
FRONT_PORCH = 104;
HSYNC_PIXELS = 176;
BACK_PORCH = 280;
EOF_LINES = 3;
VSYNC_LINES = 6;
SOF_LINES = 30;
TOTAL_FRAMES = 4;
}
else if(param->VIC==HDMI_1366x768p60hz){
INTERLACE_MODE = 0;
PIXEL_REPEAT_VENC = 0; //MDRJR
PIXEL_REPEAT_HDMI = 0;
ACTIVE_PIXELS = 1366;
ACTIVE_LINES = 768;
LINES_F0 = 798;
LINES_F1 = 798;
FRONT_PORCH = 70;
HSYNC_PIXELS = 143;
BACK_PORCH = 213;
EOF_LINES = 3;
VSYNC_LINES = 3;
SOF_LINES = 24;
TOTAL_FRAMES = 4;
}
else if(param->VIC==HDMI_1600x900p60hz){
INTERLACE_MODE = 0;
PIXEL_REPEAT_VENC = 0; //MDRJR
PIXEL_REPEAT_HDMI = 0;
ACTIVE_PIXELS = 1600;
ACTIVE_LINES = 900;
LINES_F0 = 1800;
LINES_F1 = 1800;
FRONT_PORCH = 24;
HSYNC_PIXELS = 80;
BACK_PORCH = 96;
EOF_LINES = 1;
VSYNC_LINES = 3;
SOF_LINES = 96;
TOTAL_FRAMES = 4;
}
else if(param->VIC==HDMI_1280x1024){
INTERLACE_MODE = 0;
PIXEL_REPEAT_VENC = 0;
@@ -942,6 +1070,16 @@ static void hdmi_tvenc_set(Hdmi_tx_video_para_t *param)
case HDMI_800x480p60hz:
aml_write_reg32(P_VPU_HDMI_SETTING, 2);
break;
case HDMI_1366x768p60hz:
case HDMI_1600x900p60hz:
case HDMI_800x600p60hz:
case HDMI_1024x600p60hz:
case HDMI_1024x768p60hz:
case HDMI_1360x768p60hz:
case HDMI_1440x900p60hz:
case HDMI_1680x1050p60hz:
aml_write_reg32(P_VPU_HDMI_SETTING, 0xe);
break;
case HDMI_720p60:
case HDMI_720p50:
// Annie 01Sep2011: Register VENC_DVI_SETTING and VENC_DVI_SETTING_MORE are no long valid, use VPU_HDMI_SETTING instead.
@@ -1849,6 +1987,30 @@ static void hdmitx_set_pll(Hdmi_tx_video_para_t *param)
case HDMI_800x480p60hz:
set_vmode_clk(VMODE_800X480P_60HZ);
break;
case HDMI_1366x768p60hz:
set_vmode_clk(VMODE_1366X768P_60HZ);
break;
case HDMI_800x600p60hz:
set_vmode_clk(VMODE_800X600P_60HZ);
break;
case HDMI_1024x600p60hz:
set_vmode_clk(VMODE_1024X600P_60HZ);
break;
case HDMI_1024x768p60hz:
set_vmode_clk(VMODE_1024X768P_60HZ);
break;
case HDMI_1360x768p60hz:
set_vmode_clk(VMODE_1360X768P_60HZ);
break;
case HDMI_1440x900p60hz:
set_vmode_clk(VMODE_1440X900P_60HZ);
break;
case HDMI_1680x1050p60hz:
set_vmode_clk(VMODE_1680X1050P_60HZ);
break;
case HDMI_1600x900p60hz:
set_vmode_clk(VMODE_1600X900P_60HZ);
break;
case HDMI_1080i60:
case HDMI_1080i50:
set_vmode_clk(VMODE_1080I);
@@ -1909,6 +2071,9 @@ static int hdmitx_set_dispmode(hdmitx_dev_t* hdmitx_device, Hdmi_tx_video_para_t
&&(param->VIC!=HDMI_1080p24)
&&(param->VIC!=HDMI_1080p60)&&(param->VIC!=HDMI_1080p50)
&&(param->VIC!=HDMI_720p60)&&(param->VIC!=HDMI_720p50) &&(param->VIC!=HDMI_800x480p60hz)
&&(param->VIC!=HDMI_1366x768p60hz)&&(param->VIC!=HDMI_1600x900p60hz)
&&(param->VIC!=HDMI_800x600p60hz)&&(param->VIC!=HDMI_1024x600p60hz)&&(param->VIC!=HDMI_1024x768p60hz)
&&(param->VIC!=HDMI_1360x768p60hz)&&(param->VIC!=HDMI_1440x900p60hz)&&(param->VIC!=HDMI_1680x1050p60hz)
&&(param->VIC!=HDMI_640x480p60) &&(param->VIC!=HDMI_1280x1024) &&(param->VIC!=HDMI_1920x1200) && (param->VIC!=HDMI_800p)
&&(param->VIC!=HDMI_4k2k_30)&&(param->VIC!=HDMI_4k2k_25)&&(param->VIC!=HDMI_4k2k_24)&&(param->VIC!=HDMI_4k2k_smpte_24)
&&(param->VIC!=HDMI_1080i60)&&(param->VIC!=HDMI_1080i50)){
@@ -2208,6 +2373,14 @@ static Vic_attr_map vic_attr_map_table[] = {
{HDMI_720p60, 74250 },
{HDMI_800p, 71000 },
{HDMI_800x480p60hz, 29760 },
{HDMI_1366x768p60hz, 85500 },
{HDMI_1600x900p60hz, 108000},
{HDMI_800x600p60hz, 40000},
{HDMI_1024x600p60hz, 51450},
{HDMI_1024x768p60hz, 65000},
{HDMI_1360x768p60hz, 85500},
{HDMI_1440x900p60hz, 106500},
{HDMI_1680x1050p60hz, 146250},
{HDMI_1080i60, 74250 },
{HDMI_480i60, 27000 },
{HDMI_480i60_16x9, 27000 },

224
arch/arm/mach-meson8b/include/mach/tvregs.h
View File

@@ -193,6 +193,214 @@ static const reg_t tvregs_800x480p60hz[] = {
{MREG_END_MARKER, 0},
};
static const reg_t tvregs_1366x768p60hz[] = {
{P_VENC_VDAC_SETTING, 0xff, },
{P_ENCP_VIDEO_EN, 0, },
{P_ENCI_VIDEO_EN, 0, },
{P_ENCP_VIDEO_MODE, 0x4040,},
{P_ENCP_VIDEO_MODE_ADV, 0x18,},
{P_ENCP_VIDEO_MAX_PXCNT, 0x6FF,},
{P_ENCP_VIDEO_MAX_LNCNT, 0x31D,},
{P_ENCP_VIDEO_HAVON_BEGIN, 0x164,},
{P_ENCP_VIDEO_HAVON_END, 0x6B9,},
{P_ENCP_VIDEO_VAVON_BLINE, 0x1B,},
{P_ENCP_VIDEO_VAVON_ELINE, 0x31A,},
{P_ENCP_VIDEO_HSO_BEGIN, 0x0,},
{P_ENCP_VIDEO_HSO_END, 0x8F,},
{P_ENCP_VIDEO_VSO_BEGIN, 0x1E,},
{P_ENCP_VIDEO_VSO_END, 0x32,},
{P_ENCP_VIDEO_VSO_BLINE, 0x0,},
{P_ENCP_VIDEO_VSO_ELINE, 0x3,},
{P_ENCP_VIDEO_EN, 1, },
{P_ENCI_VIDEO_EN, 0, },
{MREG_END_MARKER, 0 }
};
static const reg_t tvregs_800x600p60hz[] = {
{P_VENC_VDAC_SETTING, 0xff, },
{P_ENCP_VIDEO_EN, 0, },
{P_ENCI_VIDEO_EN, 0, },
{P_ENCP_VIDEO_MODE, 0x4040,},
{P_ENCP_VIDEO_MODE_ADV, 0x18,},
{P_ENCP_VIDEO_MAX_PXCNT, 0x41F,},
{P_ENCP_VIDEO_MAX_LNCNT, 0x273,},
{P_ENCP_VIDEO_HAVON_BEGIN, 0xD8,},
{P_ENCP_VIDEO_HAVON_END, 0x3F7,},
{P_ENCP_VIDEO_VAVON_BLINE, 0x1B,},
{P_ENCP_VIDEO_VAVON_ELINE, 0x272,},
{P_ENCP_VIDEO_HSO_BEGIN, 0x0,},
{P_ENCP_VIDEO_HSO_END, 0x80,},
{P_ENCP_VIDEO_VSO_BEGIN, 0x1E,},
{P_ENCP_VIDEO_VSO_END, 0x32,},
{P_ENCP_VIDEO_VSO_BLINE, 0x0,},
{P_ENCP_VIDEO_VSO_ELINE, 0x4,},
{P_ENCP_VIDEO_EN, 1, },
{P_ENCI_VIDEO_EN, 0, },
{MREG_END_MARKER, 0 }
};
static const reg_t tvregs_1024x600p60hz[] = {
{P_VENC_VDAC_SETTING, 0xff, },
{P_ENCP_VIDEO_EN, 0, },
{P_ENCI_VIDEO_EN, 0, },
{P_ENCP_VIDEO_MODE, 0x4040,},
{P_ENCP_VIDEO_MODE_ADV, 0x18,},
{P_ENCP_VIDEO_MAX_PXCNT, 0x53F,},
{P_ENCP_VIDEO_MAX_LNCNT, 0x27D,},
{P_ENCP_VIDEO_HAVON_BEGIN, 0x128,},
{P_ENCP_VIDEO_HAVON_END, 0x527,},
{P_ENCP_VIDEO_VAVON_BLINE, 0x23,},
{P_ENCP_VIDEO_VAVON_ELINE, 0x27A,},
{P_ENCP_VIDEO_HSO_BEGIN, 0x0,},
{P_ENCP_VIDEO_HSO_END, 0x88,},
{P_ENCP_VIDEO_VSO_BEGIN, 0x1E,},
{P_ENCP_VIDEO_VSO_END, 0x32,},
{P_ENCP_VIDEO_VSO_BLINE, 0x0,},
{P_ENCP_VIDEO_VSO_ELINE, 0x6,},
{P_ENCP_VIDEO_EN, 1, },
{P_ENCI_VIDEO_EN, 0, },
{MREG_END_MARKER, 0 }
};
static const reg_t tvregs_1024x768p60hz[] = {
{P_VENC_VDAC_SETTING, 0xff, },
{P_ENCP_VIDEO_EN, 0, },
{P_ENCI_VIDEO_EN, 0, },
{P_ENCP_VIDEO_MODE, 0x4040,},
{P_ENCP_VIDEO_MODE_ADV, 0x18,},
{P_ENCP_VIDEO_MAX_PXCNT, 0x53F,},
{P_ENCP_VIDEO_MAX_LNCNT, 0x325,},
{P_ENCP_VIDEO_HAVON_BEGIN, 0x128,},
{P_ENCP_VIDEO_HAVON_END, 0x527,},
{P_ENCP_VIDEO_VAVON_BLINE, 0x23,},
{P_ENCP_VIDEO_VAVON_ELINE, 0x322,},
{P_ENCP_VIDEO_HSO_BEGIN, 0x0,},
{P_ENCP_VIDEO_HSO_END, 0x88,},
{P_ENCP_VIDEO_VSO_BEGIN, 0x1E,},
{P_ENCP_VIDEO_VSO_END, 0x32,},
{P_ENCP_VIDEO_VSO_BLINE, 0x0,},
{P_ENCP_VIDEO_VSO_ELINE, 0x6,},
{P_ENCP_VIDEO_EN, 1, },
{P_ENCI_VIDEO_EN, 0, },
{MREG_END_MARKER, 0 }
};
static const reg_t tvregs_1360x768p60hz[] = {
{P_VENC_VDAC_SETTING, 0xff, },
{P_ENCP_VIDEO_EN, 0, },
{P_ENCI_VIDEO_EN, 0, },
{P_ENCP_VIDEO_MODE, 0x4040,},
{P_ENCP_VIDEO_MODE_ADV, 0x18,},
{P_ENCP_VIDEO_MAX_PXCNT, 0x6FF,},
{P_ENCP_VIDEO_MAX_LNCNT, 0x31A,},
{P_ENCP_VIDEO_HAVON_BEGIN, 0x170,},
{P_ENCP_VIDEO_HAVON_END, 0x6BF,},
{P_ENCP_VIDEO_VAVON_BLINE, 0x18,},
{P_ENCP_VIDEO_VAVON_ELINE, 0x317,},
{P_ENCP_VIDEO_HSO_BEGIN, 0x0,},
{P_ENCP_VIDEO_HSO_END, 0x70,},
{P_ENCP_VIDEO_VSO_BEGIN, 0x1E,},
{P_ENCP_VIDEO_VSO_END, 0x32,},
{P_ENCP_VIDEO_VSO_BLINE, 0x0,},
{P_ENCP_VIDEO_VSO_ELINE, 0x6,},
{P_ENCP_VIDEO_EN, 1, },
{P_ENCI_VIDEO_EN, 0, },
{MREG_END_MARKER, 0 }
};
static const reg_t tvregs_1440x900p60hz[] = {
{P_VENC_VDAC_SETTING, 0xff, },
{P_ENCP_VIDEO_EN, 0, },
{P_ENCI_VIDEO_EN, 0, },
{P_ENCP_VIDEO_MODE, 0x4040,},
{P_ENCP_VIDEO_MODE_ADV, 0x18,},
{P_ENCP_VIDEO_MAX_PXCNT, 0x76F,},
{P_ENCP_VIDEO_MAX_LNCNT, 0x3A5,},
{P_ENCP_VIDEO_HAVON_BEGIN, 0x180,},
{P_ENCP_VIDEO_HAVON_END, 0x71F,},
{P_ENCP_VIDEO_VAVON_BLINE, 0x1F,},
{P_ENCP_VIDEO_VAVON_ELINE, 0x3A2,},
{P_ENCP_VIDEO_HSO_BEGIN, 0x0,},
{P_ENCP_VIDEO_HSO_END, 0x98,},
{P_ENCP_VIDEO_VSO_BEGIN, 0x1E,},
{P_ENCP_VIDEO_VSO_END, 0x32,},
{P_ENCP_VIDEO_VSO_BLINE, 0x0,},
{P_ENCP_VIDEO_VSO_ELINE, 0x6,},
{P_ENCP_VIDEO_EN, 1, },
{P_ENCI_VIDEO_EN, 0, },
{MREG_END_MARKER, 0 }
};
static const reg_t tvregs_1680x1050p60hz[] = {
{P_VENC_VDAC_SETTING, 0xff, },
{P_ENCP_VIDEO_EN, 0, },
{P_ENCI_VIDEO_EN, 0, },
{P_ENCP_VIDEO_MODE, 0x4040,},
{P_ENCP_VIDEO_MODE_ADV, 0x18,},
{P_ENCP_VIDEO_MAX_PXCNT, 0x8BF,},
{P_ENCP_VIDEO_MAX_LNCNT, 0x440,},
{P_ENCP_VIDEO_HAVON_BEGIN, 0x1C8,},
{P_ENCP_VIDEO_HAVON_END, 0x857,},
{P_ENCP_VIDEO_VAVON_BLINE, 0x24,},
{P_ENCP_VIDEO_VAVON_ELINE, 0x43D,},
{P_ENCP_VIDEO_HSO_BEGIN, 0x0,},
{P_ENCP_VIDEO_HSO_END, 0xB0,},
{P_ENCP_VIDEO_VSO_BEGIN, 0x1E,},
{P_ENCP_VIDEO_VSO_END, 0x32,},
{P_ENCP_VIDEO_VSO_BLINE, 0x0,},
{P_ENCP_VIDEO_VSO_ELINE, 0x6,},
{P_ENCP_VIDEO_EN, 1, },
{P_ENCI_VIDEO_EN, 0, },
{MREG_END_MARKER, 0 }
};
static const reg_t tvregs_1600x900p60hz[] = {
{P_VENC_VDAC_SETTING, 0xff, },
{P_ENCP_VIDEO_EN, 0, },
{P_ENCI_VIDEO_EN, 0, },
{P_ENCP_VIDEO_MODE, 0x4040,},
{P_ENCP_VIDEO_MODE_ADV, 0x18,},
{P_ENCP_VIDEO_MAX_PXCNT, 0x707,},
{P_ENCP_VIDEO_MAX_LNCNT, 0x3E7,},
{P_ENCP_VIDEO_HAVON_BEGIN, 0xB0,},
{P_ENCP_VIDEO_HAVON_END, 0x6EF,},
{P_ENCP_VIDEO_VAVON_BLINE, 0x63,},
{P_ENCP_VIDEO_VAVON_ELINE, 0x3E6,},
{P_ENCP_VIDEO_HSO_BEGIN, 0x0,},
{P_ENCP_VIDEO_HSO_END, 0x50,},
{P_ENCP_VIDEO_VSO_BEGIN, 0x1E,},
{P_ENCP_VIDEO_VSO_END, 0x32,},
{P_ENCP_VIDEO_VSO_BLINE, 0x0,},
{P_ENCP_VIDEO_VSO_ELINE, 0x3,},
{P_ENCP_VIDEO_EN, 1, },
{P_ENCI_VIDEO_EN, 0, },
{MREG_END_MARKER, 0 }
};
static const reg_t tvregs_720p_50hz[] = {
{P_ENCP_VIDEO_EN, 0, },
{P_ENCI_VIDEO_EN, 0, },
@@ -1614,6 +1822,14 @@ static const reg_t *tvregsTab[] = {
tvregs_720p,
tvregs_800p,
tvregs_800x480p60hz,
tvregs_1366x768p60hz,
tvregs_1600x900p60hz,
tvregs_800x600p60hz,
tvregs_1024x600p60hz,
tvregs_1024x768p60hz,
tvregs_1360x768p60hz,
tvregs_1440x900p60hz,
tvregs_1680x1050p60hz,
tvregs_1080i, //Adjust tvregs_* sequences and match the enum define in tvmode.h
tvregs_1080p,
tvregs_720p_50hz,
@@ -1645,6 +1861,14 @@ static const tvinfo_t tvinfoTab[] = {
{.xres = 1280, .yres = 720, .id = "720p"},
{.xres = 1280, .yres = 800, .id = "800p"},
{.xres = 800, .yres = 480, .id = "800x480p60hz"},
{.xres = 1366, .yres = 768, .id = "1366x768p60hz"},
{.xres = 1600, .yres = 900, .id = "1600x900p60hz"},
{.xres = 800, .yres = 600, .id = "800x600p60hz"},
{.xres = 1024, .yres = 600, .id = "1024x600p60hz"},
{.xres = 1024, .yres = 768, .id = "1024x768p60hz"},
{.xres = 1360, .yres = 768, .id = "1360x768p60hz"},
{.xres = 1440, .yres = 900, .id = "1440x900p60hz"},
{.xres = 1680, .yres = 1050, .id = "1680x1050p60hz"},
{.xres = 1920, .yres = 1080, .id = "1080i"},
{.xres = 1920, .yres = 1080, .id = "1080p"},
{.xres = 1280, .yres = 720, .id = "720p50hz"},

10
drivers/amlogic/display/aml_logo/logo_display/output_dev_osd.c
View File

@@ -45,9 +45,17 @@ static hdmi_only_info_t hdmi_only_info[PARA_HDMI_ONLY]={
{"720p",VMODE_720P},
{"800p",VMODE_800P},
{"vga",VMODE_VGA},
{"sxga",VMODE_SXGA},
{"sxga", VMODE_SXGA},
{"xga",VMODE_XGA},
{"800x480p60hz", VMODE_800X480P_60HZ},
{"1366x768p60hz", VMODE_1366X768P_60HZ},
{"1600x900p60hz", VMODE_1600X900P_60HZ},
{"800x600p60hz", VMODE_800X600P_60HZ},
{"1024x600p60hz", VMODE_1024X600P_60HZ},
{"1024x768p60hz", VMODE_1024X768P_60HZ},
{"1360x768p60hz", VMODE_1360X760P_60HZ},
{"1440x900p60hz", VMODE_1440X900P_60HZ},
{"1680x1050p60hz", VMODE_1680X1050P_60HZ},
{"1920x1200", VMODE_1920x1200},
{"1080i",VMODE_1080I},
{"1080p",VMODE_1080P},

84
drivers/amlogic/display/vout/enc_clk_config.c
View File

@@ -146,6 +146,66 @@ static void set_hpll_clk_out(unsigned clk)
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x4001042d);
WAIT_FOR_PLL_LOCKED(P_HHI_VID_PLL_CNTL);
break;
case 2058:
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x59c80000);
aml_write_reg32(P_HHI_VID_PLL_CNTL3, 0x0a563823);
aml_write_reg32(P_HHI_VID_PLL_CNTL4, 0x0123b100);
aml_write_reg32(P_HHI_VID_PLL_CNTL5, 0x12385);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x6001042a);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x4001042a);
WAIT_FOR_PLL_LOCKED(P_HHI_VID_PLL_CNTL);
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8cdf4);
break;
case 1600:
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8c000);
aml_write_reg32(P_HHI_VID_PLL_CNTL3, 0x8a7ad023);
aml_write_reg32(P_HHI_VID_PLL_CNTL4, 0x4023d100);
aml_write_reg32(P_HHI_VID_PLL_CNTL5, 0x12286);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x60000442);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x40000442);
WAIT_FOR_PLL_LOCKED(P_HHI_VID_PLL_CNTL);
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8c506);
break;
case 1710:
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8c000);
aml_write_reg32(P_HHI_VID_PLL_CNTL3, 0x8a7ad023);
aml_write_reg32(P_HHI_VID_PLL_CNTL4, 0x4023d100);
aml_write_reg32(P_HHI_VID_PLL_CNTL5, 0x12286);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x60000447);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x40000447);
WAIT_FOR_PLL_LOCKED(P_HHI_VID_PLL_CNTL);
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8c3ac);
break;
case 2130:
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x59c80000);
aml_write_reg32(P_HHI_VID_PLL_CNTL3, 0x0a563823);
aml_write_reg32(P_HHI_VID_PLL_CNTL4, 0x0123b100);
aml_write_reg32(P_HHI_VID_PLL_CNTL5, 0x12385);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x6001042c);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x4001042c);
WAIT_FOR_PLL_LOCKED(P_HHI_VID_PLL_CNTL);
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8c74f);
break;
case 2600:
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x59c80000);
aml_write_reg32(P_HHI_VID_PLL_CNTL3, 0x0a563823);
aml_write_reg32(P_HHI_VID_PLL_CNTL4, 0x0123b100);
aml_write_reg32(P_HHI_VID_PLL_CNTL5, 0x12385);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x60010436);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x40010436);
WAIT_FOR_PLL_LOCKED(P_HHI_VID_PLL_CNTL);
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8c294);
break;
case 2925:
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x59c80000);
aml_write_reg32(P_HHI_VID_PLL_CNTL3, 0x0a563823);
aml_write_reg32(P_HHI_VID_PLL_CNTL4, 0x0123b100);
aml_write_reg32(P_HHI_VID_PLL_CNTL5, 0x12385);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x6001043c);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x4001043c);
WAIT_FOR_PLL_LOCKED(P_HHI_VID_PLL_CNTL);
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8cfb4);
break;
case 2380:
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x59c80000);
aml_write_reg32(P_HHI_VID_PLL_CNTL3, 0x0a563823);
@@ -156,6 +216,16 @@ static void set_hpll_clk_out(unsigned clk)
WAIT_FOR_PLL_LOCKED(P_HHI_VID_PLL_CNTL);
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8c994);
break;
case 1716:
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8c000);
aml_write_reg32(P_HHI_VID_PLL_CNTL4, 0x4023d100);
aml_write_reg32(P_HHI_VID_PLL_CNTL3, 0x8a7ad023);
aml_write_reg32(P_HHI_VID_PLL_CNTL5, 0x12286);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x60000447);
aml_write_reg32(P_HHI_VID_PLL_CNTL, 0x40000447);
WAIT_FOR_PLL_LOCKED(P_HHI_VID_PLL_CNTL);
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x69c8c7f8);
break;
case 2014:
aml_write_reg32(P_HHI_VID_PLL_CNTL2, 0x59c8cf55);
aml_write_reg32(P_HHI_VID_PLL_CNTL3, 0x0a563823);
@@ -558,7 +628,15 @@ static enc_clk_val_t setting_enc_clk_val[] = {
{VMODE_576P, 2160, 8, 1, 1, VIU_ENCP, 5, 4, 2, 1, -1, -1, -1, 1, -1},
{VMODE_720P, 1488, 2, 1, 1, VIU_ENCP, 10, 1, 2, 1, -1, -1, -1, 1, -1},
{VMODE_800P, 1422, 2, 2, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1}, // MDRJR Verify
{VMODE_800X480P_60HZ, 2380, 8, 4, 1, VIU_ENCP, 10, 4, 1, 1, -1, -1, -1, 1, -1},
{VMODE_800X480P_60HZ, 2380, 8, 4, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_1366X768P_60HZ, 1716, 2, 2, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_1600X900P_60HZ, 2160, 2, 2, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_800X600P_60HZ, 1600, 4, 4, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_1024X600P_60HZ, 2058, 4, 4, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_1024X768P_60HZ, 2600, 4, 4, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_1360X768P_60HZ, 1710, 2, 2, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_1440X900P_60HZ, 2130, 2, 2, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_1680X1050P_60HZ, 2925, 2, 2, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_1080I, 1488, 2, 1, 1, VIU_ENCP, 10, 1, 2, 1, -1, -1, -1, 1, -1},
{VMODE_1080P, 1488, 1, 1, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
{VMODE_1080P, 1488, 1, 1, 1, VIU_ENCP, 10, 1, 1, 1, -1, -1, -1, 1, -1},
@@ -650,6 +728,10 @@ void set_vmode_clk(vmode_t mode)
mutex_unlock(&setclk_mutex);
set_hpll_hdmi_od(p_enc[j].hpll_hdmi_od);
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON8B
if((mode == VMODE_800X600P_60HZ) || (mode == VMODE_1024X600P_60HZ) || (mode == VMODE_1024X768P_60HZ))
aml_set_reg32_bits(P_HHI_VID_PLL_CNTL, 2, 18, 2);
#endif
set_vid_pll_div(p_enc[j].vid_pll_div);
set_clk_final_div(p_enc[j].clk_final_div);
set_hdmi_tx_pixel_div(p_enc[j].hdmi_tx_pixel_div);

101
drivers/amlogic/display/vout/tvconf.c
View File

@@ -72,7 +72,10 @@ SET_TV_CLASS_ATTR(vdac_setting,parse_vdac_setting)
static const tvmode_t vmode_tvmode_tab[] =
{
TVMODE_480I, TVMODE_480I_RPT, TVMODE_480CVBS, TVMODE_480P, TVMODE_480P_RPT, TVMODE_576I, TVMODE_576I_RPT, TVMODE_576CVBS, TVMODE_576P, TVMODE_576P_RPT, TVMODE_720P, TVMODE_800P, TVMODE_800X480P_60HZ, TVMODE_1080I, TVMODE_1080P,
TVMODE_480I, TVMODE_480I_RPT, TVMODE_480CVBS, TVMODE_480P, TVMODE_480P_RPT, TVMODE_576I, TVMODE_576I_RPT, TVMODE_576CVBS, TVMODE_576P, TVMODE_576P_RPT, TVMODE_720P, TVMODE_800P, TVMODE_800X480P_60HZ,
TVMODE_1366X768P_60HZ, TVMODE_1600X900P_60HZ,
TVMODE_800X600P_60HZ, TVMODE_1024X600P_60HZ, TVMODE_1024X768P_60HZ, TVMODE_1360X768P_60HZ, TVMODE_1440X900P_60HZ, TVMODE_1680X1050P_60HZ,
TVMODE_1080I, TVMODE_1080P,
TVMODE_720P_50HZ, TVMODE_1080I_50HZ, TVMODE_1080P_50HZ,TVMODE_1080P_24HZ, TVMODE_4K2K_30HZ, TVMODE_4K2K_25HZ, TVMODE_4K2K_24HZ, TVMODE_4K2K_SMPTE,
VMODE_1920x1200, TVMODE_VGA, TVMODE_SVGA, TVMODE_XGA, TVMODE_SXGA, TVMODE_WSXGA, TVMODE_FHDVGA,
};
@@ -236,6 +239,102 @@ static const vinfo_t tv_info[] =
.sync_duration_den = 1,
.video_clk = 29760000,
},
{ /* VMODE_1366X768P_60HZ */
.name = "1366x768p60hz",
.mode = VMODE_1366X768P_60HZ,
.width = 1366,
.height = 768,
.field_height = 768,
.aspect_ratio_num = 16,
.aspect_ratio_den = 9,
.sync_duration_num = 60,
.sync_duration_den = 1,
.video_clk = 85800000,
},
{ /* VMODE_1600X900P_60HZ */
.name = "1600x900p60hz",
.mode = VMODE_1600X900P_60HZ,
.width = 1600,
.height = 900,
.field_height = 900,
.aspect_ratio_num = 16,
.aspect_ratio_den = 9,
.sync_duration_num = 60,
.sync_duration_den = 1,
.video_clk = 108000000,
},
{ /* VMODE_800X600P_60HZ */
.name = "800x600p60hz",
.mode = VMODE_800X600P_60HZ,
.width = 800,
.height = 600,
.field_height = 600,
.aspect_ratio_num = 4,
.aspect_ratio_den = 3,
.sync_duration_num = 60,
.sync_duration_den = 1,
.video_clk = 40000000,
},
{ /* VMODE_1024X600P_60HZ */
.name = "1024x600p60hz",
.mode = VMODE_1024X600P_60HZ,
.width = 1024,
.height = 600,
.field_height = 600,
.aspect_ratio_num = 17,
.aspect_ratio_den = 10,
.sync_duration_num = 60,
.sync_duration_den = 1,
.video_clk = 51450000,
},
{ /* VMODE_1024X768P_60HZ */
.name = "1024x768p60hz",
.mode = VMODE_1024X768P_60HZ,
.width = 1024,
.height = 768,
.field_height = 768,
.aspect_ratio_num = 4,
.aspect_ratio_den = 3,
.sync_duration_num = 60,
.sync_duration_den = 1,
.video_clk = 65000000,
},
{ /* VMODE_1360X768P_60HZ */
.name = "1360x768p60hz",
.mode = VMODE_1360X768P_60HZ,
.width = 1360,
.height = 768,
.field_height = 768,
.aspect_ratio_num = 16,
.aspect_ratio_den = 9,
.sync_duration_num = 60,
.sync_duration_den = 1,
.video_clk = 85500000,
},
{ /* VMODE_1440X900P_60HZ */
.name = "1440x900p60hz",
.mode = VMODE_1440X900P_60HZ,
.width = 1440,
.height = 900,
.field_height = 900,
.aspect_ratio_num = 8,
.aspect_ratio_den = 5,
.sync_duration_num = 60,
.sync_duration_den = 1,
.video_clk = 106500000,
},
{ /* VMODE_1680X1050P_60HZ */
.name = "1680x1050p60hz",
.mode = VMODE_1680X1050P_60HZ,
.width = 1680,
.height = 1050,
.field_height = 1050,
.aspect_ratio_num = 8,
.aspect_ratio_den = 5,
.sync_duration_num = 60,
.sync_duration_den = 1,
.video_clk = 146250000,
},
{ /* VMODE_1080I */
.name = "1080i",
.mode = VMODE_1080I,

8
drivers/amlogic/display/vout/tvmode.h
View File

@@ -39,6 +39,14 @@ typedef enum {
TVMODE_720P ,
TVMODE_800P ,
TVMODE_800X480P_60HZ,
TVMODE_1366X768P_60HZ,
TVMODE_1600X900P_60HZ,
TVMODE_800X600P_60HZ,
TVMODE_1024X600P_60HZ,
TVMODE_1024X768P_60HZ,
TVMODE_1360X768P_60HZ,
TVMODE_1440X900P_60HZ,
TVMODE_1680X1050P_60HZ,
TVMODE_1080I ,
TVMODE_1080P ,
TVMODE_720P_50HZ ,

5
drivers/amlogic/display/vout/tvoutc.c
View File

@@ -230,7 +230,7 @@ int tvoutc_setclk(tvmode_t mode)
case TVMODE_720P:
case TVMODE_800P:
case TVMODE_800X480P_60HZ:
case TVMODE_720P_50HZ:
case TVMODE_720P_50HZ:
case TVMODE_1080I:
case TVMODE_1080I_50HZ:
case TVMODE_1080P:
@@ -245,7 +245,8 @@ int tvoutc_setclk(tvmode_t mode)
}
break;
default:
printk(KERN_ERR "unsupport tv mode,video clk is not set!!\n");
//printk(KERN_ERR "unsupport tv mode,video clk is not set!!\n");
break;
}
return 0 ;

8
drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c
View File

@@ -677,6 +677,14 @@ const char* disp_mode_t[]={
"720p",
"800p",
"800x480p60hz",
"1366x768p60hz",
"1600x900p60hz",
"800x600p60hz",
"1024x600p60hz",
"1024x768p60hz",
"1360x768p60hz",
"1440x900p60hz",
"1680x1050p60hz",
"1080i",
"1080p",
"720p50hz",

8
drivers/amlogic/hdmi/hdmi_tx/hdmi_tx_edid.c
View File

@@ -1301,6 +1301,14 @@ static dispmode_vic_t dispmode_VIC_tab[]=
{"720p", HDMI_720p60},
{"800p", HDMI_800p},
{"800x480p60hz", HDMI_800x480p60hz},
{"1366x768p60hz", HDMI_1366x768p60hz},
{"1600x900p60hz", HDMI_1600x900p60hz},
{"800x600p60hz", HDMI_800x600p60hz},
{"1024x600p60hz", HDMI_1024x600p60hz},
{"1024x768p60hz", HDMI_1024x768p60hz},
{"1360x768p60hz", HDMI_1360x768p60hz},
{"1440x900p60hz", HDMI_1440x900p60hz},
{"1680x1050p60hz", HDMI_1680x1050p60hz},
{"vga", HDMI_640x480p60},
{"sxga", HDMI_1280x1024},
{"1920x1200", HDMI_1920x1200},

90
drivers/amlogic/hdmi/hdmi_tx/hdmi_tx_video.c
View File

@@ -103,6 +103,94 @@ static Hdmi_tx_video_para_t hdmi_tx_video_params[] =
.ss = SS_SCAN_UNDER,
.sc = SC_SCALE_HORIZ_VERT,
},
{
.VIC = HDMI_1366x768p60hz,
.color_prefer = COLOR_SPACE_RGB444,
.color_depth = COLOR_24BIT,
.bar_info = B_BAR_VERT_HORIZ,
.repeat_time = NO_REPEAT,
.aspect_ratio = TV_ASPECT_RATIO_16_9,
.cc = CC_ITU709,
.ss = SS_SCAN_UNDER,
.sc = SC_SCALE_HORIZ_VERT,
},
{
.VIC = HDMI_1600x900p60hz,
.color_prefer = COLOR_SPACE_RGB444,
.color_depth = COLOR_24BIT,
.bar_info = B_BAR_VERT_HORIZ,
.repeat_time = NO_REPEAT,
.aspect_ratio = TV_ASPECT_RATIO_16_9,
.cc = CC_ITU709,
.ss = SS_SCAN_UNDER,
.sc = SC_SCALE_HORIZ_VERT,
},
{
.VIC = HDMI_800x600p60hz,
.color_prefer = COLOR_SPACE_RGB444,
.color_depth = COLOR_24BIT,
.bar_info = B_BAR_VERT_HORIZ,
.repeat_time = NO_REPEAT,
.aspect_ratio = TV_ASPECT_RATIO_16_9,
.cc = CC_ITU709,
.ss = SS_SCAN_UNDER,
.sc = SC_SCALE_HORIZ_VERT,
},
{
.VIC = HDMI_1024x600p60hz,
.color_prefer = COLOR_SPACE_RGB444,
.color_depth = COLOR_24BIT,
.bar_info = B_BAR_VERT_HORIZ,
.repeat_time = NO_REPEAT,
.aspect_ratio = TV_ASPECT_RATIO_16_9,
.cc = CC_ITU709,
.ss = SS_SCAN_UNDER,
.sc = SC_SCALE_HORIZ_VERT,
},
{
.VIC = HDMI_1024x768p60hz,
.color_prefer = COLOR_SPACE_RGB444,
.color_depth = COLOR_24BIT,
.bar_info = B_BAR_VERT_HORIZ,
.repeat_time = NO_REPEAT,
.aspect_ratio = TV_ASPECT_RATIO_16_9,
.cc = CC_ITU709,
.ss = SS_SCAN_UNDER,
.sc = SC_SCALE_HORIZ_VERT,
},
{
.VIC = HDMI_1360x768p60hz,
.color_prefer = COLOR_SPACE_RGB444,
.color_depth = COLOR_24BIT,
.bar_info = B_BAR_VERT_HORIZ,
.repeat_time = NO_REPEAT,
.aspect_ratio = TV_ASPECT_RATIO_16_9,
.cc = CC_ITU709,
.ss = SS_SCAN_UNDER,
.sc = SC_SCALE_HORIZ_VERT,
},
{
.VIC = HDMI_1440x900p60hz,
.color_prefer = COLOR_SPACE_RGB444,
.color_depth = COLOR_24BIT,
.bar_info = B_BAR_VERT_HORIZ,
.repeat_time = NO_REPEAT,
.aspect_ratio = TV_ASPECT_RATIO_16_9,
.cc = CC_ITU709,
.ss = SS_SCAN_UNDER,
.sc = SC_SCALE_HORIZ_VERT,
},
{
.VIC = HDMI_1680x1050p60hz,
.color_prefer = COLOR_SPACE_RGB444,
.color_depth = COLOR_24BIT,
.bar_info = B_BAR_VERT_HORIZ,
.repeat_time = NO_REPEAT,
.aspect_ratio = TV_ASPECT_RATIO_16_9,
.cc = CC_ITU709,
.ss = SS_SCAN_UNDER,
.sc = SC_SCALE_HORIZ_VERT,
},
{
.VIC = HDMI_1080i60,
.color_prefer = COLOR_SPACE_RGB444,
@@ -488,7 +576,7 @@ int hdmitx_set_display(hdmitx_dev_t* hdmitx_device, HDMI_Video_Codes_t VideoCode
hdmi_print(IMP, SYS "already init VIC = %d Now VIC = %d\n", vic, VideoCode);
if((vic != HDMI_Unkown) && (vic == VideoCode)) {
hdmitx_device->cur_VIC = vic;
return 1;;
return 1;
}
param = hdmi_get_video_param(VideoCode);

8
include/linux/amlogic/hdmi_tx/hdmi_info_global.h
View File

@@ -30,6 +30,14 @@ typedef enum HDMI_Video_Type_ {
HDMI_1280x1024 = 71,
HDMI_800p = 72,
HDMI_800x480p60hz = 73,
HDMI_1366x768p60hz = 74,
HDMI_1600x900p60hz = 75,
HDMI_800x600p60hz = 76,
HDMI_1024x600p60hz,
HDMI_1024x768p60hz,
HDMI_1360x768p60hz,
HDMI_1440x900p60hz,
HDMI_1680x1050p60hz,
HDMI_1920x1200 = 100,
HDMI_4k2k_24 = 93, // CEA-861-F
HDMI_4k2k_25,

2
include/linux/amlogic/logo/logo_dev_osd.h
View File

@@ -7,7 +7,7 @@
} while (0)
#ifdef CONFIG_AM_HDMI_ONLY
#define PARA_HDMI_ONLY 21
#define PARA_HDMI_ONLY 29
typedef struct {
char *name;

8
include/linux/amlogic/vout/vinfo.h
View File

@@ -41,6 +41,14 @@ typedef enum {
VMODE_720P ,
VMODE_800P ,
VMODE_800X480P_60HZ,
VMODE_1366X768P_60HZ,
VMODE_1600X900P_60HZ,
VMODE_800X600P_60HZ,
VMODE_1024X600P_60HZ,
VMODE_1024X768P_60HZ,
VMODE_1360X768P_60HZ,
VMODE_1440X900P_60HZ,
VMODE_1680X1050P_60HZ,
VMODE_1080I ,
VMODE_1080P ,
VMODE_720P_50HZ ,