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clk: add CLK_DIVIDER_PROHIBIT_ZERO to prohibit value 0 of register.

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PD#164751: clk: add CLK_DIVIDER_PROHIBIT_ZERO to prohibit value 0 of
register.

There is a possible error when spicc clk divider register value is 0.

It's easy and effective to resolve this problem with this flag.

Change-Id: I046f3ee6e35b98211a13be3390b847a5a75ec3c8
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
This commit is contained in:
Sunny Luo
2018-07-05 15:32:32 +08:00
committed by Yixun Lan
parent fbc8bd75e6
commit 157284b916
2 changed files with 9 additions and 0 deletions
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4
drivers/clk/clk-divider.c
View File

@@ -271,6 +271,10 @@ static int _next_div(const struct clk_div_table *table, int div,
return __roundup_pow_of_two(div);
if (table)
return _round_up_table(table, div);
#ifdef CONFIG_AMLOGIC_MODIFY
if ((flags & CLK_DIVIDER_PROHIBIT_ZERO) && (div == 1))
div++;
#endif
return div;
}

5
include/linux/clk-provider.h
View File

@@ -385,6 +385,8 @@ struct clk_div_table {
* CLK_DIVIDER_MAX_AT_ZERO - For dividers which are like CLK_DIVIDER_ONE_BASED
* except when the value read from the register is zero, the divisor is
* 2^width of the field.
* CLK_DIVIDER_PROHIBIT_ZERO - Prohibit value 0 of register(no bypass, enable by
* CONFIG_AMLOGIC_MODIFY).
*/
struct clk_divider {
struct clk_hw hw;
@@ -405,6 +407,9 @@ struct clk_divider {
#define CLK_DIVIDER_ROUND_CLOSEST BIT(4)
#define CLK_DIVIDER_READ_ONLY BIT(5)
#define CLK_DIVIDER_MAX_AT_ZERO BIT(6)
#ifdef CONFIG_AMLOGIC_MODIFY
#define CLK_DIVIDER_PROHIBIT_ZERO BIT(7)
#endif
extern const struct clk_ops clk_divider_ops;
extern const struct clk_ops clk_divider_ro_ops;