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ARM: tegra: usb_phy: Correct utmi power off sequence

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USB_WAKE_ON_CNNT_EN_DEV is only valid when USB controller is in device mode.

Also only one of USB_WAKE_ON_CNNT_EN_DEV and USB_WAKE_ON_DISCON_EN_DEV bits
can be set at any one time.

Change-Id: I76d7fcf73e6ab8fa1610ec4264060c44b221775c
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
This commit is contained in:
Jay Cheng
2010-11-09 00:22:28 -05:00
committed by Benoit Goby
parent 2d73a7392a
commit 15f59ba827
1 changed files with 7 additions and 3 deletions
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10
arch/arm/mach-tegra/usb_phy.c
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@@ -65,6 +65,7 @@
#define UTMIP_PHY_ENABLE (1 << 12)
#define ULPI_PHY_ENABLE (1 << 13)
#define USB_SUSP_SET (1 << 14)
#define USB_WAKEUP_DEBOUNCE_COUNT(x) (((x) & 0x7) << 16)
#define USB1_LEGACY_CTRL 0x410
#define USB1_NO_LEGACY_MODE (1 << 0)
@@ -449,9 +450,12 @@ static void utmi_phy_power_off(struct tegra_usb_phy *phy)
utmi_phy_clk_disable(phy);
val = readl(base + USB_SUSP_CTRL);
val |= USB_WAKE_ON_CNNT_EN_DEV | USB_WAKE_ON_DISCON_EN_DEV;
writel(val, base + USB_SUSP_CTRL);
if (phy->mode == TEGRA_USB_PHY_MODE_DEVICE) {
val = readl(base + USB_SUSP_CTRL);
val &= ~USB_WAKEUP_DEBOUNCE_COUNT(~0);
val |= USB_WAKE_ON_CNNT_EN_DEV | USB_WAKEUP_DEBOUNCE_COUNT(5);
writel(val, base + USB_SUSP_CTRL);
}
val = readl(base + USB_SUSP_CTRL);
val |= UTMIP_RESET;