drm: bridge: dw-hdmi: set hdcp1x_enable in the dts so uboot can visit

Change-Id: Ibaf91c5beac2355e5c270f1edb69a63795dbff6a
Signed-off-by: Huicong Xu <xhc@rock-chips.com>

Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt

@@ -39,6 +39,7 @@ Optional properties
 - clock-names: May contain "vpll", external clock for some hdmi phy.
 - phys: from general PHY binding: the phandle for the PHY device.
 - phy-names: Should be "hdmi" if phys references an external phy.
+- hdcp1x-enable: enable hdcp1.x, enable if defined, disable if not defined
 
 Optional pinctrl entry:
 - If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

@@ -4019,7 +4019,7 @@ static void dw_hdmi_register_debugfs(struct device *dev, struct dw_hdmi *hdmi)
 }
 
 static void dw_hdmi_register_hdcp(struct device *dev, struct dw_hdmi *hdmi,
-				  u32 val)
+				  u32 val, bool hdcp1x_enable)
 {
 	struct dw_hdcp hdmi_hdcp = {
 		.hdmi = hdmi,
@@ -4027,7 +4027,7 @@ static void dw_hdmi_register_hdcp(struct device *dev, struct dw_hdmi *hdmi,
 		.read = hdmi_readb,
 		.regs = hdmi->regs,
 		.reg_io_width = val,
-		.enable = 0,
+		.enable = hdcp1x_enable,
 	};
 	struct platform_device_info hdcp_device_info = {
 		.parent = dev,
@@ -4067,6 +4067,7 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
 	u8 prod_id1;
 	u8 config0;
 	u8 config3;
+	bool hdcp1x_enable = 0;
 
 	hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
 	if (!hdmi)
@@ -4363,7 +4364,10 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
 	drm_bridge_add(&hdmi->bridge);
 
 	dw_hdmi_register_debugfs(dev, hdmi);
-	dw_hdmi_register_hdcp(dev, hdmi, val);
+
+	if (of_property_read_bool(np, "hdcp1x-enable"))
+		hdcp1x_enable = 1;
+	dw_hdmi_register_hdcp(dev, hdmi, val, hdcp1x_enable);
 
 	return hdmi;