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clk: rockchip: rv1126: Fix usb clock names

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Change-Id: Ic281de5a3d0feeddddaa509eb721dc6f0b584f6b
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This commit is contained in:
Finley Xiao
2020-02-24 16:59:58 +08:00
committed by Tao Huang
parent 45a1919587
commit 1758971897
2 changed files with 5 additions and 5 deletions
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4
drivers/clk/rockchip/clk-rv1126.c
View File

@@ -145,7 +145,7 @@ PNAME(mux_uart1_p) = { "sclk_uart1_div", "sclk_uart1_fracdiv", "xin24m" };
PNAME(mux_xin24m_gpll_p) = { "xin24m", "gpll" };
PNAME(mux_gpll_xin24m_p) = { "gpll", "xin24m" };
PNAME(mux_xin24m_32k_p) = { "xin24m", "clk_rtc32k" };
PNAME(mux_usbphy_otp_ref_p) = { "clk_ref12m", "xin_osc0_div2_usbphyref_otg" };
PNAME(mux_usbphy_otg_ref_p) = { "clk_ref12m", "xin_osc0_div2_usbphyref_otg" };
PNAME(mux_usbphy_host_ref_p) = { "clk_ref12m", "xin_osc0_div2_usbphyref_host" };
PNAME(mux_mipidsiphy_ref_p) = { "clk_ref24m", "xin_osc0_mipiphyref" };
PNAME(mux_usb480m_p) = { "xin24m", "usb480m_phy", "clk_rtc32k" };
@@ -416,7 +416,7 @@ static struct rockchip_clk_branch rv1126_clk_pmu_branches[] __initdata = {
RV1126_PMU_CLKGATE_CON(1), 7, GFLAGS),
FACTOR(0, "xin_osc0_div2_usbphyref_otg", "xin_osc0_usbphyref_otg", 0, 1, 2),
FACTOR(0, "xin_osc0_div2_usbphyref_host", "xin_osc0_usbphyref_host", 0, 1, 2),
MUX(CLK_USBPHY_OTP_REF, "clk_usbphy_otp_ref", mux_usbphy_otp_ref_p, CLK_SET_RATE_PARENT,
MUX(CLK_USBPHY_OTG_REF, "clk_usbphy_otg_ref", mux_usbphy_otg_ref_p, CLK_SET_RATE_PARENT,
RV1126_PMU_CLKSEL_CON(7), 6, 1, MFLAGS),
MUX(CLK_USBPHY_HOST_REF, "clk_usbphy_host_ref", mux_usbphy_host_ref_p, CLK_SET_RATE_PARENT,
RV1126_PMU_CLKSEL_CON(7), 7, 1, MFLAGS),

6
include/dt-bindings/clock/rv1126-cru.h
View File

@@ -34,7 +34,7 @@
#define CLK_PMUPVTM 20
#define CLK_CORE_PMUPVTM 21
#define CLK_REF12M 22
#define CLK_USBPHY_OTP_REF 23
#define CLK_USBPHY_OTG_REF 23
#define CLK_USBPHY_HOST_REF 24
#define CLK_REF24M 25
#define CLK_MIPIDSIPHY_REF 26
@@ -577,8 +577,8 @@
#define SRST_USBOTG_A 181
#define SRST_USBPHY_OTG_P 182
#define SRST_USBPHY_HOST_P 183
#define SRST_USBPHYOR_OTG 184
#define SRST_USBPHYOR_HOST 185
#define SRST_USBPHYPOR_OTG 184
#define SRST_USBPHYPOR_HOST 185
#define SRST_PDGMAC_NIU_A 188
#define SRST_PDGMAC_NIU_P 189
#define SRST_MAC_PTPREF 190