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drm/bridge: dw_hdmi: clear ih_mute register when system resume

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HDMI PD is power off when system suspend, so ih_mute register
bit0 mute_all_interrupt will be reset to 1 when system resume.
HPD interrupt will be mask, that would cause hdmi plugin could
not be detected.

Change-Id: I3bf2e6116e902cd516a7ac69fbe8569ca943e853
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
This commit is contained in:
Bin Yang
2017-03-13 18:02:59 +08:00
committed by Algea Cao
parent fec4453667
commit 177d081ea1
3 changed files with 67 additions and 0 deletions
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45
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
View File

@@ -200,6 +200,7 @@ struct dw_hdmi {
const struct dw_hdmi_plat_data *plat_data;
int vic;
int irq;
u8 edid[HDMI_EDID_LEN];
@@ -2554,6 +2555,7 @@ __dw_hdmi_probe(struct platform_device *pdev,
goto err_iahb;
}
hdmi->irq = irq;
ret = devm_request_threaded_irq(dev, irq, dw_hdmi_hardirq,
dw_hdmi_irq, IRQF_SHARED,
dev_name(dev), hdmi);
@@ -2748,6 +2750,49 @@ void dw_hdmi_unbind(struct dw_hdmi *hdmi)
}
EXPORT_SYMBOL_GPL(dw_hdmi_unbind);
static void dw_hdmi_reg_initial(struct dw_hdmi *hdmi)
{
if (hdmi_readb(hdmi, HDMI_IH_MUTE)) {
initialize_hdmi_ih_mutes(hdmi);
hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL,
HDMI_PHY_I2CM_INT_ADDR);
hdmi_writeb(hdmi, HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL |
HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL,
HDMI_PHY_I2CM_CTLINT_ADDR);
hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE,
HDMI_PHY_POL0);
hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD |
HDMI_IH_PHY_STAT0_RX_SENSE),
HDMI_IH_MUTE_PHY_STAT0);
}
}
void dw_hdmi_suspend(struct device *dev)
{
struct dw_hdmi *hdmi = dev_get_drvdata(dev);
mutex_lock(&hdmi->mutex);
if (hdmi->irq)
disable_irq(hdmi->irq);
mutex_unlock(&hdmi->mutex);
}
EXPORT_SYMBOL_GPL(dw_hdmi_suspend);
void dw_hdmi_resume(struct device *dev)
{
struct dw_hdmi *hdmi = dev_get_drvdata(dev);
mutex_lock(&hdmi->mutex);
dw_hdmi_reg_initial(hdmi);
if (hdmi->irq)
enable_irq(hdmi->irq);
mutex_unlock(&hdmi->mutex);
}
EXPORT_SYMBOL_GPL(dw_hdmi_resume);
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");

20
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
View File

@@ -592,11 +592,31 @@ static int dw_hdmi_rockchip_remove(struct platform_device *pdev)
return 0;
}
static int dw_hdmi_rockchip_suspend(struct device *dev)
{
dw_hdmi_suspend(dev);
return 0;
}
static int dw_hdmi_rockchip_resume(struct device *dev)
{
dw_hdmi_resume(dev);
return 0;
}
static const struct dev_pm_ops dw_hdmi_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(dw_hdmi_rockchip_suspend,
dw_hdmi_rockchip_resume)
};
struct platform_driver dw_hdmi_rockchip_pltfm_driver = {
.probe = dw_hdmi_rockchip_probe,
.remove = dw_hdmi_rockchip_remove,
.driver = {
.name = "dwhdmi-rockchip",
.of_match_table = dw_hdmi_rockchip_dt_ids,
.pm = &dw_hdmi_pm_ops,
},
};

2
include/drm/bridge/dw_hdmi.h
View File

@@ -159,6 +159,8 @@ void dw_hdmi_unbind(struct dw_hdmi *hdmi);
struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev,
struct drm_encoder *encoder,
const struct dw_hdmi_plat_data *plat_data);
void dw_hdmi_suspend(struct device *dev);
void dw_hdmi_resume(struct device *dev);
void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);